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0001 // SPDX-License-Identifier: GPL-2.0+
0002 /*
0003  * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
0004  * All rights reserved.
0005  *
0006  * Purpose: Provide functions to setup NIC operation mode
0007  * Functions:
0008  *      s_vSafeResetTx - Rest Tx
0009  *      CARDvSetRSPINF - Set RSPINF
0010  *      CARDvUpdateBasicTopRate - Update BasicTopRate
0011  *      CARDbAddBasicRate - Add to BasicRateSet
0012  *      CARDbIsOFDMinBasicRate - Check if any OFDM rate is in BasicRateSet
0013  *      CARDqGetTSFOffset - Calculate TSFOffset
0014  *      vt6655_get_current_tsf - Read Current NIC TSF counter
0015  *      CARDqGetNextTBTT - Calculate Next Beacon TSF counter
0016  *      CARDvSetFirstNextTBTT - Set NIC Beacon time
0017  *      CARDvUpdateNextTBTT - Sync. NIC Beacon time
0018  *      CARDbRadioPowerOff - Turn Off NIC Radio Power
0019  *
0020  * Revision History:
0021  *      06-10-2003 Bryan YC Fan:  Re-write codes to support VT3253 spec.
0022  *      08-26-2003 Kyle Hsu:      Modify the definition type of iobase.
0023  *      09-01-2003 Bryan YC Fan:  Add vUpdateIFS().
0024  *
0025  */
0026 
0027 #include "card.h"
0028 #include "baseband.h"
0029 #include "mac.h"
0030 #include "desc.h"
0031 #include "rf.h"
0032 #include "power.h"
0033 
0034 /*---------------------  Static Definitions -------------------------*/
0035 
0036 #define C_SIFS_A        16      /* micro sec. */
0037 #define C_SIFS_BG       10
0038 
0039 #define C_EIFS          80      /* micro sec. */
0040 
0041 #define C_SLOT_SHORT    9       /* micro sec. */
0042 #define C_SLOT_LONG     20
0043 
0044 #define C_CWMIN_A       15      /* slot time */
0045 #define C_CWMIN_B       31
0046 
0047 #define C_CWMAX         1023    /* slot time */
0048 
0049 #define WAIT_BEACON_TX_DOWN_TMO         3    /* Times */
0050 
0051 /*---------------------  Static Variables  --------------------------*/
0052 
0053 static const unsigned short cwRXBCNTSFOff[MAX_RATE] = {
0054     17, 17, 17, 17, 34, 23, 17, 11, 8, 5, 4, 3};
0055 
0056 /*---------------------  Static Functions  --------------------------*/
0057 
0058 static void s_vCalculateOFDMRParameter(unsigned char rate, u8 bb_type,
0059                        unsigned char *pbyTxRate,
0060                        unsigned char *pbyRsvTime);
0061 
0062 /*---------------------  Export Functions  --------------------------*/
0063 
0064 /*
0065  * Description: Calculate TxRate and RsvTime fields for RSPINF in OFDM mode.
0066  *
0067  * Parameters:
0068  *  In:
0069  *      wRate           - Tx Rate
0070  *      byPktType       - Tx Packet type
0071  *  Out:
0072  *      pbyTxRate       - pointer to RSPINF TxRate field
0073  *      pbyRsvTime      - pointer to RSPINF RsvTime field
0074  *
0075  * Return Value: none
0076  */
0077 static void s_vCalculateOFDMRParameter(unsigned char rate,
0078                        u8 bb_type,
0079                        unsigned char *pbyTxRate,
0080                        unsigned char *pbyRsvTime)
0081 {
0082     switch (rate) {
0083     case RATE_6M:
0084         if (bb_type == BB_TYPE_11A) { /* 5GHZ */
0085             *pbyTxRate = 0x9B;
0086             *pbyRsvTime = 44;
0087         } else {
0088             *pbyTxRate = 0x8B;
0089             *pbyRsvTime = 50;
0090         }
0091         break;
0092 
0093     case RATE_9M:
0094         if (bb_type == BB_TYPE_11A) { /* 5GHZ */
0095             *pbyTxRate = 0x9F;
0096             *pbyRsvTime = 36;
0097         } else {
0098             *pbyTxRate = 0x8F;
0099             *pbyRsvTime = 42;
0100         }
0101         break;
0102 
0103     case RATE_12M:
0104         if (bb_type == BB_TYPE_11A) { /* 5GHZ */
0105             *pbyTxRate = 0x9A;
0106             *pbyRsvTime = 32;
0107         } else {
0108             *pbyTxRate = 0x8A;
0109             *pbyRsvTime = 38;
0110         }
0111         break;
0112 
0113     case RATE_18M:
0114         if (bb_type == BB_TYPE_11A) { /* 5GHZ */
0115             *pbyTxRate = 0x9E;
0116             *pbyRsvTime = 28;
0117         } else {
0118             *pbyTxRate = 0x8E;
0119             *pbyRsvTime = 34;
0120         }
0121         break;
0122 
0123     case RATE_36M:
0124         if (bb_type == BB_TYPE_11A) { /* 5GHZ */
0125             *pbyTxRate = 0x9D;
0126             *pbyRsvTime = 24;
0127         } else {
0128             *pbyTxRate = 0x8D;
0129             *pbyRsvTime = 30;
0130         }
0131         break;
0132 
0133     case RATE_48M:
0134         if (bb_type == BB_TYPE_11A) { /* 5GHZ */
0135             *pbyTxRate = 0x98;
0136             *pbyRsvTime = 24;
0137         } else {
0138             *pbyTxRate = 0x88;
0139             *pbyRsvTime = 30;
0140         }
0141         break;
0142 
0143     case RATE_54M:
0144         if (bb_type == BB_TYPE_11A) { /* 5GHZ */
0145             *pbyTxRate = 0x9C;
0146             *pbyRsvTime = 24;
0147         } else {
0148             *pbyTxRate = 0x8C;
0149             *pbyRsvTime = 30;
0150         }
0151         break;
0152 
0153     case RATE_24M:
0154     default:
0155         if (bb_type == BB_TYPE_11A) { /* 5GHZ */
0156             *pbyTxRate = 0x99;
0157             *pbyRsvTime = 28;
0158         } else {
0159             *pbyTxRate = 0x89;
0160             *pbyRsvTime = 34;
0161         }
0162         break;
0163     }
0164 }
0165 
0166 /*---------------------  Export Functions  --------------------------*/
0167 
0168 /*
0169  * Description: Update IFS
0170  *
0171  * Parameters:
0172  *  In:
0173  *      priv             - The adapter to be set
0174  *  Out:
0175  *      none
0176  *
0177  * Return Value: None.
0178  */
0179 bool CARDbSetPhyParameter(struct vnt_private *priv, u8 bb_type)
0180 {
0181     unsigned char byCWMaxMin = 0;
0182     unsigned char bySlot = 0;
0183     unsigned char bySIFS = 0;
0184     unsigned char byDIFS = 0;
0185     int i;
0186 
0187     /* Set SIFS, DIFS, EIFS, SlotTime, CwMin */
0188     if (bb_type == BB_TYPE_11A) {
0189         MACvSetBBType(priv->port_offset, BB_TYPE_11A);
0190         bb_write_embedded(priv, 0x88, 0x03);
0191         bySlot = C_SLOT_SHORT;
0192         bySIFS = C_SIFS_A;
0193         byDIFS = C_SIFS_A + 2 * C_SLOT_SHORT;
0194         byCWMaxMin = 0xA4;
0195     } else if (bb_type == BB_TYPE_11B) {
0196         MACvSetBBType(priv->port_offset, BB_TYPE_11B);
0197         bb_write_embedded(priv, 0x88, 0x02);
0198         bySlot = C_SLOT_LONG;
0199         bySIFS = C_SIFS_BG;
0200         byDIFS = C_SIFS_BG + 2 * C_SLOT_LONG;
0201         byCWMaxMin = 0xA5;
0202     } else { /* PK_TYPE_11GA & PK_TYPE_11GB */
0203         MACvSetBBType(priv->port_offset, BB_TYPE_11G);
0204         bb_write_embedded(priv, 0x88, 0x08);
0205         bySIFS = C_SIFS_BG;
0206 
0207         if (priv->short_slot_time) {
0208             bySlot = C_SLOT_SHORT;
0209             byDIFS = C_SIFS_BG + 2 * C_SLOT_SHORT;
0210         } else {
0211             bySlot = C_SLOT_LONG;
0212             byDIFS = C_SIFS_BG + 2 * C_SLOT_LONG;
0213         }
0214 
0215         byCWMaxMin = 0xa4;
0216 
0217         for (i = RATE_54M; i >= RATE_6M; i--) {
0218             if (priv->basic_rates & ((u32)(0x1 << i))) {
0219                 byCWMaxMin |= 0x1;
0220                 break;
0221             }
0222         }
0223     }
0224 
0225     if (priv->byRFType == RF_RFMD2959) {
0226         /*
0227          * bcs TX_PE will reserve 3 us hardware's processing
0228          * time here is 2 us.
0229          */
0230         bySIFS -= 3;
0231         byDIFS -= 3;
0232         /*
0233          * TX_PE will reserve 3 us for MAX2829 A mode only, it is for
0234          * better TX throughput; MAC will need 2 us to process, so the
0235          * SIFS, DIFS can be shorter by 2 us.
0236          */
0237     }
0238 
0239     if (priv->bySIFS != bySIFS) {
0240         priv->bySIFS = bySIFS;
0241         iowrite8(priv->bySIFS, priv->port_offset + MAC_REG_SIFS);
0242     }
0243     if (priv->byDIFS != byDIFS) {
0244         priv->byDIFS = byDIFS;
0245         iowrite8(priv->byDIFS, priv->port_offset + MAC_REG_DIFS);
0246     }
0247     if (priv->byEIFS != C_EIFS) {
0248         priv->byEIFS = C_EIFS;
0249         iowrite8(priv->byEIFS, priv->port_offset + MAC_REG_EIFS);
0250     }
0251     if (priv->bySlot != bySlot) {
0252         priv->bySlot = bySlot;
0253         iowrite8(priv->bySlot, priv->port_offset + MAC_REG_SLOT);
0254 
0255         bb_set_short_slot_time(priv);
0256     }
0257     if (priv->byCWMaxMin != byCWMaxMin) {
0258         priv->byCWMaxMin = byCWMaxMin;
0259         iowrite8(priv->byCWMaxMin, priv->port_offset + MAC_REG_CWMAXMIN0);
0260     }
0261 
0262     priv->byPacketType = CARDbyGetPktType(priv);
0263 
0264     CARDvSetRSPINF(priv, bb_type);
0265 
0266     return true;
0267 }
0268 
0269 /*
0270  * Description: Sync. TSF counter to BSS
0271  *              Get TSF offset and write to HW
0272  *
0273  * Parameters:
0274  *  In:
0275  *      priv         - The adapter to be sync.
0276  *      byRxRate        - data rate of receive beacon
0277  *      qwBSSTimestamp  - Rx BCN's TSF
0278  *      qwLocalTSF      - Local TSF
0279  *  Out:
0280  *      none
0281  *
0282  * Return Value: none
0283  */
0284 bool CARDbUpdateTSF(struct vnt_private *priv, unsigned char byRxRate,
0285             u64 qwBSSTimestamp)
0286 {
0287     u64 local_tsf;
0288     u64 qwTSFOffset = 0;
0289 
0290     local_tsf = vt6655_get_current_tsf(priv);
0291 
0292     if (qwBSSTimestamp != local_tsf) {
0293         qwTSFOffset = CARDqGetTSFOffset(byRxRate, qwBSSTimestamp,
0294                         local_tsf);
0295         /* adjust TSF, HW's TSF add TSF Offset reg */
0296         qwTSFOffset =  le64_to_cpu(qwTSFOffset);
0297         iowrite32((u32)qwTSFOffset, priv->port_offset + MAC_REG_TSFOFST);
0298         iowrite32((u32)(qwTSFOffset >> 32), priv->port_offset + MAC_REG_TSFOFST + 4);
0299         vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_TSFSYNCEN);
0300     }
0301     return true;
0302 }
0303 
0304 /*
0305  * Description: Set NIC TSF counter for first Beacon time
0306  *              Get NEXTTBTT from adjusted TSF and Beacon Interval
0307  *
0308  * Parameters:
0309  *  In:
0310  *      priv         - The adapter to be set.
0311  *      wBeaconInterval - Beacon Interval
0312  *  Out:
0313  *      none
0314  *
0315  * Return Value: true if succeed; otherwise false
0316  */
0317 bool CARDbSetBeaconPeriod(struct vnt_private *priv,
0318               unsigned short wBeaconInterval)
0319 {
0320     u64 qwNextTBTT;
0321 
0322     qwNextTBTT = vt6655_get_current_tsf(priv); /* Get Local TSF counter */
0323 
0324     qwNextTBTT = CARDqGetNextTBTT(qwNextTBTT, wBeaconInterval);
0325 
0326     /* set HW beacon interval */
0327     iowrite16(wBeaconInterval, priv->port_offset + MAC_REG_BI);
0328     priv->wBeaconInterval = wBeaconInterval;
0329     /* Set NextTBTT */
0330     qwNextTBTT =  le64_to_cpu(qwNextTBTT);
0331     iowrite32((u32)qwNextTBTT, priv->port_offset + MAC_REG_NEXTTBTT);
0332     iowrite32((u32)(qwNextTBTT >> 32), priv->port_offset + MAC_REG_NEXTTBTT + 4);
0333     vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
0334 
0335     return true;
0336 }
0337 
0338 /*
0339  * Description: Turn off Radio power
0340  *
0341  * Parameters:
0342  *  In:
0343  *      priv         - The adapter to be turned off
0344  *  Out:
0345  *      none
0346  *
0347  */
0348 void CARDbRadioPowerOff(struct vnt_private *priv)
0349 {
0350     if (priv->radio_off)
0351         return;
0352 
0353     switch (priv->byRFType) {
0354     case RF_RFMD2959:
0355         vt6655_mac_word_reg_bits_off(priv->port_offset, MAC_REG_SOFTPWRCTL,
0356                          SOFTPWRCTL_TXPEINV);
0357         vt6655_mac_word_reg_bits_on(priv->port_offset, MAC_REG_SOFTPWRCTL,
0358                         SOFTPWRCTL_SWPE1);
0359         break;
0360 
0361     case RF_AIROHA:
0362     case RF_AL2230S:
0363         vt6655_mac_word_reg_bits_off(priv->port_offset, MAC_REG_SOFTPWRCTL,
0364                          SOFTPWRCTL_SWPE2);
0365         vt6655_mac_word_reg_bits_off(priv->port_offset, MAC_REG_SOFTPWRCTL,
0366                          SOFTPWRCTL_SWPE3);
0367         break;
0368     }
0369 
0370     vt6655_mac_reg_bits_off(priv->port_offset, MAC_REG_HOSTCR, HOSTCR_RXON);
0371 
0372     bb_set_deep_sleep(priv, priv->local_id);
0373 
0374     priv->radio_off = true;
0375     pr_debug("chester power off\n");
0376     vt6655_mac_reg_bits_on(priv->port_offset, MAC_REG_GPIOCTL0, LED_ACTSET);  /* LED issue */
0377 }
0378 
0379 void CARDvSafeResetTx(struct vnt_private *priv)
0380 {
0381     unsigned int uu;
0382     struct vnt_tx_desc *pCurrTD;
0383 
0384     /* initialize TD index */
0385     priv->apTailTD[0] = &priv->apTD0Rings[0];
0386     priv->apCurrTD[0] = &priv->apTD0Rings[0];
0387 
0388     priv->apTailTD[1] = &priv->apTD1Rings[0];
0389     priv->apCurrTD[1] = &priv->apTD1Rings[0];
0390 
0391     for (uu = 0; uu < TYPE_MAXTD; uu++)
0392         priv->iTDUsed[uu] = 0;
0393 
0394     for (uu = 0; uu < priv->opts.tx_descs[0]; uu++) {
0395         pCurrTD = &priv->apTD0Rings[uu];
0396         pCurrTD->td0.owner = OWNED_BY_HOST;
0397         /* init all Tx Packet pointer to NULL */
0398     }
0399     for (uu = 0; uu < priv->opts.tx_descs[1]; uu++) {
0400         pCurrTD = &priv->apTD1Rings[uu];
0401         pCurrTD->td0.owner = OWNED_BY_HOST;
0402         /* init all Tx Packet pointer to NULL */
0403     }
0404 
0405     /* set MAC TD pointer */
0406     MACvSetCurrTXDescAddr(TYPE_TXDMA0, priv, priv->td0_pool_dma);
0407 
0408     MACvSetCurrTXDescAddr(TYPE_AC0DMA, priv, priv->td1_pool_dma);
0409 
0410     /* set MAC Beacon TX pointer */
0411     iowrite32((u32)priv->tx_beacon_dma, priv->port_offset + MAC_REG_BCNDMAPTR);
0412 }
0413 
0414 /*
0415  * Description:
0416  *      Reset Rx
0417  *
0418  * Parameters:
0419  *  In:
0420  *      priv     - Pointer to the adapter
0421  *  Out:
0422  *      none
0423  *
0424  * Return Value: none
0425  */
0426 void CARDvSafeResetRx(struct vnt_private *priv)
0427 {
0428     unsigned int uu;
0429     struct vnt_rx_desc *pDesc;
0430 
0431     /* initialize RD index */
0432     priv->pCurrRD[0] = &priv->aRD0Ring[0];
0433     priv->pCurrRD[1] = &priv->aRD1Ring[0];
0434 
0435     /* init state, all RD is chip's */
0436     for (uu = 0; uu < priv->opts.rx_descs0; uu++) {
0437         pDesc = &priv->aRD0Ring[uu];
0438         pDesc->rd0.res_count = cpu_to_le16(priv->rx_buf_sz);
0439         pDesc->rd0.owner = OWNED_BY_NIC;
0440         pDesc->rd1.req_count = cpu_to_le16(priv->rx_buf_sz);
0441     }
0442 
0443     /* init state, all RD is chip's */
0444     for (uu = 0; uu < priv->opts.rx_descs1; uu++) {
0445         pDesc = &priv->aRD1Ring[uu];
0446         pDesc->rd0.res_count = cpu_to_le16(priv->rx_buf_sz);
0447         pDesc->rd0.owner = OWNED_BY_NIC;
0448         pDesc->rd1.req_count = cpu_to_le16(priv->rx_buf_sz);
0449     }
0450 
0451     /* set perPkt mode */
0452     iowrite32(RX_PERPKT, priv->port_offset + MAC_REG_RXDMACTL0);
0453     iowrite32(RX_PERPKT, priv->port_offset + MAC_REG_RXDMACTL1);
0454     /* set MAC RD pointer */
0455     MACvSetCurrRx0DescAddr(priv, priv->rd0_pool_dma);
0456 
0457     MACvSetCurrRx1DescAddr(priv, priv->rd1_pool_dma);
0458 }
0459 
0460 /*
0461  * Description: Get response Control frame rate in CCK mode
0462  *
0463  * Parameters:
0464  *  In:
0465  *      priv             - The adapter to be set
0466  *      wRateIdx            - Receiving data rate
0467  *  Out:
0468  *      none
0469  *
0470  * Return Value: response Control frame rate
0471  */
0472 static unsigned short CARDwGetCCKControlRate(struct vnt_private *priv,
0473                          unsigned short wRateIdx)
0474 {
0475     unsigned int ui = (unsigned int)wRateIdx;
0476 
0477     while (ui > RATE_1M) {
0478         if (priv->basic_rates & ((u32)0x1 << ui))
0479             return (unsigned short)ui;
0480 
0481         ui--;
0482     }
0483     return (unsigned short)RATE_1M;
0484 }
0485 
0486 /*
0487  * Description: Get response Control frame rate in OFDM mode
0488  *
0489  * Parameters:
0490  *  In:
0491  *      priv             - The adapter to be set
0492  *      wRateIdx            - Receiving data rate
0493  *  Out:
0494  *      none
0495  *
0496  * Return Value: response Control frame rate
0497  */
0498 static unsigned short CARDwGetOFDMControlRate(struct vnt_private *priv,
0499                           unsigned short wRateIdx)
0500 {
0501     unsigned int ui = (unsigned int)wRateIdx;
0502 
0503     pr_debug("BASIC RATE: %X\n", priv->basic_rates);
0504 
0505     if (!CARDbIsOFDMinBasicRate((void *)priv)) {
0506         pr_debug("%s:(NO OFDM) %d\n", __func__, wRateIdx);
0507         if (wRateIdx > RATE_24M)
0508             wRateIdx = RATE_24M;
0509         return wRateIdx;
0510     }
0511     while (ui > RATE_11M) {
0512         if (priv->basic_rates & ((u32)0x1 << ui)) {
0513             pr_debug("%s : %d\n", __func__, ui);
0514             return (unsigned short)ui;
0515         }
0516         ui--;
0517     }
0518     pr_debug("%s: 6M\n", __func__);
0519     return (unsigned short)RATE_24M;
0520 }
0521 
0522 /*
0523  * Description: Set RSPINF
0524  *
0525  * Parameters:
0526  *  In:
0527  *      priv             - The adapter to be set
0528  *  Out:
0529  *      none
0530  *
0531  * Return Value: None.
0532  */
0533 void CARDvSetRSPINF(struct vnt_private *priv, u8 bb_type)
0534 {
0535     union vnt_phy_field_swap phy;
0536     unsigned char byTxRate, byRsvTime;      /* For OFDM */
0537     unsigned long flags;
0538 
0539     spin_lock_irqsave(&priv->lock, flags);
0540 
0541     /* Set to Page1 */
0542     MACvSelectPage1(priv->port_offset);
0543 
0544     /* RSPINF_b_1 */
0545     vnt_get_phy_field(priv, 14,
0546               CARDwGetCCKControlRate(priv, RATE_1M),
0547               PK_TYPE_11B, &phy.field_read);
0548 
0549      /* swap over to get correct write order */
0550     swap(phy.swap[0], phy.swap[1]);
0551 
0552     iowrite32(phy.field_write, priv->port_offset + MAC_REG_RSPINF_B_1);
0553 
0554     /* RSPINF_b_2 */
0555     vnt_get_phy_field(priv, 14,
0556               CARDwGetCCKControlRate(priv, RATE_2M),
0557               PK_TYPE_11B, &phy.field_read);
0558 
0559     swap(phy.swap[0], phy.swap[1]);
0560 
0561     iowrite32(phy.field_write, priv->port_offset + MAC_REG_RSPINF_B_2);
0562 
0563     /* RSPINF_b_5 */
0564     vnt_get_phy_field(priv, 14,
0565               CARDwGetCCKControlRate(priv, RATE_5M),
0566               PK_TYPE_11B, &phy.field_read);
0567 
0568     swap(phy.swap[0], phy.swap[1]);
0569 
0570     iowrite32(phy.field_write, priv->port_offset + MAC_REG_RSPINF_B_5);
0571 
0572     /* RSPINF_b_11 */
0573     vnt_get_phy_field(priv, 14,
0574               CARDwGetCCKControlRate(priv, RATE_11M),
0575               PK_TYPE_11B, &phy.field_read);
0576 
0577     swap(phy.swap[0], phy.swap[1]);
0578 
0579     iowrite32(phy.field_write, priv->port_offset + MAC_REG_RSPINF_B_11);
0580 
0581     /* RSPINF_a_6 */
0582     s_vCalculateOFDMRParameter(RATE_6M,
0583                    bb_type,
0584                    &byTxRate,
0585                    &byRsvTime);
0586     iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_6);
0587     /* RSPINF_a_9 */
0588     s_vCalculateOFDMRParameter(RATE_9M,
0589                    bb_type,
0590                    &byTxRate,
0591                    &byRsvTime);
0592     iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_9);
0593     /* RSPINF_a_12 */
0594     s_vCalculateOFDMRParameter(RATE_12M,
0595                    bb_type,
0596                    &byTxRate,
0597                    &byRsvTime);
0598     iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_12);
0599     /* RSPINF_a_18 */
0600     s_vCalculateOFDMRParameter(RATE_18M,
0601                    bb_type,
0602                    &byTxRate,
0603                    &byRsvTime);
0604     iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_18);
0605     /* RSPINF_a_24 */
0606     s_vCalculateOFDMRParameter(RATE_24M,
0607                    bb_type,
0608                    &byTxRate,
0609                    &byRsvTime);
0610     iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_24);
0611     /* RSPINF_a_36 */
0612     s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate((void *)priv,
0613                                RATE_36M),
0614                    bb_type,
0615                    &byTxRate,
0616                    &byRsvTime);
0617     iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_36);
0618     /* RSPINF_a_48 */
0619     s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate((void *)priv,
0620                                RATE_48M),
0621                    bb_type,
0622                    &byTxRate,
0623                    &byRsvTime);
0624     iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_48);
0625     /* RSPINF_a_54 */
0626     s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate((void *)priv,
0627                                RATE_54M),
0628                    bb_type,
0629                    &byTxRate,
0630                    &byRsvTime);
0631     iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_54);
0632     /* RSPINF_a_72 */
0633     s_vCalculateOFDMRParameter(CARDwGetOFDMControlRate((void *)priv,
0634                                RATE_54M),
0635                    bb_type,
0636                    &byTxRate,
0637                    &byRsvTime);
0638     iowrite16(MAKEWORD(byTxRate, byRsvTime), priv->port_offset + MAC_REG_RSPINF_A_72);
0639     /* Set to Page0 */
0640     MACvSelectPage0(priv->port_offset);
0641 
0642     spin_unlock_irqrestore(&priv->lock, flags);
0643 }
0644 
0645 void CARDvUpdateBasicTopRate(struct vnt_private *priv)
0646 {
0647     unsigned char byTopOFDM = RATE_24M, byTopCCK = RATE_1M;
0648     unsigned char ii;
0649 
0650     /* Determines the highest basic rate. */
0651     for (ii = RATE_54M; ii >= RATE_6M; ii--) {
0652         if ((priv->basic_rates) & ((u32)(1 << ii))) {
0653             byTopOFDM = ii;
0654             break;
0655         }
0656     }
0657     priv->byTopOFDMBasicRate = byTopOFDM;
0658 
0659     for (ii = RATE_11M;; ii--) {
0660         if ((priv->basic_rates) & ((u32)(1 << ii))) {
0661             byTopCCK = ii;
0662             break;
0663         }
0664         if (ii == RATE_1M)
0665             break;
0666     }
0667     priv->byTopCCKBasicRate = byTopCCK;
0668 }
0669 
0670 bool CARDbIsOFDMinBasicRate(struct vnt_private *priv)
0671 {
0672     int ii;
0673 
0674     for (ii = RATE_54M; ii >= RATE_6M; ii--) {
0675         if ((priv->basic_rates) & ((u32)BIT(ii)))
0676             return true;
0677     }
0678     return false;
0679 }
0680 
0681 unsigned char CARDbyGetPktType(struct vnt_private *priv)
0682 {
0683     if (priv->byBBType == BB_TYPE_11A || priv->byBBType == BB_TYPE_11B)
0684         return (unsigned char)priv->byBBType;
0685     else if (CARDbIsOFDMinBasicRate((void *)priv))
0686         return PK_TYPE_11GA;
0687     else
0688         return PK_TYPE_11GB;
0689 }
0690 
0691 /*
0692  * Description: Calculate TSF offset of two TSF input
0693  *              Get TSF Offset from RxBCN's TSF and local TSF
0694  *
0695  * Parameters:
0696  *  In:
0697  *      priv         - The adapter to be sync.
0698  *      qwTSF1          - Rx BCN's TSF
0699  *      qwTSF2          - Local TSF
0700  *  Out:
0701  *      none
0702  *
0703  * Return Value: TSF Offset value
0704  */
0705 u64 CARDqGetTSFOffset(unsigned char byRxRate, u64 qwTSF1, u64 qwTSF2)
0706 {
0707     unsigned short wRxBcnTSFOffst;
0708 
0709     wRxBcnTSFOffst = cwRXBCNTSFOff[byRxRate % MAX_RATE];
0710 
0711     qwTSF2 += (u64)wRxBcnTSFOffst;
0712 
0713     return qwTSF1 - qwTSF2;
0714 }
0715 
0716 /*
0717  * Description: Read NIC TSF counter
0718  *              Get local TSF counter
0719  *
0720  * Parameters:
0721  *  In:
0722  *      priv         - The adapter to be read
0723  *  Out:
0724  *      none
0725  *
0726  * Return Value: Current TSF counter
0727  */
0728 u64 vt6655_get_current_tsf(struct vnt_private *priv)
0729 {
0730     void __iomem *iobase = priv->port_offset;
0731     unsigned short ww;
0732     unsigned char data;
0733     u32 low, high;
0734 
0735     vt6655_mac_reg_bits_on(iobase, MAC_REG_TFTCTL, TFTCTL_TSFCNTRRD);
0736     for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
0737         data = ioread8(iobase + MAC_REG_TFTCTL);
0738         if (!(data & TFTCTL_TSFCNTRRD))
0739             break;
0740     }
0741     if (ww == W_MAX_TIMEOUT)
0742         return 0;
0743     low = ioread32(iobase + MAC_REG_TSFCNTR);
0744     high = ioread32(iobase + MAC_REG_TSFCNTR + 4);
0745     return le64_to_cpu(low + ((u64)high << 32));
0746 }
0747 
0748 /*
0749  * Description: Read NIC TSF counter
0750  *              Get NEXTTBTT from adjusted TSF and Beacon Interval
0751  *
0752  * Parameters:
0753  *  In:
0754  *      qwTSF           - Current TSF counter
0755  *      wbeaconInterval - Beacon Interval
0756  *  Out:
0757  *      qwCurrTSF       - Current TSF counter
0758  *
0759  * Return Value: TSF value of next Beacon
0760  */
0761 u64 CARDqGetNextTBTT(u64 qwTSF, unsigned short wBeaconInterval)
0762 {
0763     u32 beacon_int;
0764 
0765     beacon_int = wBeaconInterval * 1024;
0766     if (beacon_int) {
0767         do_div(qwTSF, beacon_int);
0768         qwTSF += 1;
0769         qwTSF *= beacon_int;
0770     }
0771 
0772     return qwTSF;
0773 }
0774 
0775 /*
0776  * Description: Set NIC TSF counter for first Beacon time
0777  *              Get NEXTTBTT from adjusted TSF and Beacon Interval
0778  *
0779  * Parameters:
0780  *  In:
0781  *      iobase          - IO Base
0782  *      wBeaconInterval - Beacon Interval
0783  *  Out:
0784  *      none
0785  *
0786  * Return Value: none
0787  */
0788 void CARDvSetFirstNextTBTT(struct vnt_private *priv,
0789                unsigned short wBeaconInterval)
0790 {
0791     void __iomem *iobase = priv->port_offset;
0792     u64 qwNextTBTT;
0793 
0794     qwNextTBTT = vt6655_get_current_tsf(priv); /* Get Local TSF counter */
0795 
0796     qwNextTBTT = CARDqGetNextTBTT(qwNextTBTT, wBeaconInterval);
0797     /* Set NextTBTT */
0798     qwNextTBTT =  le64_to_cpu(qwNextTBTT);
0799     iowrite32((u32)qwNextTBTT, iobase + MAC_REG_NEXTTBTT);
0800     iowrite32((u32)(qwNextTBTT >> 32), iobase + MAC_REG_NEXTTBTT + 4);
0801     vt6655_mac_reg_bits_on(iobase, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
0802 }
0803 
0804 /*
0805  * Description: Sync NIC TSF counter for Beacon time
0806  *              Get NEXTTBTT and write to HW
0807  *
0808  * Parameters:
0809  *  In:
0810  *      priv         - The adapter to be set
0811  *      qwTSF           - Current TSF counter
0812  *      wBeaconInterval - Beacon Interval
0813  *  Out:
0814  *      none
0815  *
0816  * Return Value: none
0817  */
0818 void CARDvUpdateNextTBTT(struct vnt_private *priv, u64 qwTSF,
0819              unsigned short wBeaconInterval)
0820 {
0821     void __iomem *iobase = priv->port_offset;
0822 
0823     qwTSF = CARDqGetNextTBTT(qwTSF, wBeaconInterval);
0824     /* Set NextTBTT */
0825     qwTSF =  le64_to_cpu(qwTSF);
0826     iowrite32((u32)qwTSF, iobase + MAC_REG_NEXTTBTT);
0827     iowrite32((u32)(qwTSF >> 32), iobase + MAC_REG_NEXTTBTT + 4);
0828     vt6655_mac_reg_bits_on(iobase, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN);
0829     pr_debug("Card:Update Next TBTT[%8llx]\n", qwTSF);
0830 }
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