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OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /******************************************************************************
0003  *
0004  * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved.
0005  *
0006  * Modifications for inclusion into the Linux staging tree are
0007  * Copyright(c) 2010 Larry Finger. All rights reserved.
0008  *
0009  * Contact information:
0010  * WLAN FAE <wlanfae@realtek.com>
0011  * Larry Finger <Larry.Finger@lwfinger.net>
0012  *
0013  ******************************************************************************/
0014 #ifndef __RTL871X_PWRCTRL_H_
0015 #define __RTL871X_PWRCTRL_H_
0016 
0017 #include "osdep_service.h"
0018 #include "drv_types.h"
0019 
0020 #define CMD_ALIVE   BIT(2)
0021 
0022 enum Power_Mgnt {
0023     PS_MODE_ACTIVE  = 0,
0024     PS_MODE_MIN,
0025     PS_MODE_MAX,
0026     PS_MODE_DTIM,
0027     PS_MODE_VOIP,
0028     PS_MODE_UAPSD_WMM,
0029     PS_MODE_UAPSD,
0030     PS_MODE_IBSS,
0031     PS_MODE_WWLAN,
0032     PM_Radio_Off,
0033     PM_Card_Disable,
0034     PS_MODE_NUM
0035 };
0036 
0037 /*
0038  * BIT[2:0] = HW state
0039  * BIT[3] = Protocol PS state, 0: register active state,
0040  *              1: register sleep state
0041  * BIT[4] = sub-state
0042  */
0043 
0044 #define     PS_DPS              BIT(0)
0045 #define     PS_LCLK             (PS_DPS)
0046 #define PS_RF_OFF           BIT(1)
0047 #define PS_ALL_ON           BIT(2)
0048 #define PS_ST_ACTIVE        BIT(3)
0049 #define PS_LP               BIT(4)  /* low performance */
0050 
0051 #define PS_STATE_MASK       (0x0F)
0052 #define PS_STATE_HW_MASK    (0x07)
0053 #define     PS_SEQ_MASK     (0xc0)
0054 
0055 #define PS_STATE(x)         (PS_STATE_MASK & (x))
0056 #define PS_STATE_HW(x)  (PS_STATE_HW_MASK & (x))
0057 #define PS_SEQ(x)           (PS_SEQ_MASK & (x))
0058 
0059 #define PS_STATE_S0     (PS_DPS)
0060 #define     PS_STATE_S1     (PS_LCLK)
0061 #define PS_STATE_S2     (PS_RF_OFF)
0062 #define     PS_STATE_S3     (PS_ALL_ON)
0063 #define PS_STATE_S4     ((PS_ST_ACTIVE) | (PS_ALL_ON))
0064 
0065 #define     PS_IS_RF_ON(x)      ((x) & (PS_ALL_ON))
0066 #define     PS_IS_ACTIVE(x)     ((x) & (PS_ST_ACTIVE))
0067 #define     CLR_PS_STATE(x) ((x) = ((x) & (0xF0)))
0068 
0069 struct reportpwrstate_parm {
0070     unsigned char mode;
0071     unsigned char state; /* the CPWM value */
0072     unsigned short rsvd;
0073 };
0074 
0075 struct  pwrctrl_priv {
0076     struct mutex mutex_lock;
0077     /*volatile*/ u8 rpwm; /* requested power state for fw */
0078     /* fw current power state. updated when 1. read from HCPWM or
0079      * 2. driver lowers power level
0080      */
0081     /*volatile*/ u8 cpwm;
0082     /*volatile*/ u8 tog; /* toggling */
0083     /*volatile*/ u8 cpwm_tog; /* toggling */
0084     /*volatile*/ u8 tgt_rpwm; /* wanted power state */
0085     uint pwr_mode;
0086     uint smart_ps;
0087     uint alives;
0088     uint ImrContent;    /* used to store original imr. */
0089     uint bSleep; /* sleep -> active is different from active -> sleep. */
0090 
0091     struct work_struct SetPSModeWorkItem;
0092     struct work_struct rpwm_workitem;
0093     struct timer_list rpwm_check_timer;
0094     u8  rpwm_retry;
0095     uint    bSetPSModeWorkItemInProgress;
0096 
0097     spinlock_t pnp_pwr_mgnt_lock;
0098     s32 pnp_current_pwr_state;
0099     u8  pnp_bstop_trx;
0100     u8  pnp_wwirp_pending;
0101 };
0102 
0103 void r8712_init_pwrctrl_priv(struct _adapter *adapter);
0104 int r8712_register_cmd_alive(struct _adapter *padapter);
0105 void r8712_unregister_cmd_alive(struct _adapter *padapter);
0106 void r8712_cpwm_int_hdl(struct _adapter *padapter,
0107             struct reportpwrstate_parm *preportpwrstate);
0108 void r8712_set_ps_mode(struct _adapter *padapter, uint ps_mode,
0109             uint smart_ps);
0110 void r8712_set_rpwm(struct _adapter *padapter, u8 val8);
0111 void r8712_flush_rwctrl_works(struct _adapter *padapter);
0112 
0113 #endif  /* __RTL871X_PWRCTRL_H_ */