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0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /******************************************************************************
0003  *
0004  * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved.
0005  *
0006  * Modifications for inclusion into the Linux staging tree are
0007  * Copyright(c) 2010 Larry Finger. All rights reserved.
0008  *
0009  * Contact information:
0010  * WLAN FAE <wlanfae@realtek.com>
0011  * Larry Finger <Larry.Finger@lwfinger.net>
0012  *
0013  ******************************************************************************/
0014 #ifndef _RTL871X_IO_H_
0015 #define _RTL871X_IO_H_
0016 
0017 #include "osdep_service.h"
0018 #include "osdep_intf.h"
0019 
0020 #define NUM_IOREQ       8
0021 
0022 #define MAX_PROT_SZ (64-16)
0023 
0024 #define _IOREADY            0
0025 #define _IO_WAIT_COMPLETE   1
0026 #define _IO_WAIT_RSP        2
0027 
0028 /* IO COMMAND TYPE */
0029 #define _IOSZ_MASK_     (0x7F)
0030 #define _IO_WRITE_      BIT(7)
0031 #define _IO_FIXED_      BIT(8)
0032 #define _IO_BURST_      BIT(9)
0033 #define _IO_BYTE_       BIT(10)
0034 #define _IO_HW_         BIT(11)
0035 #define _IO_WORD_       BIT(12)
0036 #define _IO_SYNC_       BIT(13)
0037 #define _IO_CMDMASK_    (0x1F80)
0038 
0039 /*
0040  *  For prompt mode accessing, caller shall free io_req
0041  *  Otherwise, io_handler will free io_req
0042  */
0043 /* IO STATUS TYPE */
0044 #define _IO_ERR_        BIT(2)
0045 #define _IO_SUCCESS_    BIT(1)
0046 #define _IO_DONE_       BIT(0)
0047 #define IO_RD32         (_IO_SYNC_ | _IO_WORD_)
0048 #define IO_RD16         (_IO_SYNC_ | _IO_HW_)
0049 #define IO_RD8          (_IO_SYNC_ | _IO_BYTE_)
0050 #define IO_RD32_ASYNC   (_IO_WORD_)
0051 #define IO_RD16_ASYNC   (_IO_HW_)
0052 #define IO_RD8_ASYNC    (_IO_BYTE_)
0053 #define IO_WR32         (_IO_WRITE_ | _IO_SYNC_ | _IO_WORD_)
0054 #define IO_WR16         (_IO_WRITE_ | _IO_SYNC_ | _IO_HW_)
0055 #define IO_WR8          (_IO_WRITE_ | _IO_SYNC_ | _IO_BYTE_)
0056 #define IO_WR32_ASYNC   (_IO_WRITE_ | _IO_WORD_)
0057 #define IO_WR16_ASYNC   (_IO_WRITE_ | _IO_HW_)
0058 #define IO_WR8_ASYNC    (_IO_WRITE_ | _IO_BYTE_)
0059 /*
0060  *  Only Sync. burst accessing is provided.
0061  */
0062 #define IO_WR_BURST(x)      (IO_WRITE_ | _IO_SYNC_ | _IO_BURST_ | \
0063                 ((x) & _IOSZ_MASK_))
0064 #define IO_RD_BURST(x)      (_IO_SYNC_ | _IO_BURST_ | ((x) & _IOSZ_MASK_))
0065 /*below is for the intf_option bit defition...*/
0066 #define _INTF_ASYNC_    BIT(0)  /*support async io*/
0067 struct intf_priv;
0068 struct  intf_hdl;
0069 struct io_queue;
0070 struct  _io_ops {
0071     uint (*_sdbus_read_bytes_to_membuf)(struct intf_priv *pintfpriv,
0072                         u32 addr, u32 cnt, u8 *pbuf);
0073     uint (*_sdbus_read_blocks_to_membuf)(struct intf_priv *pintfpriv,
0074                          u32 addr, u32 cnt, u8 *pbuf);
0075     u8 (*_read8)(struct intf_hdl *pintfhdl, u32 addr);
0076     u16 (*_read16)(struct intf_hdl *pintfhdl, u32 addr);
0077     u32 (*_read32)(struct intf_hdl *pintfhdl, u32 addr);
0078     uint (*_sdbus_write_blocks_from_membuf)(struct intf_priv *pintfpriv,
0079                         u32 addr, u32 cnt, u8 *pbuf,
0080                         u8 async);
0081     uint (*_sdbus_write_bytes_from_membuf)(struct intf_priv *pintfpriv,
0082                            u32 addr, u32 cnt, u8 *pbuf);
0083     u8 (*_cmd52r)(struct intf_priv *pintfpriv, u32 addr);
0084     void (*_cmd52w)(struct intf_priv *pintfpriv, u32 addr, u8 val8);
0085     u8 (*_cmdfunc152r)(struct intf_priv *pintfpriv, u32 addr);
0086     void (*_cmdfunc152w)(struct intf_priv *pintfpriv, u32 addr, u8 val8);
0087     void (*_write8)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
0088     void (*_write16)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
0089     void (*_write32)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
0090     void (*_read_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt,
0091               u8 *pmem);
0092     void (*_write_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt,
0093                u8 *pmem);
0094     void (*_sync_irp_protocol_rw)(struct io_queue *pio_q);
0095     u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt,
0096               u8 *pmem);
0097     u32 (*_write_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt,
0098                u8 *pmem);
0099 };
0100 
0101 struct io_req {
0102     struct list_head list;
0103     u32 addr;
0104     /*volatile*/ u32    val;
0105     u32 command;
0106     u32 status;
0107     u8  *pbuf;
0108     void (*_async_io_callback)(struct _adapter *padapter,
0109                    struct io_req *pio_req, u8 *cnxt);
0110     u8 *cnxt;
0111 };
0112 
0113 struct  intf_hdl {
0114     u32 intf_option;
0115     u8  *adapter;
0116     u8  *intf_dev;
0117     struct intf_priv    *pintfpriv;
0118     void (*intf_hdl_init)(u8 *priv);
0119     void (*intf_hdl_unload)(u8 *priv);
0120     void (*intf_hdl_open)(u8 *priv);
0121     void (*intf_hdl_close)(u8 *priv);
0122     struct  _io_ops io_ops;
0123 };
0124 
0125 struct reg_protocol_rd {
0126 #ifdef __LITTLE_ENDIAN
0127     /* DW1 */
0128     u32     NumOfTrans:4;
0129     u32     Reserved1:4;
0130     u32     Reserved2:24;
0131     /* DW2 */
0132     u32     ByteCount:7;
0133     u32     WriteEnable:1;      /*0:read, 1:write*/
0134     u32     FixOrContinuous:1;  /*0:continuous, 1: Fix*/
0135     u32     BurstMode:1;
0136     u32     Byte1Access:1;
0137     u32     Byte2Access:1;
0138     u32     Byte4Access:1;
0139     u32     Reserved3:3;
0140     u32     Reserved4:16;
0141     /*DW3*/
0142     u32     BusAddress;
0143     /*DW4*/
0144 #else
0145 /*DW1*/
0146     u32 Reserved1:4;
0147     u32 NumOfTrans:4;
0148     u32 Reserved2:24;
0149     /*DW2*/
0150     u32 WriteEnable:1;
0151     u32 ByteCount:7;
0152     u32 Reserved3:3;
0153     u32 Byte4Access:1;
0154     u32 Byte2Access:1;
0155     u32 Byte1Access:1;
0156     u32 BurstMode:1;
0157     u32 FixOrContinuous:1;
0158     u32 Reserved4:16;
0159     /*DW3*/
0160     u32 BusAddress;
0161     /*DW4*/
0162 #endif
0163 };
0164 
0165 struct reg_protocol_wt {
0166 #ifdef __LITTLE_ENDIAN
0167     /*DW1*/
0168     u32 NumOfTrans:4;
0169     u32 Reserved1:4;
0170     u32 Reserved2:24;
0171     /*DW2*/
0172     u32 ByteCount:7;
0173     u32 WriteEnable:1;  /*0:read, 1:write*/
0174     u32 FixOrContinuous:1;  /*0:continuous, 1: Fix*/
0175     u32 BurstMode:1;
0176     u32 Byte1Access:1;
0177     u32 Byte2Access:1;
0178     u32 Byte4Access:1;
0179     u32 Reserved3:3;
0180     u32 Reserved4:16;
0181     /*DW3*/
0182     u32 BusAddress;
0183     /*DW4*/
0184     u32 Value;
0185 #else
0186     /*DW1*/
0187     u32 Reserved1:4;
0188     u32 NumOfTrans:4;
0189     u32 Reserved2:24;
0190     /*DW2*/
0191     u32 WriteEnable:1;
0192     u32 ByteCount:7;
0193     u32 Reserved3:3;
0194     u32 Byte4Access:1;
0195     u32 Byte2Access:1;
0196     u32 Byte1Access:1;
0197     u32 BurstMode:1;
0198     u32 FixOrContinuous:1;
0199     u32 Reserved4:16;
0200     /*DW3*/
0201     u32 BusAddress;
0202     /*DW4*/
0203     u32 Value;
0204 #endif
0205 };
0206 
0207 /*
0208  * Below is the data structure used by _io_handler
0209  */
0210 
0211 struct io_queue {
0212     spinlock_t lock;
0213     struct list_head free_ioreqs;
0214     /*The io_req list that will be served in the single protocol r/w.*/
0215     struct list_head pending;
0216     struct list_head processing;
0217     u8 *free_ioreqs_buf; /* 4-byte aligned */
0218     u8 *pallocated_free_ioreqs_buf;
0219     struct  intf_hdl intf;
0220 };
0221 
0222 u8 r8712_read8(struct _adapter *adapter, u32 addr);
0223 u16 r8712_read16(struct _adapter *adapter, u32 addr);
0224 u32 r8712_read32(struct _adapter *adapter, u32 addr);
0225 void r8712_read_mem(struct _adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
0226 void r8712_read_port(struct _adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
0227 void r8712_write8(struct _adapter *adapter, u32 addr, u8 val);
0228 void r8712_write16(struct _adapter *adapter, u32 addr, u16 val);
0229 void r8712_write32(struct _adapter *adapter, u32 addr, u32 val);
0230 void r8712_write_mem(struct _adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
0231 void r8712_write_port(struct _adapter *adapter, u32 addr, u32 cnt, u8 *pmem);
0232 /*ioreq */
0233 uint r8712_alloc_io_queue(struct _adapter *adapter);
0234 void r8712_free_io_queue(struct _adapter *adapter);
0235 
0236 #endif  /*_RTL871X_IO_H_*/