staging/rtl8712/rtl8712_hal.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /******************************************************************************
0003  *
0004  * Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved.
0005  *
0006  * Modifications for inclusion into the Linux staging tree are
0007  * Copyright(c) 2010 Larry Finger. All rights reserved.
0008  *
0009  * Contact information:
0010  * WLAN FAE <wlanfae@realtek.com>
0011  * Larry Finger <Larry.Finger@lwfinger.net>
0012  *
0013  ******************************************************************************/
0014 #ifndef __RTL8712_HAL_H__
0015 #define __RTL8712_HAL_H__
0016
0017 enum _HW_VERSION {
0018     RTL8712_FPGA,
0019     RTL8712_1stCUT, /*A Cut (RTL8712_ASIC)*/
0020     RTL8712_2ndCUT, /*B Cut*/
0021     RTL8712_3rdCUT, /*C Cut*/
0022 };
0023
0024 enum _LOOPBACK_TYPE {
0025     RTL8712_AIR_TRX = 0,
0026     RTL8712_MAC_LBK,
0027     RTL8712_BB_LBK,
0028     RTL8712_MAC_FW_LBK = 4,
0029     RTL8712_BB_FW_LBK = 8,
0030 };
0031
0032 enum RTL871X_HCI_TYPE {
0033     RTL8712_SDIO,
0034     RTL8712_USB,
0035 };
0036
0037 enum RTL8712_RF_CONFIG {
0038     RTL8712_RF_1T1R,
0039     RTL8712_RF_1T2R,
0040     RTL8712_RF_2T2R
0041 };
0042
0043 enum _RTL8712_HCI_TYPE_ {
0044     RTL8712_HCI_TYPE_PCIE = 0x01,
0045     RTL8712_HCI_TYPE_AP_PCIE = 0x81,
0046     RTL8712_HCI_TYPE_USB = 0x02,
0047     RTL8712_HCI_TYPE_92USB = 0x02,
0048     RTL8712_HCI_TYPE_AP_USB = 0x82,
0049     RTL8712_HCI_TYPE_72USB = 0x12,
0050     RTL8712_HCI_TYPE_SDIO = 0x04,
0051     RTL8712_HCI_TYPE_72SDIO = 0x14
0052 };
0053
0054 struct fw_priv {   /*8-bytes alignment required*/
0055     /*--- long word 0 ----*/
0056     unsigned char signature_0;  /*0x12: CE product, 0x92: IT product*/
0057     unsigned char signature_1;  /*0x87: CE product, 0x81: IT product*/
0058     unsigned char hci_sel; /*0x81: PCI-AP, 01:PCIe, 02: 92S-U, 0x82: USB-AP,
0059                 * 0x12: 72S-U, 03:SDIO
0060                 */
0061     unsigned char chip_version; /*the same value as register value*/
0062     unsigned char customer_ID_0; /*customer  ID low byte*/
0063     unsigned char customer_ID_1; /*customer  ID high byte*/
0064     unsigned char rf_config;  /*0x11:  1T1R, 0x12: 1T2R, 0x92: 1T2R turbo,
0065                    * 0x22: 2T2R
0066                    */
0067     unsigned char usb_ep_num;  /* 4: 4EP, 6: 6EP, 11: 11EP*/
0068     /*--- long word 1 ----*/
0069     unsigned char regulatory_class_0; /*regulatory class bit map 0*/
0070     unsigned char regulatory_class_1; /*regulatory class bit map 1*/
0071     unsigned char regulatory_class_2; /*regulatory class bit map 2*/
0072     unsigned char regulatory_class_3; /*regulatory class bit map 3*/
0073     unsigned char rfintfs;    /* 0:SWSI, 1:HWSI, 2:HWPI*/
0074     unsigned char def_nettype;
0075     unsigned char turbo_mode;
0076     unsigned char low_power_mode;/* 0: normal mode, 1: low power mode*/
0077     /*--- long word 2 ----*/
0078     unsigned char lbk_mode; /*0x00: normal, 0x03: MACLBK, 0x01: PHYLBK*/
0079     unsigned char mp_mode; /* 1: for MP use, 0: for normal driver */
0080     unsigned char vcs_type; /* 0:off 1:on 2:auto */
0081     unsigned char vcs_mode; /* 1:RTS/CTS 2:CTS to self */
0082     unsigned char rsvd022;
0083     unsigned char rsvd023;
0084     unsigned char rsvd024;
0085     unsigned char rsvd025;
0086     /*--- long word 3 ----*/
0087     unsigned char qos_en;    /*1: QoS enable*/
0088     unsigned char bw_40MHz_en;   /*1: 40MHz BW enable*/
0089     unsigned char AMSDU2AMPDU_en;   /*1: 4181 convert AMSDU to AMPDU,
0090                      * 0: disable
0091                      */
0092     unsigned char AMPDU_en;   /*1: 11n AMPDU enable*/
0093     unsigned char rate_control_offload; /*1: FW offloads,0: driver handles*/
0094     unsigned char aggregation_offload;  /*1: FW offloads,0: driver handles*/
0095     unsigned char rsvd030;
0096     unsigned char rsvd031;
0097     /*--- long word 4 ----*/
0098     unsigned char beacon_offload;   /* 1. FW offloads, 0: driver handles*/
0099     unsigned char MLME_offload;   /* 2. FW offloads, 0: driver handles*/
0100     unsigned char hwpc_offload;   /* 3. FW offloads, 0: driver handles*/
0101     unsigned char tcp_checksum_offload; /*4. FW offloads,0: driver handles*/
0102     unsigned char tcp_offload;    /* 5. FW offloads, 0: driver handles*/
0103     unsigned char ps_control_offload; /* 6. FW offloads, 0: driver handles*/
0104     unsigned char WWLAN_offload;   /* 7. FW offloads, 0: driver handles*/
0105     unsigned char rsvd040;
0106     /*--- long word 5 ----*/
0107     unsigned char tcp_tx_frame_len_L;  /*tcp tx packet length low byte*/
0108     unsigned char tcp_tx_frame_len_H;  /*tcp tx packet length high byte*/
0109     unsigned char tcp_rx_frame_len_L;  /*tcp rx packet length low byte*/
0110     unsigned char tcp_rx_frame_len_H;  /*tcp rx packet length high byte*/
0111     unsigned char rsvd050;
0112     unsigned char rsvd051;
0113     unsigned char rsvd052;
0114     unsigned char rsvd053;
0115 };
0116
0117 struct fw_hdr {/*8-byte alignment required*/
0118     unsigned short  signature;
0119     unsigned short  version;    /* 0x8000 ~ 0x8FFF for FPGA version,
0120                      * 0x0000 ~ 0x7FFF for ASIC version,
0121                      */
0122     unsigned int        dmem_size;    /*define the size of boot loader*/
0123     unsigned int        img_IMEM_size; /*define the size of FW in IMEM*/
0124     unsigned int        img_SRAM_size; /*define the size of FW in SRAM*/
0125     unsigned int        fw_priv_sz; /*define the size of DMEM variable*/
0126     unsigned short  efuse_addr;
0127     unsigned short  h2ccnd_resp_addr;
0128     unsigned int        SVNRevision;
0129     unsigned int        release_time; /*Mon:Day:Hr:Min*/
0130     struct fw_priv  fwpriv;
0131 };
0132
0133 struct hal_priv {
0134     /*Endpoint handles*/
0135     struct  net_device *pipehdls_r8712[10];
0136     u8 (*hal_bus_init)(struct _adapter *adapter);
0137 };
0138
0139 uint     rtl8712_hal_init(struct _adapter *padapter);
0140 int rtl871x_load_fw(struct _adapter *padapter);
0141
0142 #endif