staging/rtl8192u/r8192U_dm.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*****************************************************************************
0003  *  Copyright(c) 2007,  RealTEK Technology Inc. All Right Reserved.
0004  *
0005  * Module:      Hal819xUsbDM.h  (RTL8192  Header H File)
0006  *
0007  *
0008  * Note:        For dynamic control definition constant structure.
0009  *
0010  *
0011  * Export:
0012  *
0013  * Abbrev:
0014  *
0015  * History:
0016  *  Data        Who     Remark
0017  *  10/04/2007  MHC     Create initial version.
0018  *
0019  *****************************************************************************/
0020  /* Check to see if the file has been included already.  */
0021 #ifndef __R8192UDM_H__
0022 #define __R8192UDM_H__
0023
0024 /*--------------------------Define Parameters-------------------------------*/
0025 #define         DM_DIG_THRESH_HIGH                      40
0026 #define         DM_DIG_THRESH_LOW                       35
0027
0028 #define         DM_DIG_HIGH_PWR_THRESH_HIGH             75
0029 #define         DM_DIG_HIGH_PWR_THRESH_LOW              70
0030
0031 #define         BW_AUTO_SWITCH_HIGH_LOW                 25
0032 #define         BW_AUTO_SWITCH_LOW_HIGH                 30
0033
0034 #define         DM_DIG_BACKOFF                          12
0035 #define         DM_DIG_MAX                            0x36
0036 #define         DM_DIG_MIN                            0x1c
0037 #define         DM_DIG_MIN_NETCORE                    0x12
0038
0039 #define         RX_PATH_SELECTION_SS_TH_LOW             30
0040 #define         RX_PATH_SELECTION_DIFF_TH               18
0041
0042 #define         RATE_ADAPTIVE_TH_HIGH                   50
0043 #define         RATE_ADAPTIVE_TH_LOW_20M                30
0044 #define         RATE_ADAPTIVE_TH_LOW_40M                10
0045 #define         VERY_LOW_RSSI                           15
0046 #define         CTS_TO_SELF_TH_VAL                      30
0047
0048 /* defined by vivi, for tx power track */
0049 #define         E_FOR_TX_POWER_TRACK                   300
0050 /* Dynamic Tx Power Control Threshold */
0051 #define         TX_POWER_NEAR_FIELD_THRESH_HIGH         68
0052 #define         TX_POWER_NEAR_FIELD_THRESH_LOW          62
0053 /* added by amy for atheros AP */
0054 #define         TX_POWER_ATHEROAP_THRESH_HIGH           78
0055 #define         TX_POWER_ATHEROAP_THRESH_LOW            72
0056
0057 /* defined by vivi, for showing on UI */
0058 #define         CURRENT_TX_RATE_REG                  0x1b8
0059 #define         INITIAL_TX_RATE_REG                  0x1b9
0060 #define         TX_RETRY_COUNT_REG                   0x1ac
0061 #define         REG_C38_TH                              20
0062 /*--------------------------Define Parameters-------------------------------*/
0063
0064 /*------------------------------Define structure----------------------------*/
0065
0066 enum dig_algorithm {
0067     DIG_ALGO_BY_FALSE_ALARM = 0,
0068     DIG_ALGO_BY_RSSI    = 1,
0069 };
0070
0071 enum dynamic_init_gain_state {
0072     DM_STA_DIG_OFF = 0,
0073     DM_STA_DIG_ON,
0074     DM_STA_DIG_MAX
0075 };
0076
0077 enum dig_connect {
0078     DIG_DISCONNECT = 0,
0079     DIG_CONNECT    = 1,
0080 };
0081
0082 enum dig_pkt_detection_threshold {
0083     DIG_PD_AT_LOW_POWER    = 0,
0084     DIG_PD_AT_NORMAL_POWER = 1,
0085     DIG_PD_AT_HIGH_POWER   = 2,
0086 };
0087
0088 enum dig_cck_cs_ratio_state {
0089     DIG_CS_RATIO_LOWER  = 0,
0090     DIG_CS_RATIO_HIGHER = 1,
0091 };
0092
0093 /* 2007/10/04 MH Define upper and lower threshold of DIG enable or disable. */
0094 struct dig {
0095     u8                                 dig_enable_flag;
0096     enum dig_algorithm                 dig_algorithm;
0097     u8                                 dig_algorithm_switch;
0098
0099     long                               rssi_low_thresh;
0100     long                               rssi_high_thresh;
0101
0102     long                               rssi_high_power_lowthresh;
0103     long                               rssi_high_power_highthresh;
0104
0105     enum dynamic_init_gain_state       dig_state;
0106     enum dynamic_init_gain_state       dig_highpwr_state;
0107     enum dig_connect                   cur_connect_state;
0108     enum dig_connect                   pre_connect_state;
0109
0110     enum dig_pkt_detection_threshold   curpd_thstate;
0111     enum dig_pkt_detection_threshold   prepd_thstate;
0112     enum dig_cck_cs_ratio_state        curcs_ratio_state;
0113     enum dig_cck_cs_ratio_state        precs_ratio_state;
0114
0115     u32                                pre_ig_value;
0116     u32                                cur_ig_value;
0117
0118     u8                                 backoff_val;
0119     u8                                 rx_gain_range_min;
0120
0121     long                               rssi_val;
0122 };
0123
0124 enum cck_rx_path_method {
0125     CCK_RX_VERSION_1 = 0,
0126     CCK_RX_VERSION_2 = 1,
0127 };
0128
0129 struct dynamic_rx_path_sel {
0130     enum cck_rx_path_method            cck_method;
0131     u8                                 cck_rx_path;
0132
0133     u8                                 disabled_rf;
0134
0135     u8                                 rf_rssi[4];
0136     u8                                 rf_enable_rssi_th[4];
0137     long                               cck_pwdb_sta[4];
0138 };
0139
0140 struct tx_config_cmd {
0141     u32     cmd_op;        /* Command packet type. */
0142     u32     cmd_length;    /* Command packet length. */
0143     u32     cmd_value;
0144 };
0145
0146 /*------------------------------Define structure----------------------------*/
0147
0148 /*------------------------Export global variable----------------------------*/
0149 extern struct dig dm_digtable;
0150 extern u8 dm_shadow[16][256];
0151 /*------------------------Export global variable----------------------------*/
0152
0153 /*------------------------Export Marco Definition---------------------------*/
0154
0155 /*------------------------Export Marco Definition---------------------------*/
0156
0157 /*--------------------------Exported Function prototype---------------------*/
0158 void init_hal_dm(struct net_device *dev);
0159 void deinit_hal_dm(struct net_device *dev);
0160 void hal_dm_watchdog(struct net_device *dev);
0161 void init_rate_adaptive(struct net_device *dev);
0162 void dm_txpower_trackingcallback(struct work_struct *work);
0163 void dm_restore_dynamic_mechanism_state(struct net_device *dev);
0164 void dm_force_tx_fw_info(struct net_device *dev,
0165              u32 force_type, u32 force_value);
0166 void dm_init_edca_turbo(struct net_device *dev);
0167 void dm_rf_operation_test_callback(unsigned long data);
0168 void dm_rf_pathcheck_workitemcallback(struct work_struct *work);
0169 void dm_fsync_work_callback(struct work_struct *work);
0170 void dm_cck_txpower_adjust(struct net_device *dev, bool  binch14);
0171 void dm_shadow_init(struct net_device *dev);
0172 void dm_initialize_txpower_tracking(struct net_device *dev);
0173 /*--------------------------Exported Function prototype---------------------*/
0174
0175 #endif  /*__R8192UDM_H__ */
0176
0177 /* End of r8192U_dm.h */