media/av7110/budget-patch.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * budget-patch.c: driver for Budget Patch,
0004  * hardware modification of DVB-S cards enabling full TS
0005  *
0006  * Written by Emard <emard@softhome.net>
0007  *
0008  * Original idea by Roberto Deza <rdeza@unav.es>
0009  *
0010  * Special thanks to Holger Waechtler, Michael Hunold, Marian Durkovic
0011  * and Metzlerbros
0012  *
0013  * the project's page is at https://linuxtv.org
0014  */
0015
0016 #include "av7110.h"
0017 #include "av7110_hw.h"
0018 #include "budget.h"
0019 #include "stv0299.h"
0020 #include "ves1x93.h"
0021 #include "tda8083.h"
0022
0023 #include "bsru6.h"
0024
0025 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
0026
0027 #define budget_patch budget
0028
0029 static struct saa7146_extension budget_extension;
0030
0031 MAKE_BUDGET_INFO(ttbp, "TT-Budget/Patch DVB-S 1.x PCI", BUDGET_PATCH);
0032 //MAKE_BUDGET_INFO(satel,"TT-Budget/Patch SATELCO PCI", BUDGET_TT_HW_DISEQC);
0033
0034 static const struct pci_device_id pci_tbl[] = {
0035     MAKE_EXTENSION_PCI(ttbp,0x13c2, 0x0000),
0036 //        MAKE_EXTENSION_PCI(satel, 0x13c2, 0x1013),
0037     {
0038         .vendor    = 0,
0039     }
0040 };
0041
0042 /* those lines are for budget-patch to be tried
0043 ** on a true budget card and observe the
0044 ** behaviour of VSYNC generated by rps1.
0045 ** this code was shamelessly copy/pasted from budget.c
0046 */
0047 static void gpio_Set22K (struct budget *budget, int state)
0048 {
0049     struct saa7146_dev *dev=budget->dev;
0050     dprintk(2, "budget: %p\n", budget);
0051     saa7146_setgpio(dev, 3, (state ? SAA7146_GPIO_OUTHI : SAA7146_GPIO_OUTLO));
0052 }
0053
0054 /* Diseqc functions only for TT Budget card */
0055 /* taken from the Skyvision DVB driver by
0056    Ralph Metzler <rjkm@metzlerbros.de> */
0057
0058 static void DiseqcSendBit (struct budget *budget, int data)
0059 {
0060     struct saa7146_dev *dev=budget->dev;
0061     dprintk(2, "budget: %p\n", budget);
0062
0063     saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTHI);
0064     udelay(data ? 500 : 1000);
0065     saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
0066     udelay(data ? 1000 : 500);
0067 }
0068
0069 static void DiseqcSendByte (struct budget *budget, int data)
0070 {
0071     int i, par=1, d;
0072
0073     dprintk(2, "budget: %p\n", budget);
0074
0075     for (i=7; i>=0; i--) {
0076         d = (data>>i)&1;
0077         par ^= d;
0078         DiseqcSendBit(budget, d);
0079     }
0080
0081     DiseqcSendBit(budget, par);
0082 }
0083
0084 static int SendDiSEqCMsg (struct budget *budget, int len, u8 *msg, unsigned long burst)
0085 {
0086     struct saa7146_dev *dev=budget->dev;
0087     int i;
0088
0089     dprintk(2, "budget: %p\n", budget);
0090
0091     saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
0092     mdelay(16);
0093
0094     for (i=0; i<len; i++)
0095         DiseqcSendByte(budget, msg[i]);
0096
0097     mdelay(16);
0098
0099     if (burst!=-1) {
0100         if (burst)
0101             DiseqcSendByte(budget, 0xff);
0102         else {
0103             saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTHI);
0104             mdelay(12);
0105             udelay(500);
0106             saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
0107         }
0108         msleep(20);
0109     }
0110
0111     return 0;
0112 }
0113
0114 /* shamelessly copy/pasted from budget.c */
0115 static int budget_set_tone(struct dvb_frontend *fe,
0116                enum fe_sec_tone_mode tone)
0117 {
0118     struct budget* budget = (struct budget*) fe->dvb->priv;
0119
0120     switch (tone) {
0121     case SEC_TONE_ON:
0122         gpio_Set22K (budget, 1);
0123         break;
0124
0125     case SEC_TONE_OFF:
0126         gpio_Set22K (budget, 0);
0127         break;
0128
0129     default:
0130         return -EINVAL;
0131     }
0132
0133     return 0;
0134 }
0135
0136 static int budget_diseqc_send_master_cmd(struct dvb_frontend* fe, struct dvb_diseqc_master_cmd* cmd)
0137 {
0138     struct budget* budget = (struct budget*) fe->dvb->priv;
0139
0140     SendDiSEqCMsg (budget, cmd->msg_len, cmd->msg, 0);
0141
0142     return 0;
0143 }
0144
0145 static int budget_diseqc_send_burst(struct dvb_frontend *fe,
0146                     enum fe_sec_mini_cmd minicmd)
0147 {
0148     struct budget* budget = (struct budget*) fe->dvb->priv;
0149
0150     SendDiSEqCMsg (budget, 0, NULL, minicmd);
0151
0152     return 0;
0153 }
0154
0155 static int budget_av7110_send_fw_cmd(struct budget_patch *budget, u16* buf, int length)
0156 {
0157     int i;
0158
0159     dprintk(2, "budget: %p\n", budget);
0160
0161     for (i = 2; i < length; i++)
0162     {
0163           ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2*i, 2, (u32) buf[i], 0,0);
0164           msleep(5);
0165     }
0166     if (length)
0167           ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2, 2, (u32) buf[1], 0,0);
0168     else
0169           ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2, 2, 0, 0,0);
0170     msleep(5);
0171     ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND, 2, (u32) buf[0], 0,0);
0172     msleep(5);
0173     return 0;
0174 }
0175
0176 static void av7110_set22k(struct budget_patch *budget, int state)
0177 {
0178     u16 buf[2] = {( COMTYPE_AUDIODAC << 8) | (state ? ON22K : OFF22K), 0};
0179
0180     dprintk(2, "budget: %p\n", budget);
0181     budget_av7110_send_fw_cmd(budget, buf, 2);
0182 }
0183
0184 static int av7110_send_diseqc_msg(struct budget_patch *budget, int len, u8 *msg, int burst)
0185 {
0186     int i;
0187     u16 buf[18] = { ((COMTYPE_AUDIODAC << 8) | SendDiSEqC),
0188         16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
0189
0190     dprintk(2, "budget: %p\n", budget);
0191
0192     if (len>10)
0193         len=10;
0194
0195     buf[1] = len+2;
0196     buf[2] = len;
0197
0198     if (burst != -1)
0199         buf[3]=burst ? 0x01 : 0x00;
0200     else
0201         buf[3]=0xffff;
0202
0203     for (i=0; i<len; i++)
0204         buf[i+4]=msg[i];
0205
0206     budget_av7110_send_fw_cmd(budget, buf, 18);
0207     return 0;
0208 }
0209
0210 static int budget_patch_set_tone(struct dvb_frontend *fe,
0211                  enum fe_sec_tone_mode tone)
0212 {
0213     struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv;
0214
0215     switch (tone) {
0216     case SEC_TONE_ON:
0217         av7110_set22k (budget, 1);
0218         break;
0219
0220     case SEC_TONE_OFF:
0221         av7110_set22k (budget, 0);
0222         break;
0223
0224     default:
0225         return -EINVAL;
0226     }
0227
0228     return 0;
0229 }
0230
0231 static int budget_patch_diseqc_send_master_cmd(struct dvb_frontend* fe, struct dvb_diseqc_master_cmd* cmd)
0232 {
0233     struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv;
0234
0235     av7110_send_diseqc_msg (budget, cmd->msg_len, cmd->msg, 0);
0236
0237     return 0;
0238 }
0239
0240 static int budget_patch_diseqc_send_burst(struct dvb_frontend *fe,
0241                       enum fe_sec_mini_cmd minicmd)
0242 {
0243     struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv;
0244
0245     av7110_send_diseqc_msg (budget, 0, NULL, minicmd);
0246
0247     return 0;
0248 }
0249
0250 static int alps_bsrv2_tuner_set_params(struct dvb_frontend *fe)
0251 {
0252     struct dtv_frontend_properties *p = &fe->dtv_property_cache;
0253     struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv;
0254     u8 pwr = 0;
0255     u8 buf[4];
0256     struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) };
0257     u32 div = (p->frequency + 479500) / 125;
0258
0259     if (p->frequency > 2000000)
0260         pwr = 3;
0261     else if (p->frequency > 1800000)
0262         pwr = 2;
0263     else if (p->frequency > 1600000)
0264         pwr = 1;
0265     else if (p->frequency > 1200000)
0266         pwr = 0;
0267     else if (p->frequency >= 1100000)
0268         pwr = 1;
0269     else pwr = 2;
0270
0271     buf[0] = (div >> 8) & 0x7f;
0272     buf[1] = div & 0xff;
0273     buf[2] = ((div & 0x18000) >> 10) | 0x95;
0274     buf[3] = (pwr << 6) | 0x30;
0275
0276     // NOTE: since we're using a prescaler of 2, we set the
0277     // divisor frequency to 62.5kHz and divide by 125 above
0278
0279     if (fe->ops.i2c_gate_ctrl)
0280         fe->ops.i2c_gate_ctrl(fe, 1);
0281     if (i2c_transfer (&budget->i2c_adap, &msg, 1) != 1)
0282         return -EIO;
0283     return 0;
0284 }
0285
0286 static struct ves1x93_config alps_bsrv2_config = {
0287     .demod_address = 0x08,
0288     .xin = 90100000UL,
0289     .invert_pwm = 0,
0290 };
0291
0292 static int grundig_29504_451_tuner_set_params(struct dvb_frontend *fe)
0293 {
0294     struct dtv_frontend_properties *p = &fe->dtv_property_cache;
0295     struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv;
0296     u32 div;
0297     u8 data[4];
0298     struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
0299
0300     div = p->frequency / 125;
0301     data[0] = (div >> 8) & 0x7f;
0302     data[1] = div & 0xff;
0303     data[2] = 0x8e;
0304     data[3] = 0x00;
0305
0306     if (fe->ops.i2c_gate_ctrl)
0307         fe->ops.i2c_gate_ctrl(fe, 1);
0308     if (i2c_transfer (&budget->i2c_adap, &msg, 1) != 1)
0309         return -EIO;
0310     return 0;
0311 }
0312
0313 static struct tda8083_config grundig_29504_451_config = {
0314     .demod_address = 0x68,
0315 };
0316
0317 static void frontend_init(struct budget_patch* budget)
0318 {
0319     switch(budget->dev->pci->subsystem_device) {
0320     case 0x0000: // Hauppauge/TT WinTV DVB-S rev1.X
0321     case 0x1013: // SATELCO Multimedia PCI
0322
0323         // try the ALPS BSRV2 first of all
0324         budget->dvb_frontend = dvb_attach(ves1x93_attach, &alps_bsrv2_config, &budget->i2c_adap);
0325         if (budget->dvb_frontend) {
0326             budget->dvb_frontend->ops.tuner_ops.set_params = alps_bsrv2_tuner_set_params;
0327             budget->dvb_frontend->ops.diseqc_send_master_cmd = budget_patch_diseqc_send_master_cmd;
0328             budget->dvb_frontend->ops.diseqc_send_burst = budget_patch_diseqc_send_burst;
0329             budget->dvb_frontend->ops.set_tone = budget_patch_set_tone;
0330             break;
0331         }
0332
0333         // try the ALPS BSRU6 now
0334         budget->dvb_frontend = dvb_attach(stv0299_attach, &alps_bsru6_config, &budget->i2c_adap);
0335         if (budget->dvb_frontend) {
0336             budget->dvb_frontend->ops.tuner_ops.set_params = alps_bsru6_tuner_set_params;
0337             budget->dvb_frontend->tuner_priv = &budget->i2c_adap;
0338
0339             budget->dvb_frontend->ops.diseqc_send_master_cmd = budget_diseqc_send_master_cmd;
0340             budget->dvb_frontend->ops.diseqc_send_burst = budget_diseqc_send_burst;
0341             budget->dvb_frontend->ops.set_tone = budget_set_tone;
0342             break;
0343         }
0344
0345         // Try the grundig 29504-451
0346         budget->dvb_frontend = dvb_attach(tda8083_attach, &grundig_29504_451_config, &budget->i2c_adap);
0347         if (budget->dvb_frontend) {
0348             budget->dvb_frontend->ops.tuner_ops.set_params = grundig_29504_451_tuner_set_params;
0349             budget->dvb_frontend->ops.diseqc_send_master_cmd = budget_diseqc_send_master_cmd;
0350             budget->dvb_frontend->ops.diseqc_send_burst = budget_diseqc_send_burst;
0351             budget->dvb_frontend->ops.set_tone = budget_set_tone;
0352             break;
0353         }
0354         break;
0355     }
0356
0357     if (budget->dvb_frontend == NULL) {
0358         printk("dvb-ttpci: A frontend driver was not found for device [%04x:%04x] subsystem [%04x:%04x]\n",
0359                budget->dev->pci->vendor,
0360                budget->dev->pci->device,
0361                budget->dev->pci->subsystem_vendor,
0362                budget->dev->pci->subsystem_device);
0363     } else {
0364         if (dvb_register_frontend(&budget->dvb_adapter, budget->dvb_frontend)) {
0365             printk("budget-av: Frontend registration failed!\n");
0366             dvb_frontend_detach(budget->dvb_frontend);
0367             budget->dvb_frontend = NULL;
0368         }
0369     }
0370 }
0371
0372 /* written by Emard */
0373 static int budget_patch_attach (struct saa7146_dev* dev, struct saa7146_pci_extension_data *info)
0374 {
0375     struct budget_patch *budget;
0376     int err;
0377     int count = 0;
0378     int detected = 0;
0379
0380 #define PATCH_RESET 0
0381 #define RPS_IRQ 0
0382 #define HPS_SETUP 0
0383 #if PATCH_RESET
0384     saa7146_write(dev, MC1, MASK_31);
0385     msleep(40);
0386 #endif
0387 #if HPS_SETUP
0388     // initialize registers. Better to have it like this
0389     // than leaving something unconfigured
0390     saa7146_write(dev, DD1_STREAM_B, 0);
0391     // port B VSYNC at rising edge
0392     saa7146_write(dev, DD1_INIT, 0x00000200);  // have this in budget-core too!
0393     saa7146_write(dev, BRS_CTRL, 0x00000000);  // VBI
0394
0395     // debi config
0396     // saa7146_write(dev, DEBI_CONFIG, MASK_30|MASK_28|MASK_18);
0397
0398     // zero all HPS registers
0399     saa7146_write(dev, HPS_H_PRESCALE, 0);                  // r68
0400     saa7146_write(dev, HPS_H_SCALE, 0);                     // r6c
0401     saa7146_write(dev, BCS_CTRL, 0);                        // r70
0402     saa7146_write(dev, HPS_V_SCALE, 0);                     // r60
0403     saa7146_write(dev, HPS_V_GAIN, 0);                      // r64
0404     saa7146_write(dev, CHROMA_KEY_RANGE, 0);                // r74
0405     saa7146_write(dev, CLIP_FORMAT_CTRL, 0);                // r78
0406     // Set HPS prescaler for port B input
0407     saa7146_write(dev, HPS_CTRL, (1<<30) | (0<<29) | (1<<28) | (0<<12) );
0408     saa7146_write(dev, MC2,
0409       0 * (MASK_08 | MASK_24)  |   // BRS control
0410       0 * (MASK_09 | MASK_25)  |   // a
0411       0 * (MASK_10 | MASK_26)  |   // b
0412       1 * (MASK_06 | MASK_22)  |   // HPS_CTRL1
0413       1 * (MASK_05 | MASK_21)  |   // HPS_CTRL2
0414       0 * (MASK_01 | MASK_15)      // DEBI
0415        );
0416 #endif
0417     // Disable RPS1 and RPS0
0418     saa7146_write(dev, MC1, ( MASK_29 | MASK_28));
0419     // RPS1 timeout disable
0420     saa7146_write(dev, RPS_TOV1, 0);
0421
0422     // code for autodetection
0423     // will wait for VBI_B event (vertical blank at port B)
0424     // and will reset GPIO3 after VBI_B is detected.
0425     // (GPIO3 should be raised high by CPU to
0426     // test if GPIO3 will generate vertical blank signal
0427     // in budget patch GPIO3 is connected to VSYNC_B
0428     count = 0;
0429 #if 0
0430     WRITE_RPS1(CMD_UPLOAD |
0431       MASK_10 | MASK_09 | MASK_08 | MASK_06 | MASK_05 | MASK_04 | MASK_03 | MASK_02 );
0432 #endif
0433     WRITE_RPS1(CMD_PAUSE | EVT_VBI_B);
0434     WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2));
0435     WRITE_RPS1(GPIO3_MSK);
0436     WRITE_RPS1(SAA7146_GPIO_OUTLO<<24);
0437 #if RPS_IRQ
0438     // issue RPS1 interrupt to increment counter
0439     WRITE_RPS1(CMD_INTERRUPT);
0440     // at least a NOP is neede between two interrupts
0441     WRITE_RPS1(CMD_NOP);
0442     // interrupt again
0443     WRITE_RPS1(CMD_INTERRUPT);
0444 #endif
0445     WRITE_RPS1(CMD_STOP);
0446
0447 #if RPS_IRQ
0448     // set event counter 1 source as RPS1 interrupt (0x03)          (rE4 p53)
0449     // use 0x03 to track RPS1 interrupts - increase by 1 every gpio3 is toggled
0450     // use 0x15 to track VPE  interrupts - increase by 1 every vpeirq() is called
0451     saa7146_write(dev, EC1SSR, (0x03<<2) | 3 );
0452     // set event counter 1 threshold to maximum allowed value        (rEC p55)
0453     saa7146_write(dev, ECT1R,  0x3fff );
0454 #endif
0455     // Fix VSYNC level
0456     saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
0457     // Set RPS1 Address register to point to RPS code               (r108 p42)
0458     saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);
0459     // Enable RPS1,                                                 (rFC p33)
0460     saa7146_write(dev, MC1, (MASK_13 | MASK_29 ));
0461
0462
0463     mdelay(50);
0464     saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTHI);
0465     mdelay(150);
0466
0467
0468     if( (saa7146_read(dev, GPIO_CTRL) & 0x10000000) == 0)
0469         detected = 1;
0470
0471 #if RPS_IRQ
0472     printk("Event Counter 1 0x%04x\n", saa7146_read(dev, EC1R) & 0x3fff );
0473 #endif
0474     // Disable RPS1
0475     saa7146_write(dev, MC1, ( MASK_29 ));
0476
0477     if(detected == 0)
0478         printk("budget-patch not detected or saa7146 in non-default state.\n"
0479                "try enabling resetting of 7146 with MASK_31 in MC1 register\n");
0480
0481     else
0482         printk("BUDGET-PATCH DETECTED.\n");
0483
0484
0485 /*      OLD (Original design by Roberto Deza):
0486 **      This code will setup the SAA7146_RPS1 to generate a square
0487 **      wave on GPIO3, changing when a field (TS_HEIGHT/2 "lines" of
0488 **      TS_WIDTH packets) has been acquired on SAA7146_D1B video port;
0489 **      then, this GPIO3 output which is connected to the D1B_VSYNC
0490 **      input, will trigger the acquisition of the alternate field
0491 **      and so on.
0492 **      Currently, the TT_budget / WinTV_Nova cards have two ICs
0493 **      (74HCT4040, LVC74) for the generation of this VSYNC signal,
0494 **      which seems that can be done perfectly without this :-)).
0495 */
0496
0497 /*      New design (By Emard)
0498 **      this rps1 code will copy internal HS event to GPIO3 pin.
0499 **      GPIO3 is in budget-patch hardware connected to port B VSYNC
0500
0501 **      HS is an internal event of 7146, accessible with RPS
0502 **      and temporarily raised high every n lines
0503 **      (n in defined in the RPS_THRESH1 counter threshold)
0504 **      I think HS is raised high on the beginning of the n-th line
0505 **      and remains high until this n-th line that triggered
0506 **      it is completely received. When the reception of n-th line
0507 **      ends, HS is lowered.
0508
0509 **      To transmit data over DMA, 7146 needs changing state at
0510 **      port B VSYNC pin. Any changing of port B VSYNC will
0511 **      cause some DMA data transfer, with more or less packets loss.
0512 **      It depends on the phase and frequency of VSYNC and
0513 **      the way of 7146 is instructed to trigger on port B (defined
0514 **      in DD1_INIT register, 3rd nibble from the right valid
0515 **      numbers are 0-7, see datasheet)
0516 **
0517 **      The correct triggering can minimize packet loss,
0518 **      dvbtraffic should give this stable bandwidths:
0519 **        22k transponder = 33814 kbit/s
0520 **      27.5k transponder = 38045 kbit/s
0521 **      by experiment it is found that the best results
0522 **      (stable bandwidths and almost no packet loss)
0523 **      are obtained using DD1_INIT triggering number 2
0524 **      (Va at rising edge of VS Fa = HS x VS-failing forced toggle)
0525 **      and a VSYNC phase that occurs in the middle of DMA transfer
0526 **      (about byte 188*512=96256 in the DMA window).
0527 **
0528 **      Phase of HS is still not clear to me how to control,
0529 **      It just happens to be so. It can be seen if one enables
0530 **      RPS_IRQ and print Event Counter 1 in vpeirq(). Every
0531 **      time RPS_INTERRUPT is called, the Event Counter 1 will
0532 **      increment. That's how the 7146 is programmed to do event
0533 **      counting in this budget-patch.c
0534 **      I *think* HPS setting has something to do with the phase
0535 **      of HS but I can't be 100% sure in that.
0536
0537 **      hardware debug note: a working budget card (including budget patch)
0538 **      with vpeirq() interrupt setup in mode "0x90" (every 64K) will
0539 **      generate 3 interrupts per 25-Hz DMA frame of 2*188*512 bytes
0540 **      and that means 3*25=75 Hz of interrupt frequency, as seen by
0541 **      watch cat /proc/interrupts
0542 **
0543 **      If this frequency is 3x lower (and data received in the DMA
0544 **      buffer don't start with 0x47, but in the middle of packets,
0545 **      whose lengths appear to be like 188 292 188 104 etc.
0546 **      this means VSYNC line is not connected in the hardware.
0547 **      (check soldering pcb and pins)
0548 **      The same behaviour of missing VSYNC can be duplicated on budget
0549 **      cards, by setting DD1_INIT trigger mode 7 in 3rd nibble.
0550 */
0551
0552     // Setup RPS1 "program" (p35)
0553     count = 0;
0554
0555
0556     // Wait Source Line Counter Threshold                           (p36)
0557     WRITE_RPS1(CMD_PAUSE | EVT_HS);
0558     // Set GPIO3=1                                                  (p42)
0559     WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2));
0560     WRITE_RPS1(GPIO3_MSK);
0561     WRITE_RPS1(SAA7146_GPIO_OUTHI<<24);
0562 #if RPS_IRQ
0563     // issue RPS1 interrupt
0564     WRITE_RPS1(CMD_INTERRUPT);
0565 #endif
0566     // Wait reset Source Line Counter Threshold                     (p36)
0567     WRITE_RPS1(CMD_PAUSE | RPS_INV | EVT_HS);
0568     // Set GPIO3=0                                                  (p42)
0569     WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2));
0570     WRITE_RPS1(GPIO3_MSK);
0571     WRITE_RPS1(SAA7146_GPIO_OUTLO<<24);
0572 #if RPS_IRQ
0573     // issue RPS1 interrupt
0574     WRITE_RPS1(CMD_INTERRUPT);
0575 #endif
0576     // Jump to begin of RPS program                                 (p37)
0577     WRITE_RPS1(CMD_JUMP);
0578     WRITE_RPS1(dev->d_rps1.dma_handle);
0579
0580     // Fix VSYNC level
0581     saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
0582     // Set RPS1 Address register to point to RPS code               (r108 p42)
0583     saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);
0584
0585     if (!(budget = kmalloc (sizeof(struct budget_patch), GFP_KERNEL)))
0586         return -ENOMEM;
0587
0588     dprintk(2, "budget: %p\n", budget);
0589
0590     err = ttpci_budget_init(budget, dev, info, THIS_MODULE, adapter_nr);
0591     if (err) {
0592         kfree(budget);
0593         return err;
0594     }
0595
0596     // Set Source Line Counter Threshold, using BRS                 (rCC p43)
0597     // It generates HS event every TS_HEIGHT lines
0598     // this is related to TS_WIDTH set in register
0599     // NUM_LINE_BYTE3 in budget-core.c. If NUM_LINE_BYTE
0600     // low 16 bits are set to TS_WIDTH bytes (TS_WIDTH=2*188
0601     //,then RPS_THRESH1
0602     // should be set to trigger every TS_HEIGHT (512) lines.
0603     //
0604     saa7146_write(dev, RPS_THRESH1, budget->buffer_height | MASK_12 );
0605
0606     // saa7146_write(dev, RPS_THRESH0, ((TS_HEIGHT/2)<<16) |MASK_28| (TS_HEIGHT/2) |MASK_12 );
0607     // Enable RPS1                                                  (rFC p33)
0608     saa7146_write(dev, MC1, (MASK_13 | MASK_29));
0609
0610
0611     dev->ext_priv = budget;
0612
0613     budget->dvb_adapter.priv = budget;
0614     frontend_init(budget);
0615
0616     ttpci_budget_init_hooks(budget);
0617
0618     return 0;
0619 }
0620
0621 static int budget_patch_detach (struct saa7146_dev* dev)
0622 {
0623     struct budget_patch *budget = (struct budget_patch*) dev->ext_priv;
0624     int err;
0625
0626     if (budget->dvb_frontend) {
0627         dvb_unregister_frontend(budget->dvb_frontend);
0628         dvb_frontend_detach(budget->dvb_frontend);
0629     }
0630     err = ttpci_budget_deinit (budget);
0631
0632     kfree (budget);
0633
0634     return err;
0635 }
0636
0637 static int __init budget_patch_init(void)
0638 {
0639     return saa7146_register_extension(&budget_extension);
0640 }
0641
0642 static void __exit budget_patch_exit(void)
0643 {
0644     saa7146_unregister_extension(&budget_extension);
0645 }
0646
0647 static struct saa7146_extension budget_extension = {
0648     .name           = "budget_patch dvb",
0649     .flags          = 0,
0650
0651     .module         = THIS_MODULE,
0652     .pci_tbl        = pci_tbl,
0653     .attach         = budget_patch_attach,
0654     .detach         = budget_patch_detach,
0655
0656     .irq_mask       = MASK_10,
0657     .irq_func       = ttpci_budget_irq10_handler,
0658 };
0659
0660 module_init(budget_patch_init);
0661 module_exit(budget_patch_exit);
0662
0663 MODULE_LICENSE("GPL");
0664 MODULE_AUTHOR("Emard, Roberto Deza, Holger Waechtler, Michael Hunold, others");
0665 MODULE_DESCRIPTION("Driver for full TS modified DVB-S SAA7146+AV7110 based so-called Budget Patch cards");