drivers/spi/spi-xtensa-xtfpga.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Xtensa xtfpga SPI controller driver
0004  *
0005  * Copyright (c) 2014 Cadence Design Systems Inc.
0006  */
0007
0008 #include <linux/delay.h>
0009 #include <linux/io.h>
0010 #include <linux/module.h>
0011 #include <linux/of.h>
0012 #include <linux/platform_device.h>
0013 #include <linux/spi/spi.h>
0014 #include <linux/spi/spi_bitbang.h>
0015
0016 #define XTFPGA_SPI_NAME "xtfpga_spi"
0017
0018 #define XTFPGA_SPI_START    0x0
0019 #define XTFPGA_SPI_BUSY     0x4
0020 #define XTFPGA_SPI_DATA     0x8
0021
0022 #define BUSY_WAIT_US        100
0023
0024 struct xtfpga_spi {
0025     struct spi_bitbang bitbang;
0026     void __iomem *regs;
0027     u32 data;
0028     unsigned data_sz;
0029 };
0030
0031 static inline void xtfpga_spi_write32(const struct xtfpga_spi *spi,
0032                       unsigned addr, u32 val)
0033 {
0034     __raw_writel(val, spi->regs + addr);
0035 }
0036
0037 static inline unsigned int xtfpga_spi_read32(const struct xtfpga_spi *spi,
0038                          unsigned addr)
0039 {
0040     return __raw_readl(spi->regs + addr);
0041 }
0042
0043 static inline void xtfpga_spi_wait_busy(struct xtfpga_spi *xspi)
0044 {
0045     unsigned i;
0046
0047     for (i = 0; xtfpga_spi_read32(xspi, XTFPGA_SPI_BUSY) &&
0048          i < BUSY_WAIT_US; ++i)
0049         udelay(1);
0050     WARN_ON_ONCE(i == BUSY_WAIT_US);
0051 }
0052
0053 static u32 xtfpga_spi_txrx_word(struct spi_device *spi, unsigned nsecs,
0054                 u32 v, u8 bits, unsigned flags)
0055 {
0056     struct xtfpga_spi *xspi = spi_master_get_devdata(spi->master);
0057
0058     xspi->data = (xspi->data << bits) | (v & GENMASK(bits - 1, 0));
0059     xspi->data_sz += bits;
0060     if (xspi->data_sz >= 16) {
0061         xtfpga_spi_write32(xspi, XTFPGA_SPI_DATA,
0062                    xspi->data >> (xspi->data_sz - 16));
0063         xspi->data_sz -= 16;
0064         xtfpga_spi_write32(xspi, XTFPGA_SPI_START, 1);
0065         xtfpga_spi_wait_busy(xspi);
0066         xtfpga_spi_write32(xspi, XTFPGA_SPI_START, 0);
0067     }
0068
0069     return 0;
0070 }
0071
0072 static void xtfpga_spi_chipselect(struct spi_device *spi, int is_on)
0073 {
0074     struct xtfpga_spi *xspi = spi_master_get_devdata(spi->master);
0075
0076     WARN_ON(xspi->data_sz != 0);
0077     xspi->data_sz = 0;
0078 }
0079
0080 static int xtfpga_spi_probe(struct platform_device *pdev)
0081 {
0082     struct xtfpga_spi *xspi;
0083     int ret;
0084     struct spi_master *master;
0085
0086     master = spi_alloc_master(&pdev->dev, sizeof(struct xtfpga_spi));
0087     if (!master)
0088         return -ENOMEM;
0089
0090     master->flags = SPI_MASTER_NO_RX;
0091     master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 16);
0092     master->bus_num = pdev->dev.id;
0093     master->dev.of_node = pdev->dev.of_node;
0094
0095     xspi = spi_master_get_devdata(master);
0096     xspi->bitbang.master = master;
0097     xspi->bitbang.chipselect = xtfpga_spi_chipselect;
0098     xspi->bitbang.txrx_word[SPI_MODE_0] = xtfpga_spi_txrx_word;
0099     xspi->regs = devm_platform_ioremap_resource(pdev, 0);
0100     if (IS_ERR(xspi->regs)) {
0101         ret = PTR_ERR(xspi->regs);
0102         goto err;
0103     }
0104
0105     xtfpga_spi_write32(xspi, XTFPGA_SPI_START, 0);
0106     usleep_range(1000, 2000);
0107     if (xtfpga_spi_read32(xspi, XTFPGA_SPI_BUSY)) {
0108         dev_err(&pdev->dev, "Device stuck in busy state\n");
0109         ret = -EBUSY;
0110         goto err;
0111     }
0112
0113     ret = spi_bitbang_start(&xspi->bitbang);
0114     if (ret < 0) {
0115         dev_err(&pdev->dev, "spi_bitbang_start failed\n");
0116         goto err;
0117     }
0118
0119     platform_set_drvdata(pdev, master);
0120     return 0;
0121 err:
0122     spi_master_put(master);
0123     return ret;
0124 }
0125
0126 static int xtfpga_spi_remove(struct platform_device *pdev)
0127 {
0128     struct spi_master *master = platform_get_drvdata(pdev);
0129     struct xtfpga_spi *xspi = spi_master_get_devdata(master);
0130
0131     spi_bitbang_stop(&xspi->bitbang);
0132     spi_master_put(master);
0133
0134     return 0;
0135 }
0136
0137 MODULE_ALIAS("platform:" XTFPGA_SPI_NAME);
0138
0139 #ifdef CONFIG_OF
0140 static const struct of_device_id xtfpga_spi_of_match[] = {
0141     { .compatible = "cdns,xtfpga-spi", },
0142     {}
0143 };
0144 MODULE_DEVICE_TABLE(of, xtfpga_spi_of_match);
0145 #endif
0146
0147 static struct platform_driver xtfpga_spi_driver = {
0148     .probe = xtfpga_spi_probe,
0149     .remove = xtfpga_spi_remove,
0150     .driver = {
0151         .name = XTFPGA_SPI_NAME,
0152         .of_match_table = of_match_ptr(xtfpga_spi_of_match),
0153     },
0154 };
0155 module_platform_driver(xtfpga_spi_driver);
0156
0157 MODULE_AUTHOR("Max Filippov <jcmvbkbc@gmail.com>");
0158 MODULE_DESCRIPTION("xtensa xtfpga SPI driver");
0159 MODULE_LICENSE("GPL");