drivers/spi/spi-gpio.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * SPI master driver using generic bitbanged GPIO
0004  *
0005  * Copyright (C) 2006,2008 David Brownell
0006  * Copyright (C) 2017 Linus Walleij
0007  */
0008 #include <linux/kernel.h>
0009 #include <linux/module.h>
0010 #include <linux/platform_device.h>
0011 #include <linux/gpio/consumer.h>
0012 #include <linux/of.h>
0013 #include <linux/of_device.h>
0014
0015 #include <linux/spi/spi.h>
0016 #include <linux/spi/spi_bitbang.h>
0017 #include <linux/spi/spi_gpio.h>
0018
0019
0020 /*
0021  * This bitbanging SPI master driver should help make systems usable
0022  * when a native hardware SPI engine is not available, perhaps because
0023  * its driver isn't yet working or because the I/O pins it requires
0024  * are used for other purposes.
0025  *
0026  * platform_device->driver_data ... points to spi_gpio
0027  *
0028  * spi->controller_state ... reserved for bitbang framework code
0029  *
0030  * spi->master->dev.driver_data ... points to spi_gpio->bitbang
0031  */
0032
0033 struct spi_gpio {
0034     struct spi_bitbang      bitbang;
0035     struct gpio_desc        *sck;
0036     struct gpio_desc        *miso;
0037     struct gpio_desc        *mosi;
0038     struct gpio_desc        **cs_gpios;
0039 };
0040
0041 /*----------------------------------------------------------------------*/
0042
0043 /*
0044  * Because the overhead of going through four GPIO procedure calls
0045  * per transferred bit can make performance a problem, this code
0046  * is set up so that you can use it in either of two ways:
0047  *
0048  *   - The slow generic way:  set up platform_data to hold the GPIO
0049  *     numbers used for MISO/MOSI/SCK, and issue procedure calls for
0050  *     each of them.  This driver can handle several such busses.
0051  *
0052  *   - The quicker inlined way:  only helps with platform GPIO code
0053  *     that inlines operations for constant GPIOs.  This can give
0054  *     you tight (fast!) inner loops, but each such bus needs a
0055  *     new driver.  You'll define a new C file, with Makefile and
0056  *     Kconfig support; the C code can be a total of six lines:
0057  *
0058  *      #define DRIVER_NAME "myboard_spi2"
0059  *      #define SPI_MISO_GPIO   119
0060  *      #define SPI_MOSI_GPIO   120
0061  *      #define SPI_SCK_GPIO    121
0062  *      #define SPI_N_CHIPSEL   4
0063  *      #include "spi-gpio.c"
0064  */
0065
0066 #ifndef DRIVER_NAME
0067 #define DRIVER_NAME "spi_gpio"
0068
0069 #define GENERIC_BITBANG /* vs tight inlines */
0070
0071 #endif
0072
0073 /*----------------------------------------------------------------------*/
0074
0075 static inline struct spi_gpio *__pure
0076 spi_to_spi_gpio(const struct spi_device *spi)
0077 {
0078     const struct spi_bitbang    *bang;
0079     struct spi_gpio         *spi_gpio;
0080
0081     bang = spi_master_get_devdata(spi->master);
0082     spi_gpio = container_of(bang, struct spi_gpio, bitbang);
0083     return spi_gpio;
0084 }
0085
0086 /* These helpers are in turn called by the bitbang inlines */
0087 static inline void setsck(const struct spi_device *spi, int is_on)
0088 {
0089     struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
0090
0091     gpiod_set_value_cansleep(spi_gpio->sck, is_on);
0092 }
0093
0094 static inline void setmosi(const struct spi_device *spi, int is_on)
0095 {
0096     struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
0097
0098     gpiod_set_value_cansleep(spi_gpio->mosi, is_on);
0099 }
0100
0101 static inline int getmiso(const struct spi_device *spi)
0102 {
0103     struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
0104
0105     if (spi->mode & SPI_3WIRE)
0106         return !!gpiod_get_value_cansleep(spi_gpio->mosi);
0107     else
0108         return !!gpiod_get_value_cansleep(spi_gpio->miso);
0109 }
0110
0111 /*
0112  * NOTE:  this clocks "as fast as we can".  It "should" be a function of the
0113  * requested device clock.  Software overhead means we usually have trouble
0114  * reaching even one Mbit/sec (except when we can inline bitops), so for now
0115  * we'll just assume we never need additional per-bit slowdowns.
0116  */
0117 #define spidelay(nsecs) do {} while (0)
0118
0119 #include "spi-bitbang-txrx.h"
0120
0121 /*
0122  * These functions can leverage inline expansion of GPIO calls to shrink
0123  * costs for a txrx bit, often by factors of around ten (by instruction
0124  * count).  That is particularly visible for larger word sizes, but helps
0125  * even with default 8-bit words.
0126  *
0127  * REVISIT overheads calling these functions for each word also have
0128  * significant performance costs.  Having txrx_bufs() calls that inline
0129  * the txrx_word() logic would help performance, e.g. on larger blocks
0130  * used with flash storage or MMC/SD.  There should also be ways to make
0131  * GCC be less stupid about reloading registers inside the I/O loops,
0132  * even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3?
0133  */
0134
0135 static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi,
0136         unsigned nsecs, u32 word, u8 bits, unsigned flags)
0137 {
0138     if (unlikely(spi->mode & SPI_LSB_FIRST))
0139         return bitbang_txrx_le_cpha0(spi, nsecs, 0, flags, word, bits);
0140     else
0141         return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
0142 }
0143
0144 static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi,
0145         unsigned nsecs, u32 word, u8 bits, unsigned flags)
0146 {
0147     if (unlikely(spi->mode & SPI_LSB_FIRST))
0148         return bitbang_txrx_le_cpha1(spi, nsecs, 0, flags, word, bits);
0149     else
0150         return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
0151 }
0152
0153 static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi,
0154         unsigned nsecs, u32 word, u8 bits, unsigned flags)
0155 {
0156     if (unlikely(spi->mode & SPI_LSB_FIRST))
0157         return bitbang_txrx_le_cpha0(spi, nsecs, 1, flags, word, bits);
0158     else
0159         return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
0160 }
0161
0162 static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi,
0163         unsigned nsecs, u32 word, u8 bits, unsigned flags)
0164 {
0165     if (unlikely(spi->mode & SPI_LSB_FIRST))
0166         return bitbang_txrx_le_cpha1(spi, nsecs, 1, flags, word, bits);
0167     else
0168         return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
0169 }
0170
0171 /*
0172  * These functions do not call setmosi or getmiso if respective flag
0173  * (SPI_MASTER_NO_RX or SPI_MASTER_NO_TX) is set, so they are safe to
0174  * call when such pin is not present or defined in the controller.
0175  * A separate set of callbacks is defined to get highest possible
0176  * speed in the generic case (when both MISO and MOSI lines are
0177  * available), as optimiser will remove the checks when argument is
0178  * constant.
0179  */
0180
0181 static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi,
0182         unsigned nsecs, u32 word, u8 bits, unsigned flags)
0183 {
0184     flags = spi->master->flags;
0185     if (unlikely(spi->mode & SPI_LSB_FIRST))
0186         return bitbang_txrx_le_cpha0(spi, nsecs, 0, flags, word, bits);
0187     else
0188         return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
0189 }
0190
0191 static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi,
0192         unsigned nsecs, u32 word, u8 bits, unsigned flags)
0193 {
0194     flags = spi->master->flags;
0195     if (unlikely(spi->mode & SPI_LSB_FIRST))
0196         return bitbang_txrx_le_cpha1(spi, nsecs, 0, flags, word, bits);
0197     else
0198         return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
0199 }
0200
0201 static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi,
0202         unsigned nsecs, u32 word, u8 bits, unsigned flags)
0203 {
0204     flags = spi->master->flags;
0205     if (unlikely(spi->mode & SPI_LSB_FIRST))
0206         return bitbang_txrx_le_cpha0(spi, nsecs, 1, flags, word, bits);
0207     else
0208         return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
0209 }
0210
0211 static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi,
0212         unsigned nsecs, u32 word, u8 bits, unsigned flags)
0213 {
0214     flags = spi->master->flags;
0215     if (unlikely(spi->mode & SPI_LSB_FIRST))
0216         return bitbang_txrx_le_cpha1(spi, nsecs, 1, flags, word, bits);
0217     else
0218         return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
0219 }
0220
0221 /*----------------------------------------------------------------------*/
0222
0223 static void spi_gpio_chipselect(struct spi_device *spi, int is_active)
0224 {
0225     struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
0226
0227     /* set initial clock line level */
0228     if (is_active)
0229         gpiod_set_value_cansleep(spi_gpio->sck, spi->mode & SPI_CPOL);
0230
0231     /* Drive chip select line, if we have one */
0232     if (spi_gpio->cs_gpios) {
0233         struct gpio_desc *cs = spi_gpio->cs_gpios[spi->chip_select];
0234
0235         /* SPI chip selects are normally active-low */
0236         gpiod_set_value_cansleep(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active);
0237     }
0238 }
0239
0240 static int spi_gpio_setup(struct spi_device *spi)
0241 {
0242     struct gpio_desc    *cs;
0243     int         status = 0;
0244     struct spi_gpio     *spi_gpio = spi_to_spi_gpio(spi);
0245
0246     /*
0247      * The CS GPIOs have already been
0248      * initialized from the descriptor lookup.
0249      */
0250     if (spi_gpio->cs_gpios) {
0251         cs = spi_gpio->cs_gpios[spi->chip_select];
0252         if (!spi->controller_state && cs)
0253             status = gpiod_direction_output(cs,
0254                           !(spi->mode & SPI_CS_HIGH));
0255     }
0256
0257     if (!status)
0258         status = spi_bitbang_setup(spi);
0259
0260     return status;
0261 }
0262
0263 static int spi_gpio_set_direction(struct spi_device *spi, bool output)
0264 {
0265     struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
0266     int ret;
0267
0268     if (output)
0269         return gpiod_direction_output(spi_gpio->mosi, 1);
0270
0271     ret = gpiod_direction_input(spi_gpio->mosi);
0272     if (ret)
0273         return ret;
0274     /*
0275      * Send a turnaround high impedance cycle when switching
0276      * from output to input. Theoretically there should be
0277      * a clock delay here, but as has been noted above, the
0278      * nsec delay function for bit-banged GPIO is simply
0279      * {} because bit-banging just doesn't get fast enough
0280      * anyway.
0281      */
0282     if (spi->mode & SPI_3WIRE_HIZ) {
0283         gpiod_set_value_cansleep(spi_gpio->sck,
0284                      !(spi->mode & SPI_CPOL));
0285         gpiod_set_value_cansleep(spi_gpio->sck,
0286                      !!(spi->mode & SPI_CPOL));
0287     }
0288     return 0;
0289 }
0290
0291 static void spi_gpio_cleanup(struct spi_device *spi)
0292 {
0293     spi_bitbang_cleanup(spi);
0294 }
0295
0296 /*
0297  * It can be convenient to use this driver with pins that have alternate
0298  * functions associated with a "native" SPI controller if a driver for that
0299  * controller is not available, or is missing important functionality.
0300  *
0301  * On platforms which can do so, configure MISO with a weak pullup unless
0302  * there's an external pullup on that signal.  That saves power by avoiding
0303  * floating signals.  (A weak pulldown would save power too, but many
0304  * drivers expect to see all-ones data as the no slave "response".)
0305  */
0306 static int spi_gpio_request(struct device *dev, struct spi_gpio *spi_gpio)
0307 {
0308     spi_gpio->mosi = devm_gpiod_get_optional(dev, "mosi", GPIOD_OUT_LOW);
0309     if (IS_ERR(spi_gpio->mosi))
0310         return PTR_ERR(spi_gpio->mosi);
0311
0312     spi_gpio->miso = devm_gpiod_get_optional(dev, "miso", GPIOD_IN);
0313     if (IS_ERR(spi_gpio->miso))
0314         return PTR_ERR(spi_gpio->miso);
0315
0316     spi_gpio->sck = devm_gpiod_get(dev, "sck", GPIOD_OUT_LOW);
0317     return PTR_ERR_OR_ZERO(spi_gpio->sck);
0318 }
0319
0320 #ifdef CONFIG_OF
0321 static const struct of_device_id spi_gpio_dt_ids[] = {
0322     { .compatible = "spi-gpio" },
0323     {}
0324 };
0325 MODULE_DEVICE_TABLE(of, spi_gpio_dt_ids);
0326
0327 static int spi_gpio_probe_dt(struct platform_device *pdev,
0328                  struct spi_master *master)
0329 {
0330     master->dev.of_node = pdev->dev.of_node;
0331     master->use_gpio_descriptors = true;
0332
0333     return 0;
0334 }
0335 #else
0336 static inline int spi_gpio_probe_dt(struct platform_device *pdev,
0337                     struct spi_master *master)
0338 {
0339     return 0;
0340 }
0341 #endif
0342
0343 static int spi_gpio_probe_pdata(struct platform_device *pdev,
0344                 struct spi_master *master)
0345 {
0346     struct device *dev = &pdev->dev;
0347     struct spi_gpio_platform_data *pdata = dev_get_platdata(dev);
0348     struct spi_gpio *spi_gpio = spi_master_get_devdata(master);
0349     int i;
0350
0351 #ifdef GENERIC_BITBANG
0352     if (!pdata || !pdata->num_chipselect)
0353         return -ENODEV;
0354 #endif
0355     /*
0356      * The master needs to think there is a chipselect even if not
0357      * connected
0358      */
0359     master->num_chipselect = pdata->num_chipselect ?: 1;
0360
0361     spi_gpio->cs_gpios = devm_kcalloc(dev, master->num_chipselect,
0362                       sizeof(*spi_gpio->cs_gpios),
0363                       GFP_KERNEL);
0364     if (!spi_gpio->cs_gpios)
0365         return -ENOMEM;
0366
0367     for (i = 0; i < master->num_chipselect; i++) {
0368         spi_gpio->cs_gpios[i] = devm_gpiod_get_index(dev, "cs", i,
0369                                  GPIOD_OUT_HIGH);
0370         if (IS_ERR(spi_gpio->cs_gpios[i]))
0371             return PTR_ERR(spi_gpio->cs_gpios[i]);
0372     }
0373
0374     return 0;
0375 }
0376
0377 static int spi_gpio_probe(struct platform_device *pdev)
0378 {
0379     int             status;
0380     struct spi_master       *master;
0381     struct spi_gpio         *spi_gpio;
0382     struct device           *dev = &pdev->dev;
0383     struct spi_bitbang      *bb;
0384
0385     master = devm_spi_alloc_master(dev, sizeof(*spi_gpio));
0386     if (!master)
0387         return -ENOMEM;
0388
0389     if (pdev->dev.of_node)
0390         status = spi_gpio_probe_dt(pdev, master);
0391     else
0392         status = spi_gpio_probe_pdata(pdev, master);
0393
0394     if (status)
0395         return status;
0396
0397     spi_gpio = spi_master_get_devdata(master);
0398
0399     status = spi_gpio_request(dev, spi_gpio);
0400     if (status)
0401         return status;
0402
0403     master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
0404     master->mode_bits = SPI_3WIRE | SPI_3WIRE_HIZ | SPI_CPHA | SPI_CPOL |
0405                 SPI_CS_HIGH | SPI_LSB_FIRST;
0406     if (!spi_gpio->mosi) {
0407         /* HW configuration without MOSI pin
0408          *
0409          * No setting SPI_MASTER_NO_RX here - if there is only
0410          * a MOSI pin connected the host can still do RX by
0411          * changing the direction of the line.
0412          */
0413         master->flags = SPI_MASTER_NO_TX;
0414     }
0415
0416     master->bus_num = pdev->id;
0417     master->setup = spi_gpio_setup;
0418     master->cleanup = spi_gpio_cleanup;
0419
0420     bb = &spi_gpio->bitbang;
0421     bb->master = master;
0422     /*
0423      * There is some additional business, apart from driving the CS GPIO
0424      * line, that we need to do on selection. This makes the local
0425      * callback for chipselect always get called.
0426      */
0427     master->flags |= SPI_MASTER_GPIO_SS;
0428     bb->chipselect = spi_gpio_chipselect;
0429     bb->set_line_direction = spi_gpio_set_direction;
0430
0431     if (master->flags & SPI_MASTER_NO_TX) {
0432         bb->txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0;
0433         bb->txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1;
0434         bb->txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2;
0435         bb->txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3;
0436     } else {
0437         bb->txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0;
0438         bb->txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1;
0439         bb->txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2;
0440         bb->txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3;
0441     }
0442     bb->setup_transfer = spi_bitbang_setup_transfer;
0443
0444     status = spi_bitbang_init(&spi_gpio->bitbang);
0445     if (status)
0446         return status;
0447
0448     return devm_spi_register_master(&pdev->dev, master);
0449 }
0450
0451 MODULE_ALIAS("platform:" DRIVER_NAME);
0452
0453 static struct platform_driver spi_gpio_driver = {
0454     .driver = {
0455         .name   = DRIVER_NAME,
0456         .of_match_table = of_match_ptr(spi_gpio_dt_ids),
0457     },
0458     .probe      = spi_gpio_probe,
0459 };
0460 module_platform_driver(spi_gpio_driver);
0461
0462 MODULE_DESCRIPTION("SPI master driver using generic bitbanged GPIO ");
0463 MODULE_AUTHOR("David Brownell");
0464 MODULE_LICENSE("GPL");