drivers/spi/spi-bitbang-txrx.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Mix this utility code with some glue code to get one of several types of
0004  * simple SPI master driver.  Two do polled word-at-a-time I/O:
0005  *
0006  *   -  GPIO/parport bitbangers.  Provide chipselect() and txrx_word[](),
0007  *  expanding the per-word routines from the inline templates below.
0008  *
0009  *   -  Drivers for controllers resembling bare shift registers.  Provide
0010  *  chipselect() and txrx_word[](), with custom setup()/cleanup() methods
0011  *  that use your controller's clock and chipselect registers.
0012  *
0013  * Some hardware works well with requests at spi_transfer scope:
0014  *
0015  *   -  Drivers leveraging smarter hardware, with fifos or DMA; or for half
0016  *  duplex (MicroWire) controllers.  Provide chipselect() and txrx_bufs(),
0017  *  and custom setup()/cleanup() methods.
0018  */
0019
0020 /*
0021  * The code that knows what GPIO pins do what should have declared four
0022  * functions, ideally as inlines, before including this header:
0023  *
0024  *  void setsck(struct spi_device *, int is_on);
0025  *  void setmosi(struct spi_device *, int is_on);
0026  *  int getmiso(struct spi_device *);
0027  *  void spidelay(unsigned);
0028  *
0029  * setsck()'s is_on parameter is a zero/nonzero boolean.
0030  *
0031  * setmosi()'s is_on parameter is a zero/nonzero boolean.
0032  *
0033  * getmiso() is required to return 0 or 1 only. Any other value is invalid
0034  * and will result in improper operation.
0035  *
0036  * A non-inlined routine would call bitbang_txrx_*() routines.  The
0037  * main loop could easily compile down to a handful of instructions,
0038  * especially if the delay is a NOP (to run at peak speed).
0039  *
0040  * Since this is software, the timings may not be exactly what your board's
0041  * chips need ... there may be several reasons you'd need to tweak timings
0042  * in these routines, not just to make it faster or slower to match a
0043  * particular CPU clock rate.
0044  *
0045  * ToDo: Maybe the bitrev macros can be used to improve the code?
0046  */
0047
0048 static inline u32
0049 bitbang_txrx_be_cpha0(struct spi_device *spi,
0050         unsigned nsecs, unsigned cpol, unsigned flags,
0051         u32 word, u8 bits)
0052 {
0053     /* if (cpol == 0) this is SPI_MODE_0; else this is SPI_MODE_2 */
0054
0055     u32 oldbit = (!(word & (1<<(bits-1)))) << 31;
0056     /* clock starts at inactive polarity */
0057     for (word <<= (32 - bits); likely(bits); bits--) {
0058
0059         /* setup MSB (to slave) on trailing edge */
0060         if ((flags & SPI_MASTER_NO_TX) == 0) {
0061             if ((word & (1 << 31)) != oldbit) {
0062                 setmosi(spi, word & (1 << 31));
0063                 oldbit = word & (1 << 31);
0064             }
0065         }
0066         spidelay(nsecs);    /* T(setup) */
0067
0068         setsck(spi, !cpol);
0069         spidelay(nsecs);
0070
0071         /* sample MSB (from slave) on leading edge */
0072         word <<= 1;
0073         if ((flags & SPI_MASTER_NO_RX) == 0)
0074             word |= getmiso(spi);
0075         setsck(spi, cpol);
0076     }
0077     return word;
0078 }
0079
0080 static inline u32
0081 bitbang_txrx_be_cpha1(struct spi_device *spi,
0082         unsigned nsecs, unsigned cpol, unsigned flags,
0083         u32 word, u8 bits)
0084 {
0085     /* if (cpol == 0) this is SPI_MODE_1; else this is SPI_MODE_3 */
0086
0087     u32 oldbit = (!(word & (1<<(bits-1)))) << 31;
0088     /* clock starts at inactive polarity */
0089     for (word <<= (32 - bits); likely(bits); bits--) {
0090
0091         /* setup MSB (to slave) on leading edge */
0092         setsck(spi, !cpol);
0093         if ((flags & SPI_MASTER_NO_TX) == 0) {
0094             if ((word & (1 << 31)) != oldbit) {
0095                 setmosi(spi, word & (1 << 31));
0096                 oldbit = word & (1 << 31);
0097             }
0098         }
0099         spidelay(nsecs); /* T(setup) */
0100
0101         setsck(spi, cpol);
0102         spidelay(nsecs);
0103
0104         /* sample MSB (from slave) on trailing edge */
0105         word <<= 1;
0106         if ((flags & SPI_MASTER_NO_RX) == 0)
0107             word |= getmiso(spi);
0108     }
0109     return word;
0110 }
0111
0112 static inline u32
0113 bitbang_txrx_le_cpha0(struct spi_device *spi,
0114         unsigned int nsecs, unsigned int cpol, unsigned int flags,
0115         u32 word, u8 bits)
0116 {
0117     /* if (cpol == 0) this is SPI_MODE_0; else this is SPI_MODE_2 */
0118
0119     u8 rxbit = bits - 1;
0120     u32 oldbit = !(word & 1);
0121     /* clock starts at inactive polarity */
0122     for (; likely(bits); bits--) {
0123
0124         /* setup LSB (to slave) on trailing edge */
0125         if ((flags & SPI_MASTER_NO_TX) == 0) {
0126             if ((word & 1) != oldbit) {
0127                 setmosi(spi, word & 1);
0128                 oldbit = word & 1;
0129             }
0130         }
0131         spidelay(nsecs);    /* T(setup) */
0132
0133         setsck(spi, !cpol);
0134         spidelay(nsecs);
0135
0136         /* sample LSB (from slave) on leading edge */
0137         word >>= 1;
0138         if ((flags & SPI_MASTER_NO_RX) == 0)
0139             word |= getmiso(spi) << rxbit;
0140         setsck(spi, cpol);
0141     }
0142     return word;
0143 }
0144
0145 static inline u32
0146 bitbang_txrx_le_cpha1(struct spi_device *spi,
0147         unsigned int nsecs, unsigned int cpol, unsigned int flags,
0148         u32 word, u8 bits)
0149 {
0150     /* if (cpol == 0) this is SPI_MODE_1; else this is SPI_MODE_3 */
0151
0152     u8 rxbit = bits - 1;
0153     u32 oldbit = !(word & 1);
0154     /* clock starts at inactive polarity */
0155     for (; likely(bits); bits--) {
0156
0157         /* setup LSB (to slave) on leading edge */
0158         setsck(spi, !cpol);
0159         if ((flags & SPI_MASTER_NO_TX) == 0) {
0160             if ((word & 1) != oldbit) {
0161                 setmosi(spi, word & 1);
0162                 oldbit = word & 1;
0163             }
0164         }
0165         spidelay(nsecs); /* T(setup) */
0166
0167         setsck(spi, cpol);
0168         spidelay(nsecs);
0169
0170         /* sample LSB (from slave) on trailing edge */
0171         word >>= 1;
0172         if ((flags & SPI_MASTER_NO_RX) == 0)
0173             word |= getmiso(spi) << rxbit;
0174     }
0175     return word;
0176 }