drivers/spi/spi-bcm-qspi.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright 2016 Broadcom
0004  */
0005
0006 #ifndef __SPI_BCM_QSPI_H__
0007 #define __SPI_BCM_QSPI_H__
0008
0009 #include <linux/types.h>
0010 #include <linux/io.h>
0011
0012 /* BSPI interrupt masks */
0013 #define INTR_BSPI_LR_OVERREAD_MASK      BIT(4)
0014 #define INTR_BSPI_LR_SESSION_DONE_MASK      BIT(3)
0015 #define INTR_BSPI_LR_IMPATIENT_MASK     BIT(2)
0016 #define INTR_BSPI_LR_SESSION_ABORTED_MASK   BIT(1)
0017 #define INTR_BSPI_LR_FULLNESS_REACHED_MASK  BIT(0)
0018
0019 #define BSPI_LR_INTERRUPTS_DATA            \
0020     (INTR_BSPI_LR_SESSION_DONE_MASK |          \
0021      INTR_BSPI_LR_FULLNESS_REACHED_MASK)
0022
0023 #define BSPI_LR_INTERRUPTS_ERROR               \
0024     (INTR_BSPI_LR_OVERREAD_MASK |          \
0025      INTR_BSPI_LR_IMPATIENT_MASK |         \
0026      INTR_BSPI_LR_SESSION_ABORTED_MASK)
0027
0028 #define BSPI_LR_INTERRUPTS_ALL                 \
0029     (BSPI_LR_INTERRUPTS_ERROR |        \
0030      BSPI_LR_INTERRUPTS_DATA)
0031
0032 /* MSPI Interrupt masks */
0033 #define INTR_MSPI_HALTED_MASK           BIT(6)
0034 #define INTR_MSPI_DONE_MASK         BIT(5)
0035
0036 #define MSPI_INTERRUPTS_ALL            \
0037     (INTR_MSPI_DONE_MASK |             \
0038      INTR_MSPI_HALTED_MASK)
0039
0040 #define QSPI_INTERRUPTS_ALL                    \
0041     (MSPI_INTERRUPTS_ALL |             \
0042      BSPI_LR_INTERRUPTS_ALL)
0043
0044 struct platform_device;
0045 struct dev_pm_ops;
0046
0047 enum {
0048     MSPI_DONE = 0x1,
0049     BSPI_DONE = 0x2,
0050     BSPI_ERR = 0x4,
0051     MSPI_BSPI_DONE = 0x7
0052 };
0053
0054 struct bcm_qspi_soc_intc {
0055     void (*bcm_qspi_int_ack)(struct bcm_qspi_soc_intc *soc_intc, int type);
0056     void (*bcm_qspi_int_set)(struct bcm_qspi_soc_intc *soc_intc, int type,
0057                  bool en);
0058     u32 (*bcm_qspi_get_int_status)(struct bcm_qspi_soc_intc *soc_intc);
0059 };
0060
0061 /* Read controller register*/
0062 static inline u32 bcm_qspi_readl(bool be, void __iomem *addr)
0063 {
0064     if (be)
0065         return ioread32be(addr);
0066     else
0067         return readl_relaxed(addr);
0068 }
0069
0070 /* Write controller register*/
0071 static inline void bcm_qspi_writel(bool be,
0072                    unsigned int data, void __iomem *addr)
0073 {
0074     if (be)
0075         iowrite32be(data, addr);
0076     else
0077         writel_relaxed(data, addr);
0078 }
0079
0080 static inline u32 get_qspi_mask(int type)
0081 {
0082     switch (type) {
0083     case MSPI_DONE:
0084         return INTR_MSPI_DONE_MASK;
0085     case BSPI_DONE:
0086         return BSPI_LR_INTERRUPTS_ALL;
0087     case MSPI_BSPI_DONE:
0088         return QSPI_INTERRUPTS_ALL;
0089     case BSPI_ERR:
0090         return BSPI_LR_INTERRUPTS_ERROR;
0091     }
0092
0093     return 0;
0094 }
0095
0096 /* The common driver functions to be called by the SoC platform driver */
0097 int bcm_qspi_probe(struct platform_device *pdev,
0098            struct bcm_qspi_soc_intc *soc_intc);
0099 int bcm_qspi_remove(struct platform_device *pdev);
0100
0101 /* pm_ops used by the SoC platform driver called on PM suspend/resume */
0102 extern const struct dev_pm_ops bcm_qspi_pm_ops;
0103
0104 #endif /* __SPI_BCM_QSPI_H__ */