tegra/fuse/fuse.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright (C) 2010 Google, Inc.
0004  * Copyright (c) 2013, NVIDIA CORPORATION.  All rights reserved.
0005  *
0006  * Author:
0007  *  Colin Cross <ccross@android.com>
0008  */
0009
0010 #ifndef __DRIVERS_MISC_TEGRA_FUSE_H
0011 #define __DRIVERS_MISC_TEGRA_FUSE_H
0012
0013 #include <linux/dmaengine.h>
0014 #include <linux/types.h>
0015
0016 struct nvmem_cell_lookup;
0017 struct nvmem_device;
0018 struct tegra_fuse;
0019
0020 struct tegra_fuse_info {
0021     u32 (*read)(struct tegra_fuse *fuse, unsigned int offset);
0022     unsigned int size;
0023     unsigned int spare;
0024 };
0025
0026 struct tegra_fuse_soc {
0027     void (*init)(struct tegra_fuse *fuse);
0028     void (*speedo_init)(struct tegra_sku_info *info);
0029     int (*probe)(struct tegra_fuse *fuse);
0030
0031     const struct tegra_fuse_info *info;
0032
0033     const struct nvmem_cell_lookup *lookups;
0034     unsigned int num_lookups;
0035
0036     const struct attribute_group *soc_attr_group;
0037
0038     bool clk_suspend_on;
0039 };
0040
0041 struct tegra_fuse {
0042     struct device *dev;
0043     void __iomem *base;
0044     phys_addr_t phys;
0045     struct clk *clk;
0046     struct reset_control *rst;
0047
0048     u32 (*read_early)(struct tegra_fuse *fuse, unsigned int offset);
0049     u32 (*read)(struct tegra_fuse *fuse, unsigned int offset);
0050     const struct tegra_fuse_soc *soc;
0051
0052     /* APBDMA on Tegra20 */
0053     struct {
0054         struct mutex lock;
0055         struct completion wait;
0056         struct dma_chan *chan;
0057         struct dma_slave_config config;
0058         dma_addr_t phys;
0059         u32 *virt;
0060     } apbdma;
0061
0062     struct nvmem_device *nvmem;
0063     struct nvmem_cell_lookup *lookups;
0064 };
0065
0066 void tegra_init_revision(void);
0067 void tegra_init_apbmisc(void);
0068
0069 u32 __init tegra_fuse_read_spare(unsigned int spare);
0070 u32 __init tegra_fuse_read_early(unsigned int offset);
0071
0072 u8 tegra_get_major_rev(void);
0073 u8 tegra_get_minor_rev(void);
0074
0075 extern const struct attribute_group tegra_soc_attr_group;
0076
0077 #ifdef CONFIG_ARCH_TEGRA_2x_SOC
0078 void tegra20_init_speedo_data(struct tegra_sku_info *sku_info);
0079 #endif
0080
0081 #ifdef CONFIG_ARCH_TEGRA_3x_SOC
0082 void tegra30_init_speedo_data(struct tegra_sku_info *sku_info);
0083 #endif
0084
0085 #ifdef CONFIG_ARCH_TEGRA_114_SOC
0086 void tegra114_init_speedo_data(struct tegra_sku_info *sku_info);
0087 #endif
0088
0089 #if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC)
0090 void tegra124_init_speedo_data(struct tegra_sku_info *sku_info);
0091 #endif
0092
0093 #ifdef CONFIG_ARCH_TEGRA_210_SOC
0094 void tegra210_init_speedo_data(struct tegra_sku_info *sku_info);
0095 #endif
0096
0097 #ifdef CONFIG_ARCH_TEGRA_2x_SOC
0098 extern const struct tegra_fuse_soc tegra20_fuse_soc;
0099 #endif
0100
0101 #ifdef CONFIG_ARCH_TEGRA_3x_SOC
0102 extern const struct tegra_fuse_soc tegra30_fuse_soc;
0103 #endif
0104
0105 #ifdef CONFIG_ARCH_TEGRA_114_SOC
0106 extern const struct tegra_fuse_soc tegra114_fuse_soc;
0107 #endif
0108
0109 #if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC)
0110 extern const struct tegra_fuse_soc tegra124_fuse_soc;
0111 #endif
0112
0113 #ifdef CONFIG_ARCH_TEGRA_210_SOC
0114 extern const struct tegra_fuse_soc tegra210_fuse_soc;
0115 #endif
0116
0117 #ifdef CONFIG_ARCH_TEGRA_186_SOC
0118 extern const struct tegra_fuse_soc tegra186_fuse_soc;
0119 #endif
0120
0121 #if IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) || \
0122     IS_ENABLED(CONFIG_ARCH_TEGRA_234_SOC)
0123 extern const struct attribute_group tegra194_soc_attr_group;
0124 #endif
0125
0126 #ifdef CONFIG_ARCH_TEGRA_194_SOC
0127 extern const struct tegra_fuse_soc tegra194_fuse_soc;
0128 #endif
0129
0130 #ifdef CONFIG_ARCH_TEGRA_234_SOC
0131 extern const struct tegra_fuse_soc tegra234_fuse_soc;
0132 #endif
0133
0134 #endif