soc/samsung/exynos-usi.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Copyright (c) 2021 Linaro Ltd.
0004  * Author: Sam Protsenko <semen.protsenko@linaro.org>
0005  *
0006  * Samsung Exynos USI driver (Universal Serial Interface).
0007  */
0008
0009 #include <linux/clk.h>
0010 #include <linux/mfd/syscon.h>
0011 #include <linux/module.h>
0012 #include <linux/of.h>
0013 #include <linux/of_platform.h>
0014 #include <linux/platform_device.h>
0015 #include <linux/regmap.h>
0016
0017 #include <dt-bindings/soc/samsung,exynos-usi.h>
0018
0019 /* USIv2: System Register: SW_CONF register bits */
0020 #define USI_V2_SW_CONF_NONE 0x0
0021 #define USI_V2_SW_CONF_UART BIT(0)
0022 #define USI_V2_SW_CONF_SPI  BIT(1)
0023 #define USI_V2_SW_CONF_I2C  BIT(2)
0024 #define USI_V2_SW_CONF_MASK (USI_V2_SW_CONF_UART | USI_V2_SW_CONF_SPI | \
0025                  USI_V2_SW_CONF_I2C)
0026
0027 /* USIv2: USI register offsets */
0028 #define USI_CON         0x04
0029 #define USI_OPTION      0x08
0030
0031 /* USIv2: USI register bits */
0032 #define USI_CON_RESET       BIT(0)
0033 #define USI_OPTION_CLKREQ_ON    BIT(1)
0034 #define USI_OPTION_CLKSTOP_ON   BIT(2)
0035
0036 enum exynos_usi_ver {
0037     USI_VER2 = 2,
0038 };
0039
0040 struct exynos_usi_variant {
0041     enum exynos_usi_ver ver;    /* USI IP-core version */
0042     unsigned int sw_conf_mask;  /* SW_CONF mask for all protocols */
0043     size_t min_mode;        /* first index in exynos_usi_modes[] */
0044     size_t max_mode;        /* last index in exynos_usi_modes[] */
0045     size_t num_clks;        /* number of clocks to assert */
0046     const char * const *clk_names;  /* clock names to assert */
0047 };
0048
0049 struct exynos_usi {
0050     struct device *dev;
0051     void __iomem *regs;     /* USI register map */
0052     struct clk_bulk_data *clks; /* USI clocks */
0053
0054     size_t mode;            /* current USI SW_CONF mode index */
0055     bool clkreq_on;         /* always provide clock to IP */
0056
0057     /* System Register */
0058     struct regmap *sysreg;      /* System Register map */
0059     unsigned int sw_conf;       /* SW_CONF register offset in sysreg */
0060
0061     const struct exynos_usi_variant *data;
0062 };
0063
0064 struct exynos_usi_mode {
0065     const char *name;       /* mode name */
0066     unsigned int val;       /* mode register value */
0067 };
0068
0069 static const struct exynos_usi_mode exynos_usi_modes[] = {
0070     [USI_V2_NONE] = { .name = "none", .val = USI_V2_SW_CONF_NONE },
0071     [USI_V2_UART] = { .name = "uart", .val = USI_V2_SW_CONF_UART },
0072     [USI_V2_SPI] =  { .name = "spi",  .val = USI_V2_SW_CONF_SPI },
0073     [USI_V2_I2C] =  { .name = "i2c",  .val = USI_V2_SW_CONF_I2C },
0074 };
0075
0076 static const char * const exynos850_usi_clk_names[] = { "pclk", "ipclk" };
0077 static const struct exynos_usi_variant exynos850_usi_data = {
0078     .ver        = USI_VER2,
0079     .sw_conf_mask   = USI_V2_SW_CONF_MASK,
0080     .min_mode   = USI_V2_NONE,
0081     .max_mode   = USI_V2_I2C,
0082     .num_clks   = ARRAY_SIZE(exynos850_usi_clk_names),
0083     .clk_names  = exynos850_usi_clk_names,
0084 };
0085
0086 static const struct of_device_id exynos_usi_dt_match[] = {
0087     {
0088         .compatible = "samsung,exynos850-usi",
0089         .data = &exynos850_usi_data,
0090     },
0091     { } /* sentinel */
0092 };
0093 MODULE_DEVICE_TABLE(of, exynos_usi_dt_match);
0094
0095 /**
0096  * exynos_usi_set_sw_conf - Set USI block configuration mode
0097  * @usi: USI driver object
0098  * @mode: Mode index
0099  *
0100  * Select underlying serial protocol (UART/SPI/I2C) in USI IP-core.
0101  *
0102  * Return: 0 on success, or negative error code on failure.
0103  */
0104 static int exynos_usi_set_sw_conf(struct exynos_usi *usi, size_t mode)
0105 {
0106     unsigned int val;
0107     int ret;
0108
0109     if (mode < usi->data->min_mode || mode > usi->data->max_mode)
0110         return -EINVAL;
0111
0112     val = exynos_usi_modes[mode].val;
0113     ret = regmap_update_bits(usi->sysreg, usi->sw_conf,
0114                  usi->data->sw_conf_mask, val);
0115     if (ret)
0116         return ret;
0117
0118     usi->mode = mode;
0119     dev_dbg(usi->dev, "protocol: %s\n", exynos_usi_modes[usi->mode].name);
0120
0121     return 0;
0122 }
0123
0124 /**
0125  * exynos_usi_enable - Initialize USI block
0126  * @usi: USI driver object
0127  *
0128  * USI IP-core start state is "reset" (on startup and after CPU resume). This
0129  * routine enables the USI block by clearing the reset flag. It also configures
0130  * HWACG behavior (needed e.g. for UART Rx). It should be performed before
0131  * underlying protocol becomes functional.
0132  *
0133  * Return: 0 on success, or negative error code on failure.
0134  */
0135 static int exynos_usi_enable(const struct exynos_usi *usi)
0136 {
0137     u32 val;
0138     int ret;
0139
0140     ret = clk_bulk_prepare_enable(usi->data->num_clks, usi->clks);
0141     if (ret)
0142         return ret;
0143
0144     /* Enable USI block */
0145     val = readl(usi->regs + USI_CON);
0146     val &= ~USI_CON_RESET;
0147     writel(val, usi->regs + USI_CON);
0148     udelay(1);
0149
0150     /* Continuously provide the clock to USI IP w/o gating */
0151     if (usi->clkreq_on) {
0152         val = readl(usi->regs + USI_OPTION);
0153         val &= ~USI_OPTION_CLKSTOP_ON;
0154         val |= USI_OPTION_CLKREQ_ON;
0155         writel(val, usi->regs + USI_OPTION);
0156     }
0157
0158     clk_bulk_disable_unprepare(usi->data->num_clks, usi->clks);
0159
0160     return ret;
0161 }
0162
0163 static int exynos_usi_configure(struct exynos_usi *usi)
0164 {
0165     int ret;
0166
0167     ret = exynos_usi_set_sw_conf(usi, usi->mode);
0168     if (ret)
0169         return ret;
0170
0171     if (usi->data->ver == USI_VER2)
0172         return exynos_usi_enable(usi);
0173
0174     return 0;
0175 }
0176
0177 static int exynos_usi_parse_dt(struct device_node *np, struct exynos_usi *usi)
0178 {
0179     int ret;
0180     u32 mode;
0181
0182     ret = of_property_read_u32(np, "samsung,mode", &mode);
0183     if (ret)
0184         return ret;
0185     if (mode < usi->data->min_mode || mode > usi->data->max_mode)
0186         return -EINVAL;
0187     usi->mode = mode;
0188
0189     usi->sysreg = syscon_regmap_lookup_by_phandle(np, "samsung,sysreg");
0190     if (IS_ERR(usi->sysreg))
0191         return PTR_ERR(usi->sysreg);
0192
0193     ret = of_property_read_u32_index(np, "samsung,sysreg", 1,
0194                      &usi->sw_conf);
0195     if (ret)
0196         return ret;
0197
0198     usi->clkreq_on = of_property_read_bool(np, "samsung,clkreq-on");
0199
0200     return 0;
0201 }
0202
0203 static int exynos_usi_get_clocks(struct exynos_usi *usi)
0204 {
0205     const size_t num = usi->data->num_clks;
0206     struct device *dev = usi->dev;
0207     size_t i;
0208
0209     if (num == 0)
0210         return 0;
0211
0212     usi->clks = devm_kcalloc(dev, num, sizeof(*usi->clks), GFP_KERNEL);
0213     if (!usi->clks)
0214         return -ENOMEM;
0215
0216     for (i = 0; i < num; ++i)
0217         usi->clks[i].id = usi->data->clk_names[i];
0218
0219     return devm_clk_bulk_get(dev, num, usi->clks);
0220 }
0221
0222 static int exynos_usi_probe(struct platform_device *pdev)
0223 {
0224     struct device *dev = &pdev->dev;
0225     struct device_node *np = dev->of_node;
0226     struct exynos_usi *usi;
0227     int ret;
0228
0229     usi = devm_kzalloc(dev, sizeof(*usi), GFP_KERNEL);
0230     if (!usi)
0231         return -ENOMEM;
0232
0233     usi->dev = dev;
0234     platform_set_drvdata(pdev, usi);
0235
0236     usi->data = of_device_get_match_data(dev);
0237     if (!usi->data)
0238         return -EINVAL;
0239
0240     ret = exynos_usi_parse_dt(np, usi);
0241     if (ret)
0242         return ret;
0243
0244     ret = exynos_usi_get_clocks(usi);
0245     if (ret)
0246         return ret;
0247
0248     if (usi->data->ver == USI_VER2) {
0249         usi->regs = devm_platform_ioremap_resource(pdev, 0);
0250         if (IS_ERR(usi->regs))
0251             return PTR_ERR(usi->regs);
0252     }
0253
0254     ret = exynos_usi_configure(usi);
0255     if (ret)
0256         return ret;
0257
0258     /* Make it possible to embed protocol nodes into USI np */
0259     return of_platform_populate(np, NULL, NULL, dev);
0260 }
0261
0262 static int __maybe_unused exynos_usi_resume_noirq(struct device *dev)
0263 {
0264     struct exynos_usi *usi = dev_get_drvdata(dev);
0265
0266     return exynos_usi_configure(usi);
0267 }
0268
0269 static const struct dev_pm_ops exynos_usi_pm = {
0270     SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(NULL, exynos_usi_resume_noirq)
0271 };
0272
0273 static struct platform_driver exynos_usi_driver = {
0274     .driver = {
0275         .name       = "exynos-usi",
0276         .pm     = &exynos_usi_pm,
0277         .of_match_table = exynos_usi_dt_match,
0278     },
0279     .probe = exynos_usi_probe,
0280 };
0281 module_platform_driver(exynos_usi_driver);
0282
0283 MODULE_DESCRIPTION("Samsung USI driver");
0284 MODULE_AUTHOR("Sam Protsenko <semen.protsenko@linaro.org>");
0285 MODULE_LICENSE("GPL");