soc/renesas/rcar-gen4-sysc.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * R-Car Gen4 System Controller
0004  *
0005  * Copyright (C) 2021 Renesas Electronics Corp.
0006  */
0007 #ifndef __SOC_RENESAS_RCAR_GEN4_SYSC_H__
0008 #define __SOC_RENESAS_RCAR_GEN4_SYSC_H__
0009
0010 #include <linux/types.h>
0011
0012 /*
0013  * Power Domain flags
0014  */
0015 #define PD_CPU      BIT(0)  /* Area contains main CPU core */
0016 #define PD_SCU      BIT(1)  /* Area contains SCU and L2 cache */
0017 #define PD_NO_CR    BIT(2)  /* Area lacks PWR{ON,OFF}CR registers */
0018
0019 #define PD_CPU_NOCR (PD_CPU | PD_NO_CR) /* CPU area lacks CR */
0020 #define PD_ALWAYS_ON    PD_NO_CR      /* Always-on area */
0021
0022 /*
0023  * Description of a Power Area
0024  */
0025 struct rcar_gen4_sysc_area {
0026     const char *name;
0027     u8 pdr;         /* PDRn */
0028     s8 parent;      /* -1 if none */
0029     u8 flags;       /* See PD_* */
0030 };
0031
0032 /*
0033  * SoC-specific Power Area Description
0034  */
0035 struct rcar_gen4_sysc_info {
0036     const struct rcar_gen4_sysc_area *areas;
0037     unsigned int num_areas;
0038 };
0039
0040 extern const struct rcar_gen4_sysc_info r8a779a0_sysc_info;
0041 extern const struct rcar_gen4_sysc_info r8a779f0_sysc_info;
0042 extern const struct rcar_gen4_sysc_info r8a779g0_sysc_info;
0043
0044 #endif /* __SOC_RENESAS_RCAR_GEN4_SYSC_H__ */