soc/renesas/rcar-gen4-sysc.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * R-Car Gen4 SYSC Power management support
0004  *
0005  * Copyright (C) 2021 Renesas Electronics Corp.
0006  */
0007
0008 #include <linux/bits.h>
0009 #include <linux/clk/renesas.h>
0010 #include <linux/delay.h>
0011 #include <linux/err.h>
0012 #include <linux/io.h>
0013 #include <linux/iopoll.h>
0014 #include <linux/kernel.h>
0015 #include <linux/mm.h>
0016 #include <linux/of_address.h>
0017 #include <linux/pm_domain.h>
0018 #include <linux/slab.h>
0019 #include <linux/spinlock.h>
0020 #include <linux/types.h>
0021
0022 #include "rcar-gen4-sysc.h"
0023
0024 /* SYSC Common */
0025 #define SYSCSR      0x000   /* SYSC Status Register */
0026 #define SYSCPONSR(x)    (0x800 + ((x) * 0x4)) /* Power-ON Status Register 0 */
0027 #define SYSCPOFFSR(x)   (0x808 + ((x) * 0x4)) /* Power-OFF Status Register */
0028 #define SYSCISCR(x) (0x810 + ((x) * 0x4)) /* Interrupt Status/Clear Register */
0029 #define SYSCIER(x)  (0x820 + ((x) * 0x4)) /* Interrupt Enable Register */
0030 #define SYSCIMR(x)  (0x830 + ((x) * 0x4)) /* Interrupt Mask Register */
0031
0032 /* Power Domain Registers */
0033 #define PDRSR(n)    (0x1000 + ((n) * 0x40))
0034 #define PDRONCR(n)  (0x1004 + ((n) * 0x40))
0035 #define PDROFFCR(n) (0x1008 + ((n) * 0x40))
0036 #define PDRESR(n)   (0x100C + ((n) * 0x40))
0037
0038 /* PWRON/PWROFF */
0039 #define PWRON_PWROFF        BIT(0)  /* Power-ON/OFF request */
0040
0041 /* PDRESR */
0042 #define PDRESR_ERR      BIT(0)
0043
0044 /* PDRSR */
0045 #define PDRSR_OFF       BIT(0)  /* Power-OFF state */
0046 #define PDRSR_ON        BIT(4)  /* Power-ON state */
0047 #define PDRSR_OFF_STATE     BIT(8)  /* Processing Power-OFF sequence */
0048 #define PDRSR_ON_STATE      BIT(12) /* Processing Power-ON sequence */
0049
0050 #define SYSCSR_BUSY     GENMASK(1, 0)   /* All bit sets is not busy */
0051
0052 #define SYSCSR_TIMEOUT      10000
0053 #define SYSCSR_DELAY_US     10
0054
0055 #define PDRESR_RETRIES      1000
0056 #define PDRESR_DELAY_US     10
0057
0058 #define SYSCISR_TIMEOUT     10000
0059 #define SYSCISR_DELAY_US    10
0060
0061 #define RCAR_GEN4_PD_ALWAYS_ON  64
0062 #define NUM_DOMAINS_EACH_REG    BITS_PER_TYPE(u32)
0063
0064 static void __iomem *rcar_gen4_sysc_base;
0065 static DEFINE_SPINLOCK(rcar_gen4_sysc_lock); /* SMP CPUs + I/O devices */
0066
0067 static int rcar_gen4_sysc_pwr_on_off(u8 pdr, bool on)
0068 {
0069     unsigned int reg_offs;
0070     u32 val;
0071     int ret;
0072
0073     if (on)
0074         reg_offs = PDRONCR(pdr);
0075     else
0076         reg_offs = PDROFFCR(pdr);
0077
0078     /* Wait until SYSC is ready to accept a power request */
0079     ret = readl_poll_timeout_atomic(rcar_gen4_sysc_base + SYSCSR, val,
0080                     (val & SYSCSR_BUSY) == SYSCSR_BUSY,
0081                     SYSCSR_DELAY_US, SYSCSR_TIMEOUT);
0082     if (ret < 0)
0083         return -EAGAIN;
0084
0085     /* Submit power shutoff or power resume request */
0086     iowrite32(PWRON_PWROFF, rcar_gen4_sysc_base + reg_offs);
0087
0088     return 0;
0089 }
0090
0091 static int clear_irq_flags(unsigned int reg_idx, unsigned int isr_mask)
0092 {
0093     u32 val;
0094     int ret;
0095
0096     iowrite32(isr_mask, rcar_gen4_sysc_base + SYSCISCR(reg_idx));
0097
0098     ret = readl_poll_timeout_atomic(rcar_gen4_sysc_base + SYSCISCR(reg_idx),
0099                     val, !(val & isr_mask),
0100                     SYSCISR_DELAY_US, SYSCISR_TIMEOUT);
0101     if (ret < 0) {
0102         pr_err("\n %s : Can not clear IRQ flags in SYSCISCR", __func__);
0103         return -EIO;
0104     }
0105
0106     return 0;
0107 }
0108
0109 static int rcar_gen4_sysc_power(u8 pdr, bool on)
0110 {
0111     unsigned int isr_mask;
0112     unsigned int reg_idx, bit_idx;
0113     unsigned int status;
0114     unsigned long flags;
0115     int ret = 0;
0116     u32 val;
0117     int k;
0118
0119     spin_lock_irqsave(&rcar_gen4_sysc_lock, flags);
0120
0121     reg_idx = pdr / NUM_DOMAINS_EACH_REG;
0122     bit_idx = pdr % NUM_DOMAINS_EACH_REG;
0123
0124     isr_mask = BIT(bit_idx);
0125
0126     /*
0127      * The interrupt source needs to be enabled, but masked, to prevent the
0128      * CPU from receiving it.
0129      */
0130     iowrite32(ioread32(rcar_gen4_sysc_base + SYSCIER(reg_idx)) | isr_mask,
0131           rcar_gen4_sysc_base + SYSCIER(reg_idx));
0132     iowrite32(ioread32(rcar_gen4_sysc_base + SYSCIMR(reg_idx)) | isr_mask,
0133           rcar_gen4_sysc_base + SYSCIMR(reg_idx));
0134
0135     ret = clear_irq_flags(reg_idx, isr_mask);
0136     if (ret)
0137         goto out;
0138
0139     /* Submit power shutoff or resume request until it was accepted */
0140     for (k = 0; k < PDRESR_RETRIES; k++) {
0141         ret = rcar_gen4_sysc_pwr_on_off(pdr, on);
0142         if (ret)
0143             goto out;
0144
0145         status = ioread32(rcar_gen4_sysc_base + PDRESR(pdr));
0146         if (!(status & PDRESR_ERR))
0147             break;
0148
0149         udelay(PDRESR_DELAY_US);
0150     }
0151
0152     if (k == PDRESR_RETRIES) {
0153         ret = -EIO;
0154         goto out;
0155     }
0156
0157     /* Wait until the power shutoff or resume request has completed * */
0158     ret = readl_poll_timeout_atomic(rcar_gen4_sysc_base + SYSCISCR(reg_idx),
0159                     val, (val & isr_mask),
0160                     SYSCISR_DELAY_US, SYSCISR_TIMEOUT);
0161     if (ret < 0) {
0162         ret = -EIO;
0163         goto out;
0164     }
0165
0166     /* Clear interrupt flags */
0167     ret = clear_irq_flags(reg_idx, isr_mask);
0168     if (ret)
0169         goto out;
0170
0171  out:
0172     spin_unlock_irqrestore(&rcar_gen4_sysc_lock, flags);
0173
0174     pr_debug("sysc power %s domain %d: %08x -> %d\n", on ? "on" : "off",
0175          pdr, ioread32(rcar_gen4_sysc_base + SYSCISCR(reg_idx)), ret);
0176     return ret;
0177 }
0178
0179 static bool rcar_gen4_sysc_power_is_off(u8 pdr)
0180 {
0181     unsigned int st;
0182
0183     st = ioread32(rcar_gen4_sysc_base + PDRSR(pdr));
0184
0185     if (st & PDRSR_OFF)
0186         return true;
0187
0188     return false;
0189 }
0190
0191 struct rcar_gen4_sysc_pd {
0192     struct generic_pm_domain genpd;
0193     u8 pdr;
0194     unsigned int flags;
0195     char name[];
0196 };
0197
0198 static inline struct rcar_gen4_sysc_pd *to_rcar_gen4_pd(struct generic_pm_domain *d)
0199 {
0200     return container_of(d, struct rcar_gen4_sysc_pd, genpd);
0201 }
0202
0203 static int rcar_gen4_sysc_pd_power_off(struct generic_pm_domain *genpd)
0204 {
0205     struct rcar_gen4_sysc_pd *pd = to_rcar_gen4_pd(genpd);
0206
0207     pr_debug("%s: %s\n", __func__, genpd->name);
0208     return rcar_gen4_sysc_power(pd->pdr, false);
0209 }
0210
0211 static int rcar_gen4_sysc_pd_power_on(struct generic_pm_domain *genpd)
0212 {
0213     struct rcar_gen4_sysc_pd *pd = to_rcar_gen4_pd(genpd);
0214
0215     pr_debug("%s: %s\n", __func__, genpd->name);
0216     return rcar_gen4_sysc_power(pd->pdr, true);
0217 }
0218
0219 static int __init rcar_gen4_sysc_pd_setup(struct rcar_gen4_sysc_pd *pd)
0220 {
0221     struct generic_pm_domain *genpd = &pd->genpd;
0222     const char *name = pd->genpd.name;
0223     int error;
0224
0225     if (pd->flags & PD_CPU) {
0226         /*
0227          * This domain contains a CPU core and therefore it should
0228          * only be turned off if the CPU is not in use.
0229          */
0230         pr_debug("PM domain %s contains %s\n", name, "CPU");
0231         genpd->flags |= GENPD_FLAG_ALWAYS_ON;
0232     } else if (pd->flags & PD_SCU) {
0233         /*
0234          * This domain contains an SCU and cache-controller, and
0235          * therefore it should only be turned off if the CPU cores are
0236          * not in use.
0237          */
0238         pr_debug("PM domain %s contains %s\n", name, "SCU");
0239         genpd->flags |= GENPD_FLAG_ALWAYS_ON;
0240     } else if (pd->flags & PD_NO_CR) {
0241         /*
0242          * This domain cannot be turned off.
0243          */
0244         genpd->flags |= GENPD_FLAG_ALWAYS_ON;
0245     }
0246
0247     if (!(pd->flags & (PD_CPU | PD_SCU))) {
0248         /* Enable Clock Domain for I/O devices */
0249         genpd->flags |= GENPD_FLAG_PM_CLK | GENPD_FLAG_ACTIVE_WAKEUP;
0250         genpd->attach_dev = cpg_mssr_attach_dev;
0251         genpd->detach_dev = cpg_mssr_detach_dev;
0252     }
0253
0254     genpd->power_off = rcar_gen4_sysc_pd_power_off;
0255     genpd->power_on = rcar_gen4_sysc_pd_power_on;
0256
0257     if (pd->flags & (PD_CPU | PD_NO_CR)) {
0258         /* Skip CPUs (handled by SMP code) and areas without control */
0259         pr_debug("%s: Not touching %s\n", __func__, genpd->name);
0260         goto finalize;
0261     }
0262
0263     if (!rcar_gen4_sysc_power_is_off(pd->pdr)) {
0264         pr_debug("%s: %s is already powered\n", __func__, genpd->name);
0265         goto finalize;
0266     }
0267
0268     rcar_gen4_sysc_power(pd->pdr, true);
0269
0270 finalize:
0271     error = pm_genpd_init(genpd, &simple_qos_governor, false);
0272     if (error)
0273         pr_err("Failed to init PM domain %s: %d\n", name, error);
0274
0275     return error;
0276 }
0277
0278 static const struct of_device_id rcar_gen4_sysc_matches[] __initconst = {
0279 #ifdef CONFIG_SYSC_R8A779A0
0280     { .compatible = "renesas,r8a779a0-sysc", .data = &r8a779a0_sysc_info },
0281 #endif
0282 #ifdef CONFIG_SYSC_R8A779F0
0283     { .compatible = "renesas,r8a779f0-sysc", .data = &r8a779f0_sysc_info },
0284 #endif
0285 #ifdef CONFIG_SYSC_R8A779G0
0286     { .compatible = "renesas,r8a779g0-sysc", .data = &r8a779g0_sysc_info },
0287 #endif
0288     { /* sentinel */ }
0289 };
0290
0291 struct rcar_gen4_pm_domains {
0292     struct genpd_onecell_data onecell_data;
0293     struct generic_pm_domain *domains[RCAR_GEN4_PD_ALWAYS_ON + 1];
0294 };
0295
0296 static struct genpd_onecell_data *rcar_gen4_sysc_onecell_data;
0297
0298 static int __init rcar_gen4_sysc_pd_init(void)
0299 {
0300     const struct rcar_gen4_sysc_info *info;
0301     const struct of_device_id *match;
0302     struct rcar_gen4_pm_domains *domains;
0303     struct device_node *np;
0304     void __iomem *base;
0305     unsigned int i;
0306     int error;
0307
0308     np = of_find_matching_node_and_match(NULL, rcar_gen4_sysc_matches, &match);
0309     if (!np)
0310         return -ENODEV;
0311
0312     info = match->data;
0313
0314     base = of_iomap(np, 0);
0315     if (!base) {
0316         pr_warn("%pOF: Cannot map regs\n", np);
0317         error = -ENOMEM;
0318         goto out_put;
0319     }
0320
0321     rcar_gen4_sysc_base = base;
0322
0323     domains = kzalloc(sizeof(*domains), GFP_KERNEL);
0324     if (!domains) {
0325         error = -ENOMEM;
0326         goto out_put;
0327     }
0328
0329     domains->onecell_data.domains = domains->domains;
0330     domains->onecell_data.num_domains = ARRAY_SIZE(domains->domains);
0331     rcar_gen4_sysc_onecell_data = &domains->onecell_data;
0332
0333     for (i = 0; i < info->num_areas; i++) {
0334         const struct rcar_gen4_sysc_area *area = &info->areas[i];
0335         struct rcar_gen4_sysc_pd *pd;
0336         size_t n;
0337
0338         if (!area->name) {
0339             /* Skip NULLified area */
0340             continue;
0341         }
0342
0343         n = strlen(area->name) + 1;
0344         pd = kzalloc(sizeof(*pd) + n, GFP_KERNEL);
0345         if (!pd) {
0346             error = -ENOMEM;
0347             goto out_put;
0348         }
0349
0350         memcpy(pd->name, area->name, n);
0351         pd->genpd.name = pd->name;
0352         pd->pdr = area->pdr;
0353         pd->flags = area->flags;
0354
0355         error = rcar_gen4_sysc_pd_setup(pd);
0356         if (error)
0357             goto out_put;
0358
0359         domains->domains[area->pdr] = &pd->genpd;
0360
0361         if (area->parent < 0)
0362             continue;
0363
0364         error = pm_genpd_add_subdomain(domains->domains[area->parent],
0365                            &pd->genpd);
0366         if (error) {
0367             pr_warn("Failed to add PM subdomain %s to parent %u\n",
0368                 area->name, area->parent);
0369             goto out_put;
0370         }
0371     }
0372
0373     error = of_genpd_add_provider_onecell(np, &domains->onecell_data);
0374
0375 out_put:
0376     of_node_put(np);
0377     return error;
0378 }
0379 early_initcall(rcar_gen4_sysc_pd_init);