soc/renesas/r8a7796-sysc.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Renesas R-Car M3-W/W+ System Controller
0004  *
0005  * Copyright (C) 2016 Glider bvba
0006  * Copyright (C) 2018-2019 Renesas Electronics Corporation
0007  */
0008
0009 #include <linux/bits.h>
0010 #include <linux/kernel.h>
0011
0012 #include <dt-bindings/power/r8a7796-sysc.h>
0013
0014 #include "rcar-sysc.h"
0015
0016 static struct rcar_sysc_area r8a7796_areas[] __initdata = {
0017     { "always-on",      0, 0, R8A7796_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
0018     { "ca57-scu",   0x1c0, 0, R8A7796_PD_CA57_SCU,  R8A7796_PD_ALWAYS_ON,
0019       PD_SCU },
0020     { "ca57-cpu0",   0x80, 0, R8A7796_PD_CA57_CPU0, R8A7796_PD_CA57_SCU,
0021       PD_CPU_NOCR },
0022     { "ca57-cpu1",   0x80, 1, R8A7796_PD_CA57_CPU1, R8A7796_PD_CA57_SCU,
0023       PD_CPU_NOCR },
0024     { "ca53-scu",   0x140, 0, R8A7796_PD_CA53_SCU,  R8A7796_PD_ALWAYS_ON,
0025       PD_SCU },
0026     { "ca53-cpu0",  0x200, 0, R8A7796_PD_CA53_CPU0, R8A7796_PD_CA53_SCU,
0027       PD_CPU_NOCR },
0028     { "ca53-cpu1",  0x200, 1, R8A7796_PD_CA53_CPU1, R8A7796_PD_CA53_SCU,
0029       PD_CPU_NOCR },
0030     { "ca53-cpu2",  0x200, 2, R8A7796_PD_CA53_CPU2, R8A7796_PD_CA53_SCU,
0031       PD_CPU_NOCR },
0032     { "ca53-cpu3",  0x200, 3, R8A7796_PD_CA53_CPU3, R8A7796_PD_CA53_SCU,
0033       PD_CPU_NOCR },
0034     { "cr7",    0x240, 0, R8A7796_PD_CR7,   R8A7796_PD_ALWAYS_ON },
0035     { "a3vc",   0x380, 0, R8A7796_PD_A3VC,  R8A7796_PD_ALWAYS_ON },
0036     { "a2vc0",  0x3c0, 0, R8A7796_PD_A2VC0, R8A7796_PD_A3VC },
0037     { "a2vc1",  0x3c0, 1, R8A7796_PD_A2VC1, R8A7796_PD_A3VC },
0038     { "3dg-a",  0x100, 0, R8A7796_PD_3DG_A, R8A7796_PD_ALWAYS_ON },
0039     { "3dg-b",  0x100, 1, R8A7796_PD_3DG_B, R8A7796_PD_3DG_A },
0040     { "a3ir",   0x180, 0, R8A7796_PD_A3IR,  R8A7796_PD_ALWAYS_ON },
0041 };
0042
0043
0044 #ifdef CONFIG_SYSC_R8A77960
0045 const struct rcar_sysc_info r8a77960_sysc_info __initconst = {
0046     .areas = r8a7796_areas,
0047     .num_areas = ARRAY_SIZE(r8a7796_areas),
0048 };
0049 #endif /* CONFIG_SYSC_R8A77960 */
0050
0051 #ifdef CONFIG_SYSC_R8A77961
0052 static int __init r8a77961_sysc_init(void)
0053 {
0054     rcar_sysc_nullify(r8a7796_areas, ARRAY_SIZE(r8a7796_areas),
0055               R8A7796_PD_A2VC0);
0056
0057     return 0;
0058 }
0059
0060 const struct rcar_sysc_info r8a77961_sysc_info __initconst = {
0061     .init = r8a77961_sysc_init,
0062     .areas = r8a7796_areas,
0063     .num_areas = ARRAY_SIZE(r8a7796_areas),
0064     .extmask_offs = 0x2f8,
0065     .extmask_val = BIT(0),
0066 };
0067 #endif /* CONFIG_SYSC_R8A77961 */