soc/renesas/r8a774e1-sysc.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Renesas RZ/G2H System Controller
0004  * Copyright (C) 2020 Renesas Electronics Corp.
0005  *
0006  * Based on Renesas R-Car H3 System Controller
0007  * Copyright (C) 2016-2017 Glider bvba
0008  */
0009
0010 #include <linux/kernel.h>
0011
0012 #include <dt-bindings/power/r8a774e1-sysc.h>
0013
0014 #include "rcar-sysc.h"
0015
0016 static const struct rcar_sysc_area r8a774e1_areas[] __initconst = {
0017     { "always-on",      0, 0, R8A774E1_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
0018     { "ca57-scu",   0x1c0, 0, R8A774E1_PD_CA57_SCU, R8A774E1_PD_ALWAYS_ON, PD_SCU },
0019     { "ca57-cpu0",   0x80, 0, R8A774E1_PD_CA57_CPU0, R8A774E1_PD_CA57_SCU, PD_CPU_NOCR },
0020     { "ca57-cpu1",   0x80, 1, R8A774E1_PD_CA57_CPU1, R8A774E1_PD_CA57_SCU, PD_CPU_NOCR },
0021     { "ca57-cpu2",   0x80, 2, R8A774E1_PD_CA57_CPU2, R8A774E1_PD_CA57_SCU, PD_CPU_NOCR },
0022     { "ca57-cpu3",   0x80, 3, R8A774E1_PD_CA57_CPU3, R8A774E1_PD_CA57_SCU, PD_CPU_NOCR },
0023     { "ca53-scu",   0x140, 0, R8A774E1_PD_CA53_SCU, R8A774E1_PD_ALWAYS_ON, PD_SCU },
0024     { "ca53-cpu0",  0x200, 0, R8A774E1_PD_CA53_CPU0, R8A774E1_PD_CA53_SCU, PD_CPU_NOCR },
0025     { "ca53-cpu1",  0x200, 1, R8A774E1_PD_CA53_CPU1, R8A774E1_PD_CA53_SCU, PD_CPU_NOCR },
0026     { "ca53-cpu2",  0x200, 2, R8A774E1_PD_CA53_CPU2, R8A774E1_PD_CA53_SCU, PD_CPU_NOCR },
0027     { "ca53-cpu3",  0x200, 3, R8A774E1_PD_CA53_CPU3, R8A774E1_PD_CA53_SCU, PD_CPU_NOCR },
0028     { "a3vp",   0x340, 0, R8A774E1_PD_A3VP, R8A774E1_PD_ALWAYS_ON },
0029     { "a3vc",   0x380, 0, R8A774E1_PD_A3VC, R8A774E1_PD_ALWAYS_ON },
0030     { "a2vc1",  0x3c0, 1, R8A774E1_PD_A2VC1, R8A774E1_PD_A3VC },
0031     { "3dg-a",  0x100, 0, R8A774E1_PD_3DG_A, R8A774E1_PD_ALWAYS_ON },
0032     { "3dg-b",  0x100, 1, R8A774E1_PD_3DG_B, R8A774E1_PD_3DG_A },
0033     { "3dg-c",  0x100, 2, R8A774E1_PD_3DG_C, R8A774E1_PD_3DG_B },
0034     { "3dg-d",  0x100, 3, R8A774E1_PD_3DG_D, R8A774E1_PD_3DG_C },
0035     { "3dg-e",  0x100, 4, R8A774E1_PD_3DG_E, R8A774E1_PD_3DG_D },
0036 };
0037
0038 const struct rcar_sysc_info r8a774e1_sysc_info __initconst = {
0039     .areas = r8a774e1_areas,
0040     .num_areas = ARRAY_SIZE(r8a774e1_areas),
0041     .extmask_offs = 0x2f8,
0042     .extmask_val = BIT(0),
0043 };