soc/renesas/r8a774c0-sysc.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Renesas RZ/G2E System Controller
0004  * Copyright (C) 2018 Renesas Electronics Corp.
0005  *
0006  * Based on Renesas R-Car E3 System Controller
0007  */
0008
0009 #include <linux/bits.h>
0010 #include <linux/kernel.h>
0011 #include <linux/sys_soc.h>
0012
0013 #include <dt-bindings/power/r8a774c0-sysc.h>
0014
0015 #include "rcar-sysc.h"
0016
0017 static struct rcar_sysc_area r8a774c0_areas[] __initdata = {
0018     { "always-on",      0, 0, R8A774C0_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
0019     { "ca53-scu",   0x140, 0, R8A774C0_PD_CA53_SCU,  R8A774C0_PD_ALWAYS_ON,
0020       PD_SCU },
0021     { "ca53-cpu0",  0x200, 0, R8A774C0_PD_CA53_CPU0, R8A774C0_PD_CA53_SCU,
0022       PD_CPU_NOCR },
0023     { "ca53-cpu1",  0x200, 1, R8A774C0_PD_CA53_CPU1, R8A774C0_PD_CA53_SCU,
0024       PD_CPU_NOCR },
0025     { "a3vc",   0x380, 0, R8A774C0_PD_A3VC, R8A774C0_PD_ALWAYS_ON },
0026     { "a2vc1",  0x3c0, 1, R8A774C0_PD_A2VC1,    R8A774C0_PD_A3VC },
0027     { "3dg-a",  0x100, 0, R8A774C0_PD_3DG_A,    R8A774C0_PD_ALWAYS_ON },
0028     { "3dg-b",  0x100, 1, R8A774C0_PD_3DG_B,    R8A774C0_PD_3DG_A },
0029 };
0030
0031 /* Fixups for RZ/G2E ES1.0 revision */
0032 static const struct soc_device_attribute r8a774c0[] __initconst = {
0033     { .soc_id = "r8a774c0", .revision = "ES1.0" },
0034     { /* sentinel */ }
0035 };
0036
0037 static int __init r8a774c0_sysc_init(void)
0038 {
0039     if (soc_device_match(r8a774c0)) {
0040         /* Fix incorrect 3DG hierarchy */
0041         swap(r8a774c0_areas[6], r8a774c0_areas[7]);
0042         r8a774c0_areas[6].parent = R8A774C0_PD_ALWAYS_ON;
0043         r8a774c0_areas[7].parent = R8A774C0_PD_3DG_B;
0044     }
0045
0046     return 0;
0047 }
0048
0049 const struct rcar_sysc_info r8a774c0_sysc_info __initconst = {
0050     .init = r8a774c0_sysc_init,
0051     .areas = r8a774c0_areas,
0052     .num_areas = ARRAY_SIZE(r8a774c0_areas),
0053     .extmask_offs = 0x2f8,
0054     .extmask_val = BIT(0),
0055 };