soc/pxa/mfp.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * linux/arch/arm/plat-pxa/mfp.c
0004  *
0005  *   Multi-Function Pin Support
0006  *
0007  * Copyright (C) 2007 Marvell Internation Ltd.
0008  *
0009  * 2007-08-21: eric miao <eric.miao@marvell.com>
0010  *             initial version
0011  */
0012
0013 #include <linux/module.h>
0014 #include <linux/kernel.h>
0015 #include <linux/init.h>
0016 #include <linux/io.h>
0017
0018 #include <linux/soc/pxa/mfp.h>
0019
0020 #define MFPR_SIZE   (PAGE_SIZE)
0021
0022 /* MFPR register bit definitions */
0023 #define MFPR_PULL_SEL       (0x1 << 15)
0024 #define MFPR_PULLUP_EN      (0x1 << 14)
0025 #define MFPR_PULLDOWN_EN    (0x1 << 13)
0026 #define MFPR_SLEEP_SEL      (0x1 << 9)
0027 #define MFPR_SLEEP_OE_N     (0x1 << 7)
0028 #define MFPR_EDGE_CLEAR     (0x1 << 6)
0029 #define MFPR_EDGE_FALL_EN   (0x1 << 5)
0030 #define MFPR_EDGE_RISE_EN   (0x1 << 4)
0031
0032 #define MFPR_SLEEP_DATA(x)  ((x) << 8)
0033 #define MFPR_DRIVE(x)       (((x) & 0x7) << 10)
0034 #define MFPR_AF_SEL(x)      (((x) & 0x7) << 0)
0035
0036 #define MFPR_EDGE_NONE      (0)
0037 #define MFPR_EDGE_RISE      (MFPR_EDGE_RISE_EN)
0038 #define MFPR_EDGE_FALL      (MFPR_EDGE_FALL_EN)
0039 #define MFPR_EDGE_BOTH      (MFPR_EDGE_RISE | MFPR_EDGE_FALL)
0040
0041 /*
0042  * Table that determines the low power modes outputs, with actual settings
0043  * used in parentheses for don't-care values. Except for the float output,
0044  * the configured driven and pulled levels match, so if there is a need for
0045  * non-LPM pulled output, the same configuration could probably be used.
0046  *
0047  * Output value  sleep_oe_n  sleep_data  pullup_en  pulldown_en  pull_sel
0048  *                 (bit 7)    (bit 8)    (bit 14)     (bit 13)   (bit 15)
0049  *
0050  * Input            0          X(0)        X(0)        X(0)       0
0051  * Drive 0          0          0           0           X(1)       0
0052  * Drive 1          0          1           X(1)        0      0
0053  * Pull hi (1)      1          X(1)        1           0      0
0054  * Pull lo (0)      1          X(0)        0           1      0
0055  * Z (float)        1          X(0)        0           0      0
0056  */
0057 #define MFPR_LPM_INPUT      (0)
0058 #define MFPR_LPM_DRIVE_LOW  (MFPR_SLEEP_DATA(0) | MFPR_PULLDOWN_EN)
0059 #define MFPR_LPM_DRIVE_HIGH     (MFPR_SLEEP_DATA(1) | MFPR_PULLUP_EN)
0060 #define MFPR_LPM_PULL_LOW       (MFPR_LPM_DRIVE_LOW  | MFPR_SLEEP_OE_N)
0061 #define MFPR_LPM_PULL_HIGH      (MFPR_LPM_DRIVE_HIGH | MFPR_SLEEP_OE_N)
0062 #define MFPR_LPM_FLOAT          (MFPR_SLEEP_OE_N)
0063 #define MFPR_LPM_MASK       (0xe080)
0064
0065 /*
0066  * The pullup and pulldown state of the MFP pin at run mode is by default
0067  * determined by the selected alternate function. In case that some buggy
0068  * devices need to override this default behavior,  the definitions below
0069  * indicates the setting of corresponding MFPR bits
0070  *
0071  * Definition       pull_sel  pullup_en  pulldown_en
0072  * MFPR_PULL_NONE       0         0        0
0073  * MFPR_PULL_LOW        1         0        1
0074  * MFPR_PULL_HIGH       1         1        0
0075  * MFPR_PULL_BOTH       1         1        1
0076  * MFPR_PULL_FLOAT  1         0        0
0077  */
0078 #define MFPR_PULL_NONE      (0)
0079 #define MFPR_PULL_LOW       (MFPR_PULL_SEL | MFPR_PULLDOWN_EN)
0080 #define MFPR_PULL_BOTH      (MFPR_PULL_LOW | MFPR_PULLUP_EN)
0081 #define MFPR_PULL_HIGH      (MFPR_PULL_SEL | MFPR_PULLUP_EN)
0082 #define MFPR_PULL_FLOAT     (MFPR_PULL_SEL)
0083
0084 /* mfp_spin_lock is used to ensure that MFP register configuration
0085  * (most likely a read-modify-write operation) is atomic, and that
0086  * mfp_table[] is consistent
0087  */
0088 static DEFINE_SPINLOCK(mfp_spin_lock);
0089
0090 static void __iomem *mfpr_mmio_base;
0091
0092 struct mfp_pin {
0093     unsigned long   config;     /* -1 for not configured */
0094     unsigned long   mfpr_off;   /* MFPRxx Register offset */
0095     unsigned long   mfpr_run;   /* Run-Mode Register Value */
0096     unsigned long   mfpr_lpm;   /* Low Power Mode Register Value */
0097 };
0098
0099 static struct mfp_pin mfp_table[MFP_PIN_MAX];
0100
0101 /* mapping of MFP_LPM_* definitions to MFPR_LPM_* register bits */
0102 static const unsigned long mfpr_lpm[] = {
0103     MFPR_LPM_INPUT,
0104     MFPR_LPM_DRIVE_LOW,
0105     MFPR_LPM_DRIVE_HIGH,
0106     MFPR_LPM_PULL_LOW,
0107     MFPR_LPM_PULL_HIGH,
0108     MFPR_LPM_FLOAT,
0109     MFPR_LPM_INPUT,
0110 };
0111
0112 /* mapping of MFP_PULL_* definitions to MFPR_PULL_* register bits */
0113 static const unsigned long mfpr_pull[] = {
0114     MFPR_PULL_NONE,
0115     MFPR_PULL_LOW,
0116     MFPR_PULL_HIGH,
0117     MFPR_PULL_BOTH,
0118     MFPR_PULL_FLOAT,
0119 };
0120
0121 /* mapping of MFP_LPM_EDGE_* definitions to MFPR_EDGE_* register bits */
0122 static const unsigned long mfpr_edge[] = {
0123     MFPR_EDGE_NONE,
0124     MFPR_EDGE_RISE,
0125     MFPR_EDGE_FALL,
0126     MFPR_EDGE_BOTH,
0127 };
0128
0129 #define mfpr_readl(off)         \
0130     __raw_readl(mfpr_mmio_base + (off))
0131
0132 #define mfpr_writel(off, val)       \
0133     __raw_writel(val, mfpr_mmio_base + (off))
0134
0135 #define mfp_configured(p)   ((p)->config != -1)
0136
0137 /*
0138  * perform a read-back of any valid MFPR register to make sure the
0139  * previous writings are finished
0140  */
0141 static unsigned long mfpr_off_readback;
0142 #define mfpr_sync() (void)__raw_readl(mfpr_mmio_base + mfpr_off_readback)
0143
0144 static inline void __mfp_config_run(struct mfp_pin *p)
0145 {
0146     if (mfp_configured(p))
0147         mfpr_writel(p->mfpr_off, p->mfpr_run);
0148 }
0149
0150 static inline void __mfp_config_lpm(struct mfp_pin *p)
0151 {
0152     if (mfp_configured(p)) {
0153         unsigned long mfpr_clr = (p->mfpr_run & ~MFPR_EDGE_BOTH) | MFPR_EDGE_CLEAR;
0154         if (mfpr_clr != p->mfpr_run)
0155             mfpr_writel(p->mfpr_off, mfpr_clr);
0156         if (p->mfpr_lpm != mfpr_clr)
0157             mfpr_writel(p->mfpr_off, p->mfpr_lpm);
0158     }
0159 }
0160
0161 void mfp_config(unsigned long *mfp_cfgs, int num)
0162 {
0163     unsigned long flags;
0164     int i;
0165
0166     spin_lock_irqsave(&mfp_spin_lock, flags);
0167
0168     for (i = 0; i < num; i++, mfp_cfgs++) {
0169         unsigned long tmp, c = *mfp_cfgs;
0170         struct mfp_pin *p;
0171         int pin, af, drv, lpm, edge, pull;
0172
0173         pin = MFP_PIN(c);
0174         BUG_ON(pin >= MFP_PIN_MAX);
0175         p = &mfp_table[pin];
0176
0177         af  = MFP_AF(c);
0178         drv = MFP_DS(c);
0179         lpm = MFP_LPM_STATE(c);
0180         edge = MFP_LPM_EDGE(c);
0181         pull = MFP_PULL(c);
0182
0183         /* run-mode pull settings will conflict with MFPR bits of
0184          * low power mode state,  calculate mfpr_run and mfpr_lpm
0185          * individually if pull != MFP_PULL_NONE
0186          */
0187         tmp = MFPR_AF_SEL(af) | MFPR_DRIVE(drv);
0188
0189         if (likely(pull == MFP_PULL_NONE)) {
0190             p->mfpr_run = tmp | mfpr_lpm[lpm] | mfpr_edge[edge];
0191             p->mfpr_lpm = p->mfpr_run;
0192         } else {
0193             p->mfpr_lpm = tmp | mfpr_lpm[lpm] | mfpr_edge[edge];
0194             p->mfpr_run = tmp | mfpr_pull[pull];
0195         }
0196
0197         p->config = c; __mfp_config_run(p);
0198     }
0199
0200     mfpr_sync();
0201     spin_unlock_irqrestore(&mfp_spin_lock, flags);
0202 }
0203
0204 unsigned long mfp_read(int mfp)
0205 {
0206     unsigned long val, flags;
0207
0208     BUG_ON(mfp < 0 || mfp >= MFP_PIN_MAX);
0209
0210     spin_lock_irqsave(&mfp_spin_lock, flags);
0211     val = mfpr_readl(mfp_table[mfp].mfpr_off);
0212     spin_unlock_irqrestore(&mfp_spin_lock, flags);
0213
0214     return val;
0215 }
0216
0217 void mfp_write(int mfp, unsigned long val)
0218 {
0219     unsigned long flags;
0220
0221     BUG_ON(mfp < 0 || mfp >= MFP_PIN_MAX);
0222
0223     spin_lock_irqsave(&mfp_spin_lock, flags);
0224     mfpr_writel(mfp_table[mfp].mfpr_off, val);
0225     mfpr_sync();
0226     spin_unlock_irqrestore(&mfp_spin_lock, flags);
0227 }
0228
0229 void __init mfp_init_base(void __iomem *mfpr_base)
0230 {
0231     int i;
0232
0233     /* initialize the table with default - unconfigured */
0234     for (i = 0; i < ARRAY_SIZE(mfp_table); i++)
0235         mfp_table[i].config = -1;
0236
0237     mfpr_mmio_base = mfpr_base;
0238 }
0239
0240 void __init mfp_init_addr(struct mfp_addr_map *map)
0241 {
0242     struct mfp_addr_map *p;
0243     unsigned long offset, flags;
0244     int i;
0245
0246     spin_lock_irqsave(&mfp_spin_lock, flags);
0247
0248     /* mfp offset for readback */
0249     mfpr_off_readback = map[0].offset;
0250
0251     for (p = map; p->start != MFP_PIN_INVALID; p++) {
0252         offset = p->offset;
0253         i = p->start;
0254
0255         do {
0256             mfp_table[i].mfpr_off = offset;
0257             mfp_table[i].mfpr_run = 0;
0258             mfp_table[i].mfpr_lpm = 0;
0259             offset += 4; i++;
0260         } while ((i <= p->end) && (p->end != -1));
0261     }
0262
0263     spin_unlock_irqrestore(&mfp_spin_lock, flags);
0264 }
0265
0266 void mfp_config_lpm(void)
0267 {
0268     struct mfp_pin *p = &mfp_table[0];
0269     int pin;
0270
0271     for (pin = 0; pin < ARRAY_SIZE(mfp_table); pin++, p++)
0272         __mfp_config_lpm(p);
0273 }
0274
0275 void mfp_config_run(void)
0276 {
0277     struct mfp_pin *p = &mfp_table[0];
0278     int pin;
0279
0280     for (pin = 0; pin < ARRAY_SIZE(mfp_table); pin++, p++)
0281         __mfp_config_run(p);
0282 }