soc/mediatek/mt8167-mmsys.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002
0003 #ifndef __SOC_MEDIATEK_MT8167_MMSYS_H
0004 #define __SOC_MEDIATEK_MT8167_MMSYS_H
0005
0006 #define MT8167_DISP_REG_CONFIG_DISP_OVL0_MOUT_EN    0x030
0007 #define MT8167_DISP_REG_CONFIG_DISP_DITHER_MOUT_EN  0x038
0008 #define MT8167_DISP_REG_CONFIG_DISP_COLOR0_SEL_IN   0x058
0009 #define MT8167_DISP_REG_CONFIG_DISP_DSI0_SEL_IN     0x064
0010 #define MT8167_DISP_REG_CONFIG_DISP_RDMA0_SOUT_SEL_IN   0x06c
0011
0012 #define MT8167_DITHER_MOUT_EN_RDMA0         0x1
0013 #define MT8167_RDMA0_SOUT_DSI0              0x2
0014 #define MT8167_DSI0_SEL_IN_RDMA0            0x1
0015
0016 static const struct mtk_mmsys_routes mt8167_mmsys_routing_table[] = {
0017     {
0018         DDP_COMPONENT_OVL0, DDP_COMPONENT_COLOR0,
0019         MT8167_DISP_REG_CONFIG_DISP_OVL0_MOUT_EN, OVL0_MOUT_EN_COLOR0,
0020     }, {
0021         DDP_COMPONENT_DITHER0, DDP_COMPONENT_RDMA0,
0022         MT8167_DISP_REG_CONFIG_DISP_DITHER_MOUT_EN, MT8167_DITHER_MOUT_EN_RDMA0
0023     }, {
0024         DDP_COMPONENT_OVL0, DDP_COMPONENT_COLOR0,
0025         MT8167_DISP_REG_CONFIG_DISP_COLOR0_SEL_IN, COLOR0_SEL_IN_OVL0
0026     }, {
0027         DDP_COMPONENT_RDMA0, DDP_COMPONENT_DSI0,
0028         MT8167_DISP_REG_CONFIG_DISP_DSI0_SEL_IN, MT8167_DSI0_SEL_IN_RDMA0
0029     }, {
0030         DDP_COMPONENT_RDMA0, DDP_COMPONENT_DSI0,
0031         MT8167_DISP_REG_CONFIG_DISP_RDMA0_SOUT_SEL_IN, MT8167_RDMA0_SOUT_DSI0
0032     },
0033 };
0034
0035 #endif /* __SOC_MEDIATEK_MT8167_MMSYS_H */