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0012 #include <linux/kernel.h>
0013 #include <linux/errno.h>
0014 #include <linux/export.h>
0015 #include <linux/io.h>
0016 #include <soc/fsl/qe/immap_qe.h>
0017 #include <soc/fsl/qe/qe.h>
0018
0019 int qe_usb_clock_set(enum qe_clock clk, int rate)
0020 {
0021 struct qe_mux __iomem *mux = &qe_immr->qmx;
0022 unsigned long flags;
0023 u32 val;
0024
0025 switch (clk) {
0026 case QE_CLK3: val = QE_CMXGCR_USBCS_CLK3; break;
0027 case QE_CLK5: val = QE_CMXGCR_USBCS_CLK5; break;
0028 case QE_CLK7: val = QE_CMXGCR_USBCS_CLK7; break;
0029 case QE_CLK9: val = QE_CMXGCR_USBCS_CLK9; break;
0030 case QE_CLK13: val = QE_CMXGCR_USBCS_CLK13; break;
0031 case QE_CLK17: val = QE_CMXGCR_USBCS_CLK17; break;
0032 case QE_CLK19: val = QE_CMXGCR_USBCS_CLK19; break;
0033 case QE_CLK21: val = QE_CMXGCR_USBCS_CLK21; break;
0034 case QE_BRG9: val = QE_CMXGCR_USBCS_BRG9; break;
0035 case QE_BRG10: val = QE_CMXGCR_USBCS_BRG10; break;
0036 default:
0037 pr_err("%s: requested unknown clock %d\n", __func__, clk);
0038 return -EINVAL;
0039 }
0040
0041 if (qe_clock_is_brg(clk))
0042 qe_setbrg(clk, rate, 1);
0043
0044 spin_lock_irqsave(&cmxgcr_lock, flags);
0045
0046 qe_clrsetbits_be32(&mux->cmxgcr, QE_CMXGCR_USBCS, val);
0047
0048 spin_unlock_irqrestore(&cmxgcr_lock, flags);
0049
0050 return 0;
0051 }
0052 EXPORT_SYMBOL(qe_usb_clock_set);