fsl/qbman/dpaa_sys.h

0001 /* Copyright 2008 - 2016 Freescale Semiconductor, Inc.
0002  *
0003  * Redistribution and use in source and binary forms, with or without
0004  * modification, are permitted provided that the following conditions are met:
0005  *     * Redistributions of source code must retain the above copyright
0006  *   notice, this list of conditions and the following disclaimer.
0007  *     * Redistributions in binary form must reproduce the above copyright
0008  *   notice, this list of conditions and the following disclaimer in the
0009  *   documentation and/or other materials provided with the distribution.
0010  *     * Neither the name of Freescale Semiconductor nor the
0011  *   names of its contributors may be used to endorse or promote products
0012  *   derived from this software without specific prior written permission.
0013  *
0014  * ALTERNATIVELY, this software may be distributed under the terms of the
0015  * GNU General Public License ("GPL") as published by the Free Software
0016  * Foundation, either version 2 of that License or (at your option) any
0017  * later version.
0018  *
0019  * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
0020  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
0021  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
0022  * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
0023  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
0024  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
0025  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
0026  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
0027  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
0028  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0029  */
0030
0031 #ifndef __DPAA_SYS_H
0032 #define __DPAA_SYS_H
0033
0034 #include <linux/cpu.h>
0035 #include <linux/slab.h>
0036 #include <linux/module.h>
0037 #include <linux/interrupt.h>
0038 #include <linux/kthread.h>
0039 #include <linux/sched/signal.h>
0040 #include <linux/vmalloc.h>
0041 #include <linux/platform_device.h>
0042 #include <linux/of.h>
0043 #include <linux/of_reserved_mem.h>
0044 #include <linux/prefetch.h>
0045 #include <linux/genalloc.h>
0046 #include <asm/cacheflush.h>
0047 #include <linux/io.h>
0048 #include <linux/delay.h>
0049
0050 /* For 2-element tables related to cache-inhibited and cache-enabled mappings */
0051 #define DPAA_PORTAL_CE 0
0052 #define DPAA_PORTAL_CI 1
0053
0054 static inline void dpaa_flush(void *p)
0055 {
0056     /*
0057      * Only PPC needs to flush the cache currently - on ARM the mapping
0058      * is non cacheable
0059      */
0060 #ifdef CONFIG_PPC
0061     flush_dcache_range((unsigned long)p, (unsigned long)p+64);
0062 #endif
0063 }
0064
0065 #define dpaa_invalidate(p) dpaa_flush(p)
0066
0067 #define dpaa_zero(p) memset(p, 0, 64)
0068
0069 static inline void dpaa_touch_ro(void *p)
0070 {
0071 #if (L1_CACHE_BYTES == 32)
0072     prefetch(p+32);
0073 #endif
0074     prefetch(p);
0075 }
0076
0077 /* Commonly used combo */
0078 static inline void dpaa_invalidate_touch_ro(void *p)
0079 {
0080     dpaa_invalidate(p);
0081     dpaa_touch_ro(p);
0082 }
0083
0084
0085 #ifdef CONFIG_FSL_DPAA_CHECKING
0086 #define DPAA_ASSERT(x) WARN_ON(!(x))
0087 #else
0088 #define DPAA_ASSERT(x)
0089 #endif
0090
0091 /* cyclic helper for rings */
0092 static inline u8 dpaa_cyc_diff(u8 ringsize, u8 first, u8 last)
0093 {
0094     /* 'first' is included, 'last' is excluded */
0095     if (first <= last)
0096         return last - first;
0097     return ringsize + last - first;
0098 }
0099
0100 /* Offset applied to genalloc pools due to zero being an error return */
0101 #define DPAA_GENALLOC_OFF   0x80000000
0102
0103 /* Initialize the devices private memory region */
0104 int qbman_init_private_mem(struct device *dev, int idx, dma_addr_t *addr,
0105                 size_t *size);
0106
0107 /* memremap() attributes for different platforms */
0108 #ifdef CONFIG_PPC
0109 #define QBMAN_MEMREMAP_ATTR MEMREMAP_WB
0110 #else
0111 #define QBMAN_MEMREMAP_ATTR MEMREMAP_WC
0112 #endif
0113
0114 static inline int dpaa_set_portal_irq_affinity(struct device *dev,
0115                            int irq, int cpu)
0116 {
0117     int ret = 0;
0118
0119     if (!irq_can_set_affinity(irq)) {
0120         dev_err(dev, "unable to set IRQ affinity\n");
0121         return -EINVAL;
0122     }
0123
0124     if (cpu == -1 || !cpu_online(cpu))
0125         cpu = cpumask_any(cpu_online_mask);
0126
0127     ret = irq_set_affinity(irq, cpumask_of(cpu));
0128     if (ret)
0129         dev_err(dev, "irq_set_affinity() on CPU %d failed\n", cpu);
0130
0131     return ret;
0132 }
0133
0134 #endif  /* __DPAA_SYS_H */