0001
0002 #include <linux/sh_intc.h>
0003 #include <linux/irq.h>
0004 #include <linux/irqdomain.h>
0005 #include <linux/list.h>
0006 #include <linux/kernel.h>
0007 #include <linux/types.h>
0008 #include <linux/radix-tree.h>
0009 #include <linux/device.h>
0010
0011 #define _INTC_MK(fn, mode, addr_e, addr_d, width, shift) \
0012 ((shift) | ((width) << 5) | ((fn) << 9) | ((mode) << 13) | \
0013 ((addr_e) << 16) | ((addr_d << 24)))
0014
0015 #define _INTC_SHIFT(h) (h & 0x1f)
0016 #define _INTC_WIDTH(h) ((h >> 5) & 0xf)
0017 #define _INTC_FN(h) ((h >> 9) & 0xf)
0018 #define _INTC_MODE(h) ((h >> 13) & 0x7)
0019 #define _INTC_ADDR_E(h) ((h >> 16) & 0xff)
0020 #define _INTC_ADDR_D(h) ((h >> 24) & 0xff)
0021
0022 #ifdef CONFIG_SMP
0023 #define IS_SMP(x) (x.smp)
0024 #define INTC_REG(d, x, c) (d->reg[(x)] + ((d->smp[(x)] & 0xff) * c))
0025 #define SMP_NR(d, x) ((d->smp[(x)] >> 8) ? (d->smp[(x)] >> 8) : 1)
0026 #else
0027 #define IS_SMP(x) 0
0028 #define INTC_REG(d, x, c) (d->reg[(x)])
0029 #define SMP_NR(d, x) 1
0030 #endif
0031
0032 struct intc_handle_int {
0033 unsigned int irq;
0034 unsigned long handle;
0035 };
0036
0037 struct intc_window {
0038 phys_addr_t phys;
0039 void __iomem *virt;
0040 unsigned long size;
0041 };
0042
0043 struct intc_map_entry {
0044 intc_enum enum_id;
0045 struct intc_desc_int *desc;
0046 };
0047
0048 struct intc_subgroup_entry {
0049 unsigned int pirq;
0050 intc_enum enum_id;
0051 unsigned long handle;
0052 };
0053
0054 struct intc_desc_int {
0055 struct list_head list;
0056 struct device dev;
0057 struct radix_tree_root tree;
0058 raw_spinlock_t lock;
0059 unsigned int index;
0060 unsigned long *reg;
0061 #ifdef CONFIG_SMP
0062 unsigned long *smp;
0063 #endif
0064 unsigned int nr_reg;
0065 struct intc_handle_int *prio;
0066 unsigned int nr_prio;
0067 struct intc_handle_int *sense;
0068 unsigned int nr_sense;
0069 struct intc_window *window;
0070 unsigned int nr_windows;
0071 struct irq_domain *domain;
0072 struct irq_chip chip;
0073 bool skip_suspend;
0074 };
0075
0076
0077 enum {
0078 REG_FN_ERR = 0,
0079 REG_FN_TEST_BASE = 1,
0080 REG_FN_WRITE_BASE = 5,
0081 REG_FN_MODIFY_BASE = 9
0082 };
0083
0084 enum { MODE_ENABLE_REG = 0,
0085 MODE_MASK_REG,
0086 MODE_DUAL_REG,
0087 MODE_PRIO_REG,
0088 MODE_PCLR_REG,
0089 };
0090
0091 static inline struct intc_desc_int *get_intc_desc(unsigned int irq)
0092 {
0093 struct irq_chip *chip = irq_get_chip(irq);
0094
0095 return container_of(chip, struct intc_desc_int, chip);
0096 }
0097
0098
0099
0100
0101 static inline void activate_irq(int irq)
0102 {
0103 irq_modify_status(irq, IRQ_NOREQUEST, IRQ_NOPROBE);
0104 }
0105
0106 static inline int intc_handle_int_cmp(const void *a, const void *b)
0107 {
0108 const struct intc_handle_int *_a = a;
0109 const struct intc_handle_int *_b = b;
0110
0111 return _a->irq - _b->irq;
0112 }
0113
0114
0115 extern unsigned long
0116 (*intc_reg_fns[])(unsigned long addr, unsigned long h, unsigned long data);
0117
0118 extern unsigned long
0119 (*intc_enable_fns[])(unsigned long addr, unsigned long handle,
0120 unsigned long (*fn)(unsigned long,
0121 unsigned long, unsigned long),
0122 unsigned int irq);
0123 extern unsigned long
0124 (*intc_disable_fns[])(unsigned long addr, unsigned long handle,
0125 unsigned long (*fn)(unsigned long,
0126 unsigned long, unsigned long),
0127 unsigned int irq);
0128 extern unsigned long
0129 (*intc_enable_noprio_fns[])(unsigned long addr, unsigned long handle,
0130 unsigned long (*fn)(unsigned long,
0131 unsigned long, unsigned long),
0132 unsigned int irq);
0133
0134 unsigned long intc_phys_to_virt(struct intc_desc_int *d, unsigned long address);
0135 unsigned int intc_get_reg(struct intc_desc_int *d, unsigned long address);
0136 unsigned int intc_set_field_from_handle(unsigned int value,
0137 unsigned int field_value,
0138 unsigned int handle);
0139 unsigned long intc_get_field_from_handle(unsigned int value,
0140 unsigned int handle);
0141
0142
0143 #ifdef CONFIG_INTC_BALANCING
0144 void intc_balancing_enable(unsigned int irq);
0145 void intc_balancing_disable(unsigned int irq);
0146 void intc_set_dist_handle(unsigned int irq, struct intc_desc *desc,
0147 struct intc_desc_int *d, intc_enum id);
0148 #else
0149 static inline void intc_balancing_enable(unsigned int irq) { }
0150 static inline void intc_balancing_disable(unsigned int irq) { }
0151 static inline void
0152 intc_set_dist_handle(unsigned int irq, struct intc_desc *desc,
0153 struct intc_desc_int *d, intc_enum id) { }
0154 #endif
0155
0156
0157 extern struct irq_chip intc_irq_chip;
0158 void _intc_enable(struct irq_data *data, unsigned long handle);
0159
0160
0161 extern struct list_head intc_list;
0162 extern raw_spinlock_t intc_big_lock;
0163 extern struct bus_type intc_subsys;
0164
0165 unsigned int intc_get_dfl_prio_level(void);
0166 unsigned int intc_get_prio_level(unsigned int irq);
0167 void intc_set_prio_level(unsigned int irq, unsigned int level);
0168
0169
0170 unsigned int intc_get_mask_handle(struct intc_desc *desc,
0171 struct intc_desc_int *d,
0172 intc_enum enum_id, int do_grps);
0173 unsigned int intc_get_prio_handle(struct intc_desc *desc,
0174 struct intc_desc_int *d,
0175 intc_enum enum_id, int do_grps);
0176 unsigned int intc_get_sense_handle(struct intc_desc *desc,
0177 struct intc_desc_int *d,
0178 intc_enum enum_id);
0179 void intc_set_ack_handle(unsigned int irq, struct intc_desc *desc,
0180 struct intc_desc_int *d, intc_enum id);
0181 unsigned long intc_get_ack_handle(unsigned int irq);
0182 void intc_enable_disable_enum(struct intc_desc *desc, struct intc_desc_int *d,
0183 intc_enum enum_id, int enable);
0184
0185
0186 void intc_irq_domain_init(struct intc_desc_int *d, struct intc_hw_desc *hw);
0187
0188
0189 void intc_subgroup_init(struct intc_desc *desc, struct intc_desc_int *d);
0190 void intc_irq_xlate_set(unsigned int irq, intc_enum id, struct intc_desc_int *d);
0191 struct intc_map_entry *intc_irq_xlate_get(unsigned int irq);