0001 # SPDX-License-Identifier: GPL-2.0-only
0002 config SH_INTC
0003 bool
0004 select IRQ_DOMAIN
0005
0006 if SH_INTC
0007
0008 comment "Interrupt controller options"
0009
0010 config INTC_USERIMASK
0011 bool "Userspace interrupt masking support"
0012 depends on (SUPERH && CPU_SH4A) || COMPILE_TEST
0013 help
0014 This enables support for hardware-assisted userspace hardirq
0015 masking.
0016
0017 SH-4A and newer interrupt blocks all support a special shadowed
0018 page with all non-masking registers obscured when mapped in to
0019 userspace. This is primarily for use by userspace device
0020 drivers that are using special priority levels.
0021
0022 If in doubt, say N.
0023
0024 config INTC_BALANCING
0025 bool "Hardware IRQ balancing support"
0026 depends on SMP && SUPERH && CPU_SHX3
0027 help
0028 This enables support for IRQ auto-distribution mode on SH-X3
0029 SMP parts. All of the balancing and CPU wakeup decisions are
0030 taken care of automatically by hardware for distributed
0031 vectors.
0032
0033 If in doubt, say N.
0034
0035 config INTC_MAPPING_DEBUG
0036 bool "Expose IRQ to per-controller id mapping via debugfs"
0037 depends on DEBUG_FS
0038 help
0039 This will create a debugfs entry for showing the relationship
0040 between system IRQs and the per-controller id tables.
0041
0042 If in doubt, say N.
0043
0044 endif
