0001
0002 #ifndef _WD719X_H_
0003 #define _WD719X_H_
0004
0005 #define WD719X_SG 255
0006
0007 struct wd719x_sglist {
0008 __le32 ptr;
0009 __le32 length;
0010 } __packed;
0011
0012 enum wd719x_card_type {
0013 WD719X_TYPE_UNKNOWN = 0,
0014 WD719X_TYPE_7193,
0015 WD719X_TYPE_7197,
0016 WD719X_TYPE_7296,
0017 };
0018
0019 union wd719x_regs {
0020 __le32 all;
0021 struct {
0022 u8 OPC;
0023 u8 SCSI;
0024 u8 SUE;
0025 u8 INT;
0026 } bytes;
0027 };
0028
0029
0030 struct wd719x_scb {
0031 __le32 Int_SCB;
0032 u8 SCB_opcode;
0033 u8 CDB_tag;
0034 u8 lun;
0035 u8 devid;
0036 u8 CDB[16];
0037 __le32 data_p;
0038 __le32 data_length;
0039 __le32 CDB_link;
0040 __le32 sense_buf;
0041 u8 sense_buf_length;
0042 u8 reserved;
0043 u8 SCB_options;
0044 u8 SCB_tag_msg;
0045
0046 __le32 req_ptr;
0047 u8 host_opcode;
0048 u8 scsi_stat;
0049 u8 ret_error;
0050 u8 int_stat;
0051 __le32 transferred;
0052 u8 last_trans[3];
0053 u8 length;
0054 u8 sync_offset;
0055 u8 sync_rate;
0056 u8 flags[2];
0057
0058 dma_addr_t phys;
0059 dma_addr_t dma_handle;
0060 struct scsi_cmnd *cmd;
0061 struct list_head list;
0062 struct wd719x_sglist sg_list[WD719X_SG] __aligned(8);
0063 } __packed;
0064
0065 struct wd719x {
0066 struct Scsi_Host *sh;
0067 struct pci_dev *pdev;
0068 void __iomem *base;
0069 enum wd719x_card_type type;
0070 void *fw_virt;
0071 dma_addr_t fw_phys;
0072 size_t fw_size;
0073 struct wd719x_host_param *params;
0074 dma_addr_t params_phys;
0075 void *hash_virt;
0076 dma_addr_t hash_phys;
0077 struct list_head active_scbs;
0078 };
0079
0080
0081 #define WD719X_WAIT_FOR_CMD_READY 500
0082 #define WD719X_WAIT_FOR_RISC 2000
0083 #define WD719X_WAIT_FOR_SCSI_RESET 3000000
0084
0085
0086 #define WD719X_CMD_READY 0x00
0087 #define WD719X_CMD_INIT_RISC 0x01
0088
0089 #define WD719X_CMD_BUSRESET 0x03
0090 #define WD719X_CMD_READ_FIRMVER 0x04
0091 #define WD719X_CMD_ECHO_BYTES 0x05
0092
0093
0094 #define WD719X_CMD_GET_PARAM 0x08
0095 #define WD719X_CMD_SET_PARAM 0x09
0096 #define WD719X_CMD_SLEEP 0x0a
0097 #define WD719X_CMD_READ_INIT 0x0b
0098 #define WD719X_CMD_RESTORE_INIT 0x0c
0099
0100
0101
0102 #define WD719X_CMD_ABORT_TAG 0x10
0103 #define WD719X_CMD_ABORT 0x11
0104 #define WD719X_CMD_RESET 0x12
0105 #define WD719X_CMD_INIT_SCAM 0x13
0106 #define WD719X_CMD_GET_SYNC 0x14
0107 #define WD719X_CMD_SET_SYNC 0x15
0108 #define WD719X_CMD_GET_WIDTH 0x16
0109 #define WD719X_CMD_SET_WIDTH 0x17
0110 #define WD719X_CMD_GET_TAGS 0x18
0111 #define WD719X_CMD_SET_TAGS 0x19
0112 #define WD719X_CMD_GET_PARAM2 0x1a
0113 #define WD719X_CMD_SET_PARAM2 0x1b
0114
0115 #define WD719X_CMD_PROCESS_SCB 0x80
0116
0117
0118
0119 #define WD719X_INT_NONE 0x00
0120 #define WD719X_INT_NOERRORS 0x01
0121 #define WD719X_INT_LINKNOERRORS 0x02
0122 #define WD719X_INT_LINKNOSTATUS 0x03
0123 #define WD719X_INT_ERRORSLOGGED 0x04
0124 #define WD719X_INT_SPIDERFAILED 0x05
0125 #define WD719X_INT_BADINT 0x80
0126 #define WD719X_INT_PIOREADY 0xf0
0127
0128
0129 #define WD719X_SUE_NOERRORS 0x00
0130 #define WD719X_SUE_REJECTED 0x01
0131 #define WD719X_SUE_SCBQFULL 0x02
0132
0133 #define WD719X_SUE_TERM 0x04
0134 #define WD719X_SUE_CHAN1PAR 0x05
0135 #define WD719X_SUE_CHAN1ABORT 0x06
0136 #define WD719X_SUE_CHAN23PAR 0x07
0137 #define WD719X_SUE_CHAN23ABORT 0x08
0138 #define WD719X_SUE_TIMEOUT 0x10
0139 #define WD719X_SUE_RESET 0x11
0140 #define WD719X_SUE_BUSERROR 0x12
0141 #define WD719X_SUE_WRONGWAY 0x13
0142 #define WD719X_SUE_BADPHASE 0x14
0143 #define WD719X_SUE_TOOLONG 0x15
0144 #define WD719X_SUE_BUSFREE 0x16
0145 #define WD719X_SUE_ARSDONE 0x17
0146 #define WD719X_SUE_IGNORED 0x18
0147 #define WD719X_SUE_WRONGTAGS 0x19
0148 #define WD719X_SUE_BADTAGS 0x1a
0149 #define WD719X_SUE_NOSCAMID 0x1b
0150
0151
0152 #define WD719X_HASH_TABLE_SIZE 4096
0153
0154
0155
0156 #define WD719X_AMR_COMMAND 0x00
0157 #define WD719X_AMR_CMD_PARAM 0x01
0158 #define WD719X_AMR_CMD_PARAM_2 0x02
0159 #define WD719X_AMR_CMD_PARAM_3 0x03
0160 #define WD719X_AMR_SCB_IN 0x04
0161
0162 #define WD719X_AMR_BIOS_SHARE_INT 0x0f
0163
0164 #define WD719X_AMR_SCB_OUT 0x18
0165 #define WD719X_AMR_OP_CODE 0x1c
0166 #define WD719X_AMR_SCSI_STATUS 0x1d
0167 #define WD719X_AMR_SCB_ERROR 0x1e
0168 #define WD719X_AMR_INT_STATUS 0x1f
0169
0170 #define WD719X_DISABLE_INT 0x80
0171
0172
0173 #define WD719X_SCB_FLAGS_CHECK_DIRECTION 0x01
0174 #define WD719X_SCB_FLAGS_PCI_TO_SCSI 0x02
0175 #define WD719X_SCB_FLAGS_AUTO_REQUEST_SENSE 0x10
0176 #define WD719X_SCB_FLAGS_DO_SCATTER_GATHER 0x20
0177 #define WD719X_SCB_FLAGS_NO_DISCONNECT 0x40
0178
0179
0180
0181 #define WD719X_PCI_GPIO_CONTROL 0x3C
0182 #define WD719X_PCI_GPIO_DATA 0x3D
0183 #define WD719X_PCI_PORT_RESET 0x3E
0184 #define WD719X_PCI_MODE_SELECT 0x3F
0185
0186 #define WD719X_PCI_EXTERNAL_ADDR 0x60
0187 #define WD719X_PCI_INTERNAL_ADDR 0x64
0188 #define WD719X_PCI_DMA_TRANSFER_SIZE 0x66
0189 #define WD719X_PCI_CHANNEL2_3CMD 0x68
0190 #define WD719X_PCI_CHANNEL2_3STATUS 0x69
0191
0192 #define WD719X_GPIO_ID_BITS 0x0a
0193 #define WD719X_PRAM_BASE_ADDR 0x00
0194
0195
0196 #define WD719X_PCI_RESET 0x01
0197 #define WD719X_ENABLE_ADVANCE_MODE 0x01
0198
0199 #define WD719X_START_CHANNEL2_3DMA 0x17
0200 #define WD719X_START_CHANNEL2_3DONE 0x01
0201 #define WD719X_START_CHANNEL2_3ABORT 0x20
0202
0203
0204 #define WD719X_EE_DI (1 << 1)
0205 #define WD719X_EE_CS (1 << 2)
0206 #define WD719X_EE_CLK (1 << 3)
0207 #define WD719X_EE_DO (1 << 4)
0208
0209
0210 struct wd719x_eeprom_header {
0211 u8 sig1;
0212 u8 sig2;
0213 u8 version;
0214 u8 checksum;
0215 u8 cfg_offset;
0216 u8 cfg_size;
0217 u8 setup_offset;
0218 u8 setup_size;
0219 } __packed;
0220
0221 #define WD719X_EE_SIG1 0
0222 #define WD719X_EE_SIG2 1
0223 #define WD719X_EE_VERSION 2
0224 #define WD719X_EE_CHECKSUM 3
0225 #define WD719X_EE_CFG_OFFSET 4
0226 #define WD719X_EE_CFG_SIZE 5
0227 #define WD719X_EE_SETUP_OFFSET 6
0228 #define WD719X_EE_SETUP_SIZE 7
0229
0230 #define WD719X_EE_SCSI_ID_MASK 0xf
0231
0232
0233 struct wd719x_host_param {
0234 u8 ch_1_th;
0235 u8 scsi_conf;
0236 u8 own_scsi_id;
0237 u8 sel_timeout;
0238 u8 sleep_timer;
0239 __le16 cdb_size;
0240 __le16 tag_en;
0241 u8 scsi_pad;
0242 __le32 wide;
0243 __le32 sync;
0244 u8 soft_mask;
0245 u8 unsol_mask;
0246 } __packed;
0247
0248 #endif