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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /* qlogicpti.c: Performance Technologies QlogicISP sbus card driver.
0003  *
0004  * Copyright (C) 1996, 2006, 2008 David S. Miller (davem@davemloft.net)
0005  *
0006  * A lot of this driver was directly stolen from Erik H. Moe's PCI
0007  * Qlogic ISP driver.  Mucho kudos to him for this code.
0008  *
0009  * An even bigger kudos to John Grana at Performance Technologies
0010  * for providing me with the hardware to write this driver, you rule
0011  * John you really do.
0012  *
0013  * May, 2, 1997: Added support for QLGC,isp --jj
0014  */
0015 
0016 #include <linux/kernel.h>
0017 #include <linux/delay.h>
0018 #include <linux/types.h>
0019 #include <linux/string.h>
0020 #include <linux/gfp.h>
0021 #include <linux/blkdev.h>
0022 #include <linux/proc_fs.h>
0023 #include <linux/stat.h>
0024 #include <linux/init.h>
0025 #include <linux/spinlock.h>
0026 #include <linux/interrupt.h>
0027 #include <linux/module.h>
0028 #include <linux/jiffies.h>
0029 #include <linux/dma-mapping.h>
0030 #include <linux/of.h>
0031 #include <linux/of_device.h>
0032 #include <linux/firmware.h>
0033 #include <linux/pgtable.h>
0034 
0035 #include <asm/byteorder.h>
0036 
0037 #include "qlogicpti.h"
0038 
0039 #include <asm/dma.h>
0040 #include <asm/ptrace.h>
0041 #include <asm/oplib.h>
0042 #include <asm/io.h>
0043 #include <asm/irq.h>
0044 
0045 #include <scsi/scsi.h>
0046 #include <scsi/scsi_cmnd.h>
0047 #include <scsi/scsi_device.h>
0048 #include <scsi/scsi_eh.h>
0049 #include <scsi/scsi_tcq.h>
0050 #include <scsi/scsi_host.h>
0051 
0052 #define MAX_TARGETS 16
0053 #define MAX_LUNS    8   /* 32 for 1.31 F/W */
0054 
0055 #define DEFAULT_LOOP_COUNT  10000
0056 
0057 static struct qlogicpti *qptichain = NULL;
0058 static DEFINE_SPINLOCK(qptichain_lock);
0059 
0060 #define PACKB(a, b)         (((a)<<4)|(b))
0061 
0062 static const u_char mbox_param[] = {
0063     PACKB(1, 1),    /* MBOX_NO_OP */
0064     PACKB(5, 5),    /* MBOX_LOAD_RAM */
0065     PACKB(2, 0),    /* MBOX_EXEC_FIRMWARE */
0066     PACKB(5, 5),    /* MBOX_DUMP_RAM */
0067     PACKB(3, 3),    /* MBOX_WRITE_RAM_WORD */
0068     PACKB(2, 3),    /* MBOX_READ_RAM_WORD */
0069     PACKB(6, 6),    /* MBOX_MAILBOX_REG_TEST */
0070     PACKB(2, 3),    /* MBOX_VERIFY_CHECKSUM */
0071     PACKB(1, 3),    /* MBOX_ABOUT_FIRMWARE */
0072     PACKB(0, 0),    /* 0x0009 */
0073     PACKB(0, 0),    /* 0x000a */
0074     PACKB(0, 0),    /* 0x000b */
0075     PACKB(0, 0),    /* 0x000c */
0076     PACKB(0, 0),    /* 0x000d */
0077     PACKB(1, 2),    /* MBOX_CHECK_FIRMWARE */
0078     PACKB(0, 0),    /* 0x000f */
0079     PACKB(5, 5),    /* MBOX_INIT_REQ_QUEUE */
0080     PACKB(6, 6),    /* MBOX_INIT_RES_QUEUE */
0081     PACKB(4, 4),    /* MBOX_EXECUTE_IOCB */
0082     PACKB(2, 2),    /* MBOX_WAKE_UP */
0083     PACKB(1, 6),    /* MBOX_STOP_FIRMWARE */
0084     PACKB(4, 4),    /* MBOX_ABORT */
0085     PACKB(2, 2),    /* MBOX_ABORT_DEVICE */
0086     PACKB(3, 3),    /* MBOX_ABORT_TARGET */
0087     PACKB(2, 2),    /* MBOX_BUS_RESET */
0088     PACKB(2, 3),    /* MBOX_STOP_QUEUE */
0089     PACKB(2, 3),    /* MBOX_START_QUEUE */
0090     PACKB(2, 3),    /* MBOX_SINGLE_STEP_QUEUE */
0091     PACKB(2, 3),    /* MBOX_ABORT_QUEUE */
0092     PACKB(2, 4),    /* MBOX_GET_DEV_QUEUE_STATUS */
0093     PACKB(0, 0),    /* 0x001e */
0094     PACKB(1, 3),    /* MBOX_GET_FIRMWARE_STATUS */
0095     PACKB(1, 2),    /* MBOX_GET_INIT_SCSI_ID */
0096     PACKB(1, 2),    /* MBOX_GET_SELECT_TIMEOUT */
0097     PACKB(1, 3),    /* MBOX_GET_RETRY_COUNT */
0098     PACKB(1, 2),    /* MBOX_GET_TAG_AGE_LIMIT */
0099     PACKB(1, 2),    /* MBOX_GET_CLOCK_RATE */
0100     PACKB(1, 2),    /* MBOX_GET_ACT_NEG_STATE */
0101     PACKB(1, 2),    /* MBOX_GET_ASYNC_DATA_SETUP_TIME */
0102     PACKB(1, 3),    /* MBOX_GET_SBUS_PARAMS */
0103     PACKB(2, 4),    /* MBOX_GET_TARGET_PARAMS */
0104     PACKB(2, 4),    /* MBOX_GET_DEV_QUEUE_PARAMS */
0105     PACKB(0, 0),    /* 0x002a */
0106     PACKB(0, 0),    /* 0x002b */
0107     PACKB(0, 0),    /* 0x002c */
0108     PACKB(0, 0),    /* 0x002d */
0109     PACKB(0, 0),    /* 0x002e */
0110     PACKB(0, 0),    /* 0x002f */
0111     PACKB(2, 2),    /* MBOX_SET_INIT_SCSI_ID */
0112     PACKB(2, 2),    /* MBOX_SET_SELECT_TIMEOUT */
0113     PACKB(3, 3),    /* MBOX_SET_RETRY_COUNT */
0114     PACKB(2, 2),    /* MBOX_SET_TAG_AGE_LIMIT */
0115     PACKB(2, 2),    /* MBOX_SET_CLOCK_RATE */
0116     PACKB(2, 2),    /* MBOX_SET_ACTIVE_NEG_STATE */
0117     PACKB(2, 2),    /* MBOX_SET_ASYNC_DATA_SETUP_TIME */
0118     PACKB(3, 3),    /* MBOX_SET_SBUS_CONTROL_PARAMS */
0119     PACKB(4, 4),    /* MBOX_SET_TARGET_PARAMS */
0120     PACKB(4, 4),    /* MBOX_SET_DEV_QUEUE_PARAMS */
0121     PACKB(0, 0),    /* 0x003a */
0122     PACKB(0, 0),    /* 0x003b */
0123     PACKB(0, 0),    /* 0x003c */
0124     PACKB(0, 0),    /* 0x003d */
0125     PACKB(0, 0),    /* 0x003e */
0126     PACKB(0, 0),    /* 0x003f */
0127     PACKB(0, 0),    /* 0x0040 */
0128     PACKB(0, 0),    /* 0x0041 */
0129     PACKB(0, 0) /* 0x0042 */
0130 };
0131 
0132 #define MAX_MBOX_COMMAND    ARRAY_SIZE(mbox_param)
0133 
0134 /* queue length's _must_ be power of two: */
0135 #define QUEUE_DEPTH(in, out, ql)    ((in - out) & (ql))
0136 #define REQ_QUEUE_DEPTH(in, out)    QUEUE_DEPTH(in, out,             \
0137                             QLOGICPTI_REQ_QUEUE_LEN)
0138 #define RES_QUEUE_DEPTH(in, out)    QUEUE_DEPTH(in, out, RES_QUEUE_LEN)
0139 
0140 static inline void qlogicpti_enable_irqs(struct qlogicpti *qpti)
0141 {
0142     sbus_writew(SBUS_CTRL_ERIRQ | SBUS_CTRL_GENAB,
0143             qpti->qregs + SBUS_CTRL);
0144 }
0145 
0146 static inline void qlogicpti_disable_irqs(struct qlogicpti *qpti)
0147 {
0148     sbus_writew(0, qpti->qregs + SBUS_CTRL);
0149 }
0150 
0151 static inline void set_sbus_cfg1(struct qlogicpti *qpti)
0152 {
0153     u16 val;
0154     u8 bursts = qpti->bursts;
0155 
0156 #if 0   /* It appears that at least PTI cards do not support
0157      * 64-byte bursts and that setting the B64 bit actually
0158      * is a nop and the chip ends up using the smallest burst
0159      * size. -DaveM
0160      */
0161     if (sbus_can_burst64() && (bursts & DMA_BURST64)) {
0162         val = (SBUS_CFG1_BENAB | SBUS_CFG1_B64);
0163     } else
0164 #endif
0165     if (bursts & DMA_BURST32) {
0166         val = (SBUS_CFG1_BENAB | SBUS_CFG1_B32);
0167     } else if (bursts & DMA_BURST16) {
0168         val = (SBUS_CFG1_BENAB | SBUS_CFG1_B16);
0169     } else if (bursts & DMA_BURST8) {
0170         val = (SBUS_CFG1_BENAB | SBUS_CFG1_B8);
0171     } else {
0172         val = 0; /* No sbus bursts for you... */
0173     }
0174     sbus_writew(val, qpti->qregs + SBUS_CFG1);
0175 }
0176 
0177 static int qlogicpti_mbox_command(struct qlogicpti *qpti, u_short param[], int force)
0178 {
0179     int loop_count;
0180     u16 tmp;
0181 
0182     if (mbox_param[param[0]] == 0)
0183         return 1;
0184 
0185     /* Set SBUS semaphore. */
0186     tmp = sbus_readw(qpti->qregs + SBUS_SEMAPHORE);
0187     tmp |= SBUS_SEMAPHORE_LCK;
0188     sbus_writew(tmp, qpti->qregs + SBUS_SEMAPHORE);
0189 
0190     /* Wait for host IRQ bit to clear. */
0191     loop_count = DEFAULT_LOOP_COUNT;
0192     while (--loop_count && (sbus_readw(qpti->qregs + HCCTRL) & HCCTRL_HIRQ)) {
0193         barrier();
0194         cpu_relax();
0195     }
0196     if (!loop_count)
0197         printk(KERN_EMERG "qlogicpti%d: mbox_command loop timeout #1\n",
0198                qpti->qpti_id);
0199 
0200     /* Write mailbox command registers. */
0201     switch (mbox_param[param[0]] >> 4) {
0202     case 6: sbus_writew(param[5], qpti->qregs + MBOX5);
0203         fallthrough;
0204     case 5: sbus_writew(param[4], qpti->qregs + MBOX4);
0205         fallthrough;
0206     case 4: sbus_writew(param[3], qpti->qregs + MBOX3);
0207         fallthrough;
0208     case 3: sbus_writew(param[2], qpti->qregs + MBOX2);
0209         fallthrough;
0210     case 2: sbus_writew(param[1], qpti->qregs + MBOX1);
0211         fallthrough;
0212     case 1: sbus_writew(param[0], qpti->qregs + MBOX0);
0213     }
0214 
0215     /* Clear RISC interrupt. */
0216     tmp = sbus_readw(qpti->qregs + HCCTRL);
0217     tmp |= HCCTRL_CRIRQ;
0218     sbus_writew(tmp, qpti->qregs + HCCTRL);
0219 
0220     /* Clear SBUS semaphore. */
0221     sbus_writew(0, qpti->qregs + SBUS_SEMAPHORE);
0222 
0223     /* Set HOST interrupt. */
0224     tmp = sbus_readw(qpti->qregs + HCCTRL);
0225     tmp |= HCCTRL_SHIRQ;
0226     sbus_writew(tmp, qpti->qregs + HCCTRL);
0227 
0228     /* Wait for HOST interrupt clears. */
0229     loop_count = DEFAULT_LOOP_COUNT;
0230     while (--loop_count &&
0231            (sbus_readw(qpti->qregs + HCCTRL) & HCCTRL_CRIRQ))
0232         udelay(20);
0233     if (!loop_count)
0234         printk(KERN_EMERG "qlogicpti%d: mbox_command[%04x] loop timeout #2\n",
0235                qpti->qpti_id, param[0]);
0236 
0237     /* Wait for SBUS semaphore to get set. */
0238     loop_count = DEFAULT_LOOP_COUNT;
0239     while (--loop_count &&
0240            !(sbus_readw(qpti->qregs + SBUS_SEMAPHORE) & SBUS_SEMAPHORE_LCK)) {
0241         udelay(20);
0242 
0243         /* Workaround for some buggy chips. */
0244         if (sbus_readw(qpti->qregs + MBOX0) & 0x4000)
0245             break;
0246     }
0247     if (!loop_count)
0248         printk(KERN_EMERG "qlogicpti%d: mbox_command[%04x] loop timeout #3\n",
0249                qpti->qpti_id, param[0]);
0250 
0251     /* Wait for MBOX busy condition to go away. */
0252     loop_count = DEFAULT_LOOP_COUNT;
0253     while (--loop_count && (sbus_readw(qpti->qregs + MBOX0) == 0x04))
0254         udelay(20);
0255     if (!loop_count)
0256         printk(KERN_EMERG "qlogicpti%d: mbox_command[%04x] loop timeout #4\n",
0257                qpti->qpti_id, param[0]);
0258 
0259     /* Read back output parameters. */
0260     switch (mbox_param[param[0]] & 0xf) {
0261     case 6: param[5] = sbus_readw(qpti->qregs + MBOX5);
0262         fallthrough;
0263     case 5: param[4] = sbus_readw(qpti->qregs + MBOX4);
0264         fallthrough;
0265     case 4: param[3] = sbus_readw(qpti->qregs + MBOX3);
0266         fallthrough;
0267     case 3: param[2] = sbus_readw(qpti->qregs + MBOX2);
0268         fallthrough;
0269     case 2: param[1] = sbus_readw(qpti->qregs + MBOX1);
0270         fallthrough;
0271     case 1: param[0] = sbus_readw(qpti->qregs + MBOX0);
0272     }
0273 
0274     /* Clear RISC interrupt. */
0275     tmp = sbus_readw(qpti->qregs + HCCTRL);
0276     tmp |= HCCTRL_CRIRQ;
0277     sbus_writew(tmp, qpti->qregs + HCCTRL);
0278 
0279     /* Release SBUS semaphore. */
0280     tmp = sbus_readw(qpti->qregs + SBUS_SEMAPHORE);
0281     tmp &= ~(SBUS_SEMAPHORE_LCK);
0282     sbus_writew(tmp, qpti->qregs + SBUS_SEMAPHORE);
0283 
0284     /* We're done. */
0285     return 0;
0286 }
0287 
0288 static inline void qlogicpti_set_hostdev_defaults(struct qlogicpti *qpti)
0289 {
0290     int i;
0291 
0292     qpti->host_param.initiator_scsi_id = qpti->scsi_id;
0293     qpti->host_param.bus_reset_delay = 3;
0294     qpti->host_param.retry_count = 0;
0295     qpti->host_param.retry_delay = 5;
0296     qpti->host_param.async_data_setup_time = 3;
0297     qpti->host_param.req_ack_active_negation = 1;
0298     qpti->host_param.data_line_active_negation = 1;
0299     qpti->host_param.data_dma_burst_enable = 1;
0300     qpti->host_param.command_dma_burst_enable = 1;
0301     qpti->host_param.tag_aging = 8;
0302     qpti->host_param.selection_timeout = 250;
0303     qpti->host_param.max_queue_depth = 256;
0304 
0305     for(i = 0; i < MAX_TARGETS; i++) {
0306         /*
0307          * disconnect, parity, arq, reneg on reset, and, oddly enough
0308          * tags...the midlayer's notion of tagged support has to match
0309          * our device settings, and since we base whether we enable a
0310          * tag on a  per-cmnd basis upon what the midlayer sez, we
0311          * actually enable the capability here.
0312          */
0313         qpti->dev_param[i].device_flags = 0xcd;
0314         qpti->dev_param[i].execution_throttle = 16;
0315         if (qpti->ultra) {
0316             qpti->dev_param[i].synchronous_period = 12;
0317             qpti->dev_param[i].synchronous_offset = 8;
0318         } else {
0319             qpti->dev_param[i].synchronous_period = 25;
0320             qpti->dev_param[i].synchronous_offset = 12;
0321         }
0322         qpti->dev_param[i].device_enable = 1;
0323     }
0324 }
0325 
0326 static int qlogicpti_reset_hardware(struct Scsi_Host *host)
0327 {
0328     struct qlogicpti *qpti = (struct qlogicpti *) host->hostdata;
0329     u_short param[6];
0330     unsigned short risc_code_addr;
0331     int loop_count, i;
0332     unsigned long flags;
0333 
0334     risc_code_addr = 0x1000;    /* all load addresses are at 0x1000 */
0335 
0336     spin_lock_irqsave(host->host_lock, flags);
0337 
0338     sbus_writew(HCCTRL_PAUSE, qpti->qregs + HCCTRL);
0339 
0340     /* Only reset the scsi bus if it is not free. */
0341     if (sbus_readw(qpti->qregs + CPU_PCTRL) & CPU_PCTRL_BSY) {
0342         sbus_writew(CPU_ORIDE_RMOD, qpti->qregs + CPU_ORIDE);
0343         sbus_writew(CPU_CMD_BRESET, qpti->qregs + CPU_CMD);
0344         udelay(400);
0345     }
0346 
0347     sbus_writew(SBUS_CTRL_RESET, qpti->qregs + SBUS_CTRL);
0348     sbus_writew((DMA_CTRL_CCLEAR | DMA_CTRL_CIRQ), qpti->qregs + CMD_DMA_CTRL);
0349     sbus_writew((DMA_CTRL_CCLEAR | DMA_CTRL_CIRQ), qpti->qregs + DATA_DMA_CTRL);
0350 
0351     loop_count = DEFAULT_LOOP_COUNT;
0352     while (--loop_count && ((sbus_readw(qpti->qregs + MBOX0) & 0xff) == 0x04))
0353         udelay(20);
0354     if (!loop_count)
0355         printk(KERN_EMERG "qlogicpti%d: reset_hardware loop timeout\n",
0356                qpti->qpti_id);
0357 
0358     sbus_writew(HCCTRL_PAUSE, qpti->qregs + HCCTRL);
0359     set_sbus_cfg1(qpti);
0360     qlogicpti_enable_irqs(qpti);
0361 
0362     if (sbus_readw(qpti->qregs + RISC_PSR) & RISC_PSR_ULTRA) {
0363         qpti->ultra = 1;
0364         sbus_writew((RISC_MTREG_P0ULTRA | RISC_MTREG_P1ULTRA),
0365                 qpti->qregs + RISC_MTREG);
0366     } else {
0367         qpti->ultra = 0;
0368         sbus_writew((RISC_MTREG_P0DFLT | RISC_MTREG_P1DFLT),
0369                 qpti->qregs + RISC_MTREG);
0370     }
0371 
0372     /* reset adapter and per-device default values. */
0373     /* do it after finding out whether we're ultra mode capable */
0374     qlogicpti_set_hostdev_defaults(qpti);
0375 
0376     /* Release the RISC processor. */
0377     sbus_writew(HCCTRL_REL, qpti->qregs + HCCTRL);
0378 
0379     /* Get RISC to start executing the firmware code. */
0380     param[0] = MBOX_EXEC_FIRMWARE;
0381     param[1] = risc_code_addr;
0382     if (qlogicpti_mbox_command(qpti, param, 1)) {
0383         printk(KERN_EMERG "qlogicpti%d: Cannot execute ISP firmware.\n",
0384                qpti->qpti_id);
0385         spin_unlock_irqrestore(host->host_lock, flags);
0386         return 1;
0387     }
0388 
0389     /* Set initiator scsi ID. */
0390     param[0] = MBOX_SET_INIT_SCSI_ID;
0391     param[1] = qpti->host_param.initiator_scsi_id;
0392     if (qlogicpti_mbox_command(qpti, param, 1) ||
0393        (param[0] != MBOX_COMMAND_COMPLETE)) {
0394         printk(KERN_EMERG "qlogicpti%d: Cannot set initiator SCSI ID.\n",
0395                qpti->qpti_id);
0396         spin_unlock_irqrestore(host->host_lock, flags);
0397         return 1;
0398     }
0399 
0400     /* Initialize state of the queues, both hw and sw. */
0401     qpti->req_in_ptr = qpti->res_out_ptr = 0;
0402 
0403     param[0] = MBOX_INIT_RES_QUEUE;
0404     param[1] = RES_QUEUE_LEN + 1;
0405     param[2] = (u_short) (qpti->res_dvma >> 16);
0406     param[3] = (u_short) (qpti->res_dvma & 0xffff);
0407     param[4] = param[5] = 0;
0408     if (qlogicpti_mbox_command(qpti, param, 1)) {
0409         printk(KERN_EMERG "qlogicpti%d: Cannot init response queue.\n",
0410                qpti->qpti_id);
0411         spin_unlock_irqrestore(host->host_lock, flags);
0412         return 1;
0413     }
0414 
0415     param[0] = MBOX_INIT_REQ_QUEUE;
0416     param[1] = QLOGICPTI_REQ_QUEUE_LEN + 1;
0417     param[2] = (u_short) (qpti->req_dvma >> 16);
0418     param[3] = (u_short) (qpti->req_dvma & 0xffff);
0419     param[4] = param[5] = 0;
0420     if (qlogicpti_mbox_command(qpti, param, 1)) {
0421         printk(KERN_EMERG "qlogicpti%d: Cannot init request queue.\n",
0422                qpti->qpti_id);
0423         spin_unlock_irqrestore(host->host_lock, flags);
0424         return 1;
0425     }
0426 
0427     param[0] = MBOX_SET_RETRY_COUNT;
0428     param[1] = qpti->host_param.retry_count;
0429     param[2] = qpti->host_param.retry_delay;
0430     qlogicpti_mbox_command(qpti, param, 0);
0431 
0432     param[0] = MBOX_SET_TAG_AGE_LIMIT;
0433     param[1] = qpti->host_param.tag_aging;
0434     qlogicpti_mbox_command(qpti, param, 0);
0435 
0436     for (i = 0; i < MAX_TARGETS; i++) {
0437         param[0] = MBOX_GET_DEV_QUEUE_PARAMS;
0438         param[1] = (i << 8);
0439         qlogicpti_mbox_command(qpti, param, 0);
0440     }
0441 
0442     param[0] = MBOX_GET_FIRMWARE_STATUS;
0443     qlogicpti_mbox_command(qpti, param, 0);
0444 
0445     param[0] = MBOX_SET_SELECT_TIMEOUT;
0446     param[1] = qpti->host_param.selection_timeout;
0447     qlogicpti_mbox_command(qpti, param, 0);
0448 
0449     for (i = 0; i < MAX_TARGETS; i++) {
0450         param[0] = MBOX_SET_TARGET_PARAMS;
0451         param[1] = (i << 8);
0452         param[2] = (qpti->dev_param[i].device_flags << 8);
0453         /*
0454          * Since we're now loading 1.31 f/w, force narrow/async.
0455          */
0456         param[2] |= 0xc0;
0457         param[3] = 0;   /* no offset, we do not have sync mode yet */
0458         qlogicpti_mbox_command(qpti, param, 0);
0459     }
0460 
0461     /*
0462      * Always (sigh) do an initial bus reset (kicks f/w).
0463      */
0464     param[0] = MBOX_BUS_RESET;
0465     param[1] = qpti->host_param.bus_reset_delay;
0466     qlogicpti_mbox_command(qpti, param, 0);
0467     qpti->send_marker = 1;
0468 
0469     spin_unlock_irqrestore(host->host_lock, flags);
0470     return 0;
0471 }
0472 
0473 #define PTI_RESET_LIMIT 400
0474 
0475 static int qlogicpti_load_firmware(struct qlogicpti *qpti)
0476 {
0477     const struct firmware *fw;
0478     const char fwname[] = "qlogic/isp1000.bin";
0479     const __le16 *fw_data;
0480     struct Scsi_Host *host = qpti->qhost;
0481     unsigned short csum = 0;
0482     unsigned short param[6];
0483     unsigned short risc_code_addr, risc_code_length;
0484     int err;
0485     unsigned long flags;
0486     int i, timeout;
0487 
0488     err = request_firmware(&fw, fwname, &qpti->op->dev);
0489     if (err) {
0490         printk(KERN_ERR "Failed to load image \"%s\" err %d\n",
0491                fwname, err);
0492         return err;
0493     }
0494     if (fw->size % 2) {
0495         printk(KERN_ERR "Bogus length %zu in image \"%s\"\n",
0496                fw->size, fwname);
0497         err = -EINVAL;
0498         goto outfirm;
0499     }
0500     fw_data = (const __le16 *)&fw->data[0];
0501     risc_code_addr = 0x1000;    /* all f/w modules load at 0x1000 */
0502     risc_code_length = fw->size / 2;
0503 
0504     spin_lock_irqsave(host->host_lock, flags);
0505 
0506     /* Verify the checksum twice, one before loading it, and once
0507      * afterwards via the mailbox commands.
0508      */
0509     for (i = 0; i < risc_code_length; i++)
0510         csum += __le16_to_cpu(fw_data[i]);
0511     if (csum) {
0512         printk(KERN_EMERG "qlogicpti%d: Aieee, firmware checksum failed!",
0513                qpti->qpti_id);
0514         err = 1;
0515         goto out;
0516     }       
0517     sbus_writew(SBUS_CTRL_RESET, qpti->qregs + SBUS_CTRL);
0518     sbus_writew((DMA_CTRL_CCLEAR | DMA_CTRL_CIRQ), qpti->qregs + CMD_DMA_CTRL);
0519     sbus_writew((DMA_CTRL_CCLEAR | DMA_CTRL_CIRQ), qpti->qregs + DATA_DMA_CTRL);
0520     timeout = PTI_RESET_LIMIT;
0521     while (--timeout && (sbus_readw(qpti->qregs + SBUS_CTRL) & SBUS_CTRL_RESET))
0522         udelay(20);
0523     if (!timeout) {
0524         printk(KERN_EMERG "qlogicpti%d: Cannot reset the ISP.", qpti->qpti_id);
0525         err = 1;
0526         goto out;
0527     }
0528 
0529     sbus_writew(HCCTRL_RESET, qpti->qregs + HCCTRL);
0530     mdelay(1);
0531 
0532     sbus_writew((SBUS_CTRL_GENAB | SBUS_CTRL_ERIRQ), qpti->qregs + SBUS_CTRL);
0533     set_sbus_cfg1(qpti);
0534     sbus_writew(0, qpti->qregs + SBUS_SEMAPHORE);
0535 
0536     if (sbus_readw(qpti->qregs + RISC_PSR) & RISC_PSR_ULTRA) {
0537         qpti->ultra = 1;
0538         sbus_writew((RISC_MTREG_P0ULTRA | RISC_MTREG_P1ULTRA),
0539                 qpti->qregs + RISC_MTREG);
0540     } else {
0541         qpti->ultra = 0;
0542         sbus_writew((RISC_MTREG_P0DFLT | RISC_MTREG_P1DFLT),
0543                 qpti->qregs + RISC_MTREG);
0544     }
0545 
0546     sbus_writew(HCCTRL_REL, qpti->qregs + HCCTRL);
0547 
0548     /* Pin lines are only stable while RISC is paused. */
0549     sbus_writew(HCCTRL_PAUSE, qpti->qregs + HCCTRL);
0550     if (sbus_readw(qpti->qregs + CPU_PDIFF) & CPU_PDIFF_MODE)
0551         qpti->differential = 1;
0552     else
0553         qpti->differential = 0;
0554     sbus_writew(HCCTRL_REL, qpti->qregs + HCCTRL);
0555 
0556     /* This shouldn't be necessary- we've reset things so we should be
0557        running from the ROM now.. */
0558 
0559     param[0] = MBOX_STOP_FIRMWARE;
0560     param[1] = param[2] = param[3] = param[4] = param[5] = 0;
0561     if (qlogicpti_mbox_command(qpti, param, 1)) {
0562         printk(KERN_EMERG "qlogicpti%d: Cannot stop firmware for reload.\n",
0563                qpti->qpti_id);
0564         err = 1;
0565         goto out;
0566     }       
0567 
0568     /* Load it up.. */
0569     for (i = 0; i < risc_code_length; i++) {
0570         param[0] = MBOX_WRITE_RAM_WORD;
0571         param[1] = risc_code_addr + i;
0572         param[2] = __le16_to_cpu(fw_data[i]);
0573         if (qlogicpti_mbox_command(qpti, param, 1) ||
0574             param[0] != MBOX_COMMAND_COMPLETE) {
0575             printk("qlogicpti%d: Firmware dload failed, I'm bolixed!\n",
0576                    qpti->qpti_id);
0577             err = 1;
0578             goto out;
0579         }
0580     }
0581 
0582     /* Reset the ISP again. */
0583     sbus_writew(HCCTRL_RESET, qpti->qregs + HCCTRL);
0584     mdelay(1);
0585 
0586     qlogicpti_enable_irqs(qpti);
0587     sbus_writew(0, qpti->qregs + SBUS_SEMAPHORE);
0588     sbus_writew(HCCTRL_REL, qpti->qregs + HCCTRL);
0589 
0590     /* Ask ISP to verify the checksum of the new code. */
0591     param[0] = MBOX_VERIFY_CHECKSUM;
0592     param[1] = risc_code_addr;
0593     if (qlogicpti_mbox_command(qpti, param, 1) ||
0594         (param[0] != MBOX_COMMAND_COMPLETE)) {
0595         printk(KERN_EMERG "qlogicpti%d: New firmware csum failure!\n",
0596                qpti->qpti_id);
0597         err = 1;
0598         goto out;
0599     }
0600 
0601     /* Start using newly downloaded firmware. */
0602     param[0] = MBOX_EXEC_FIRMWARE;
0603     param[1] = risc_code_addr;
0604     qlogicpti_mbox_command(qpti, param, 1);
0605 
0606     param[0] = MBOX_ABOUT_FIRMWARE;
0607     if (qlogicpti_mbox_command(qpti, param, 1) ||
0608         (param[0] != MBOX_COMMAND_COMPLETE)) {
0609         printk(KERN_EMERG "qlogicpti%d: AboutFirmware cmd fails.\n",
0610                qpti->qpti_id);
0611         err = 1;
0612         goto out;
0613     }
0614 
0615     /* Snag the major and minor revisions from the result. */
0616     qpti->fware_majrev = param[1];
0617     qpti->fware_minrev = param[2];
0618     qpti->fware_micrev = param[3];
0619 
0620     /* Set the clock rate */
0621     param[0] = MBOX_SET_CLOCK_RATE;
0622     param[1] = qpti->clock;
0623     if (qlogicpti_mbox_command(qpti, param, 1) ||
0624         (param[0] != MBOX_COMMAND_COMPLETE)) {
0625         printk(KERN_EMERG "qlogicpti%d: could not set clock rate.\n",
0626                qpti->qpti_id);
0627         err = 1;
0628         goto out;
0629     }
0630 
0631     if (qpti->is_pti != 0) {
0632         /* Load scsi initiator ID and interrupt level into sbus static ram. */
0633         param[0] = MBOX_WRITE_RAM_WORD;
0634         param[1] = 0xff80;
0635         param[2] = (unsigned short) qpti->scsi_id;
0636         qlogicpti_mbox_command(qpti, param, 1);
0637 
0638         param[0] = MBOX_WRITE_RAM_WORD;
0639         param[1] = 0xff00;
0640         param[2] = (unsigned short) 3;
0641         qlogicpti_mbox_command(qpti, param, 1);
0642     }
0643 
0644 out:
0645     spin_unlock_irqrestore(host->host_lock, flags);
0646 outfirm:
0647     release_firmware(fw);
0648     return err;
0649 }
0650 
0651 static int qlogicpti_verify_tmon(struct qlogicpti *qpti)
0652 {
0653     int curstat = sbus_readb(qpti->sreg);
0654 
0655     curstat &= 0xf0;
0656     if (!(curstat & SREG_FUSE) && (qpti->swsreg & SREG_FUSE))
0657         printk("qlogicpti%d: Fuse returned to normal state.\n", qpti->qpti_id);
0658     if (!(curstat & SREG_TPOWER) && (qpti->swsreg & SREG_TPOWER))
0659         printk("qlogicpti%d: termpwr back to normal state.\n", qpti->qpti_id);
0660     if (curstat != qpti->swsreg) {
0661         int error = 0;
0662         if (curstat & SREG_FUSE) {
0663             error++;
0664             printk("qlogicpti%d: Fuse is open!\n", qpti->qpti_id);
0665         }
0666         if (curstat & SREG_TPOWER) {
0667             error++;
0668             printk("qlogicpti%d: termpwr failure\n", qpti->qpti_id);
0669         }
0670         if (qpti->differential &&
0671             (curstat & SREG_DSENSE) != SREG_DSENSE) {
0672             error++;
0673             printk("qlogicpti%d: You have a single ended device on a "
0674                    "differential bus!  Please fix!\n", qpti->qpti_id);
0675         }
0676         qpti->swsreg = curstat;
0677         return error;
0678     }
0679     return 0;
0680 }
0681 
0682 static irqreturn_t qpti_intr(int irq, void *dev_id);
0683 
0684 static void qpti_chain_add(struct qlogicpti *qpti)
0685 {
0686     spin_lock_irq(&qptichain_lock);
0687     if (qptichain != NULL) {
0688         struct qlogicpti *qlink = qptichain;
0689 
0690         while(qlink->next)
0691             qlink = qlink->next;
0692         qlink->next = qpti;
0693     } else {
0694         qptichain = qpti;
0695     }
0696     qpti->next = NULL;
0697     spin_unlock_irq(&qptichain_lock);
0698 }
0699 
0700 static void qpti_chain_del(struct qlogicpti *qpti)
0701 {
0702     spin_lock_irq(&qptichain_lock);
0703     if (qptichain == qpti) {
0704         qptichain = qpti->next;
0705     } else {
0706         struct qlogicpti *qlink = qptichain;
0707         while(qlink->next != qpti)
0708             qlink = qlink->next;
0709         qlink->next = qpti->next;
0710     }
0711     qpti->next = NULL;
0712     spin_unlock_irq(&qptichain_lock);
0713 }
0714 
0715 static int qpti_map_regs(struct qlogicpti *qpti)
0716 {
0717     struct platform_device *op = qpti->op;
0718 
0719     qpti->qregs = of_ioremap(&op->resource[0], 0,
0720                  resource_size(&op->resource[0]),
0721                  "PTI Qlogic/ISP");
0722     if (!qpti->qregs) {
0723         printk("PTI: Qlogic/ISP registers are unmappable\n");
0724         return -ENODEV;
0725     }
0726     if (qpti->is_pti) {
0727         qpti->sreg = of_ioremap(&op->resource[0], (16 * 4096),
0728                     sizeof(unsigned char),
0729                     "PTI Qlogic/ISP statreg");
0730         if (!qpti->sreg) {
0731             printk("PTI: Qlogic/ISP status register is unmappable\n");
0732             return -ENODEV;
0733         }
0734     }
0735     return 0;
0736 }
0737 
0738 static int qpti_register_irq(struct qlogicpti *qpti)
0739 {
0740     struct platform_device *op = qpti->op;
0741 
0742     qpti->qhost->irq = qpti->irq = op->archdata.irqs[0];
0743 
0744     /* We used to try various overly-clever things to
0745      * reduce the interrupt processing overhead on
0746      * sun4c/sun4m when multiple PTI's shared the
0747      * same IRQ.  It was too complex and messy to
0748      * sanely maintain.
0749      */
0750     if (request_irq(qpti->irq, qpti_intr,
0751             IRQF_SHARED, "QlogicPTI", qpti))
0752         goto fail;
0753 
0754     printk("qlogicpti%d: IRQ %d ", qpti->qpti_id, qpti->irq);
0755 
0756     return 0;
0757 
0758 fail:
0759     printk("qlogicpti%d: Cannot acquire irq line\n", qpti->qpti_id);
0760     return -1;
0761 }
0762 
0763 static void qpti_get_scsi_id(struct qlogicpti *qpti)
0764 {
0765     struct platform_device *op = qpti->op;
0766     struct device_node *dp;
0767 
0768     dp = op->dev.of_node;
0769 
0770     qpti->scsi_id = of_getintprop_default(dp, "initiator-id", -1);
0771     if (qpti->scsi_id == -1)
0772         qpti->scsi_id = of_getintprop_default(dp, "scsi-initiator-id",
0773                               -1);
0774     if (qpti->scsi_id == -1)
0775         qpti->scsi_id =
0776             of_getintprop_default(dp->parent,
0777                           "scsi-initiator-id", 7);
0778     qpti->qhost->this_id = qpti->scsi_id;
0779     qpti->qhost->max_sectors = 64;
0780 
0781     printk("SCSI ID %d ", qpti->scsi_id);
0782 }
0783 
0784 static void qpti_get_bursts(struct qlogicpti *qpti)
0785 {
0786     struct platform_device *op = qpti->op;
0787     u8 bursts, bmask;
0788 
0789     bursts = of_getintprop_default(op->dev.of_node, "burst-sizes", 0xff);
0790     bmask = of_getintprop_default(op->dev.of_node->parent, "burst-sizes", 0xff);
0791     if (bmask != 0xff)
0792         bursts &= bmask;
0793     if (bursts == 0xff ||
0794         (bursts & DMA_BURST16) == 0 ||
0795         (bursts & DMA_BURST32) == 0)
0796         bursts = (DMA_BURST32 - 1);
0797 
0798     qpti->bursts = bursts;
0799 }
0800 
0801 static void qpti_get_clock(struct qlogicpti *qpti)
0802 {
0803     unsigned int cfreq;
0804 
0805     /* Check for what the clock input to this card is.
0806      * Default to 40Mhz.
0807      */
0808     cfreq = prom_getintdefault(qpti->prom_node,"clock-frequency",40000000);
0809     qpti->clock = (cfreq + 500000)/1000000;
0810     if (qpti->clock == 0) /* bullshit */
0811         qpti->clock = 40;
0812 }
0813 
0814 /* The request and response queues must each be aligned
0815  * on a page boundary.
0816  */
0817 static int qpti_map_queues(struct qlogicpti *qpti)
0818 {
0819     struct platform_device *op = qpti->op;
0820 
0821 #define QSIZE(entries)  (((entries) + 1) * QUEUE_ENTRY_LEN)
0822     qpti->res_cpu = dma_alloc_coherent(&op->dev,
0823                        QSIZE(RES_QUEUE_LEN),
0824                        &qpti->res_dvma, GFP_ATOMIC);
0825     if (qpti->res_cpu == NULL ||
0826         qpti->res_dvma == 0) {
0827         printk("QPTI: Cannot map response queue.\n");
0828         return -1;
0829     }
0830 
0831     qpti->req_cpu = dma_alloc_coherent(&op->dev,
0832                        QSIZE(QLOGICPTI_REQ_QUEUE_LEN),
0833                        &qpti->req_dvma, GFP_ATOMIC);
0834     if (qpti->req_cpu == NULL ||
0835         qpti->req_dvma == 0) {
0836         dma_free_coherent(&op->dev, QSIZE(RES_QUEUE_LEN),
0837                   qpti->res_cpu, qpti->res_dvma);
0838         printk("QPTI: Cannot map request queue.\n");
0839         return -1;
0840     }
0841     memset(qpti->res_cpu, 0, QSIZE(RES_QUEUE_LEN));
0842     memset(qpti->req_cpu, 0, QSIZE(QLOGICPTI_REQ_QUEUE_LEN));
0843     return 0;
0844 }
0845 
0846 const char *qlogicpti_info(struct Scsi_Host *host)
0847 {
0848     static char buf[80];
0849     struct qlogicpti *qpti = (struct qlogicpti *) host->hostdata;
0850 
0851     sprintf(buf, "PTI Qlogic,ISP SBUS SCSI irq %d regs at %p",
0852         qpti->qhost->irq, qpti->qregs);
0853     return buf;
0854 }
0855 
0856 /* I am a certified frobtronicist. */
0857 static inline void marker_frob(struct Command_Entry *cmd)
0858 {
0859     struct Marker_Entry *marker = (struct Marker_Entry *) cmd;
0860 
0861     memset(marker, 0, sizeof(struct Marker_Entry));
0862     marker->hdr.entry_cnt = 1;
0863     marker->hdr.entry_type = ENTRY_MARKER;
0864     marker->modifier = SYNC_ALL;
0865     marker->rsvd = 0;
0866 }
0867 
0868 static inline void cmd_frob(struct Command_Entry *cmd, struct scsi_cmnd *Cmnd,
0869                 struct qlogicpti *qpti)
0870 {
0871     memset(cmd, 0, sizeof(struct Command_Entry));
0872     cmd->hdr.entry_cnt = 1;
0873     cmd->hdr.entry_type = ENTRY_COMMAND;
0874     cmd->target_id = Cmnd->device->id;
0875     cmd->target_lun = Cmnd->device->lun;
0876     cmd->cdb_length = Cmnd->cmd_len;
0877     cmd->control_flags = 0;
0878     if (Cmnd->device->tagged_supported) {
0879         if (qpti->cmd_count[Cmnd->device->id] == 0)
0880             qpti->tag_ages[Cmnd->device->id] = jiffies;
0881         if (time_after(jiffies, qpti->tag_ages[Cmnd->device->id] + (5*HZ))) {
0882             cmd->control_flags = CFLAG_ORDERED_TAG;
0883             qpti->tag_ages[Cmnd->device->id] = jiffies;
0884         } else
0885             cmd->control_flags = CFLAG_SIMPLE_TAG;
0886     }
0887     if ((Cmnd->cmnd[0] == WRITE_6) ||
0888         (Cmnd->cmnd[0] == WRITE_10) ||
0889         (Cmnd->cmnd[0] == WRITE_12))
0890         cmd->control_flags |= CFLAG_WRITE;
0891     else
0892         cmd->control_flags |= CFLAG_READ;
0893     cmd->time_out = scsi_cmd_to_rq(Cmnd)->timeout / HZ;
0894     memcpy(cmd->cdb, Cmnd->cmnd, Cmnd->cmd_len);
0895 }
0896 
0897 /* Do it to it baby. */
0898 static inline int load_cmd(struct scsi_cmnd *Cmnd, struct Command_Entry *cmd,
0899                struct qlogicpti *qpti, u_int in_ptr, u_int out_ptr)
0900 {
0901     struct dataseg *ds;
0902     struct scatterlist *sg, *s;
0903     int i, n;
0904 
0905     if (scsi_bufflen(Cmnd)) {
0906         int sg_count;
0907 
0908         sg = scsi_sglist(Cmnd);
0909         sg_count = dma_map_sg(&qpti->op->dev, sg,
0910                       scsi_sg_count(Cmnd),
0911                       Cmnd->sc_data_direction);
0912 
0913         ds = cmd->dataseg;
0914         cmd->segment_cnt = sg_count;
0915 
0916         /* Fill in first four sg entries: */
0917         n = sg_count;
0918         if (n > 4)
0919             n = 4;
0920         for_each_sg(sg, s, n, i) {
0921             ds[i].d_base = sg_dma_address(s);
0922             ds[i].d_count = sg_dma_len(s);
0923         }
0924         sg_count -= 4;
0925         sg = s;
0926         while (sg_count > 0) {
0927             struct Continuation_Entry *cont;
0928 
0929             ++cmd->hdr.entry_cnt;
0930             cont = (struct Continuation_Entry *) &qpti->req_cpu[in_ptr];
0931             in_ptr = NEXT_REQ_PTR(in_ptr);
0932             if (in_ptr == out_ptr)
0933                 return -1;
0934 
0935             cont->hdr.entry_type = ENTRY_CONTINUATION;
0936             cont->hdr.entry_cnt = 0;
0937             cont->hdr.sys_def_1 = 0;
0938             cont->hdr.flags = 0;
0939             cont->reserved = 0;
0940             ds = cont->dataseg;
0941             n = sg_count;
0942             if (n > 7)
0943                 n = 7;
0944             for_each_sg(sg, s, n, i) {
0945                 ds[i].d_base = sg_dma_address(s);
0946                 ds[i].d_count = sg_dma_len(s);
0947             }
0948             sg_count -= n;
0949             sg = s;
0950         }
0951     } else {
0952         cmd->dataseg[0].d_base = 0;
0953         cmd->dataseg[0].d_count = 0;
0954         cmd->segment_cnt = 1; /* Shouldn't this be 0? */
0955     }
0956 
0957     /* Committed, record Scsi_Cmd so we can find it later. */
0958     cmd->handle = in_ptr;
0959     qpti->cmd_slots[in_ptr] = Cmnd;
0960 
0961     qpti->cmd_count[Cmnd->device->id]++;
0962     sbus_writew(in_ptr, qpti->qregs + MBOX4);
0963     qpti->req_in_ptr = in_ptr;
0964 
0965     return in_ptr;
0966 }
0967 
0968 static inline void update_can_queue(struct Scsi_Host *host, u_int in_ptr, u_int out_ptr)
0969 {
0970     /* Temporary workaround until bug is found and fixed (one bug has been found
0971        already, but fixing it makes things even worse) -jj */
0972     int num_free = QLOGICPTI_REQ_QUEUE_LEN - REQ_QUEUE_DEPTH(in_ptr, out_ptr) - 64;
0973     host->can_queue = scsi_host_busy(host) + num_free;
0974     host->sg_tablesize = QLOGICPTI_MAX_SG(num_free);
0975 }
0976 
0977 static int qlogicpti_slave_configure(struct scsi_device *sdev)
0978 {
0979     struct qlogicpti *qpti = shost_priv(sdev->host);
0980     int tgt = sdev->id;
0981     u_short param[6];
0982 
0983     /* tags handled in midlayer */
0984     /* enable sync mode? */
0985     if (sdev->sdtr) {
0986         qpti->dev_param[tgt].device_flags |= 0x10;
0987     } else {
0988         qpti->dev_param[tgt].synchronous_offset = 0;
0989         qpti->dev_param[tgt].synchronous_period = 0;
0990     }
0991     /* are we wide capable? */
0992     if (sdev->wdtr)
0993         qpti->dev_param[tgt].device_flags |= 0x20;
0994 
0995     param[0] = MBOX_SET_TARGET_PARAMS;
0996     param[1] = (tgt << 8);
0997     param[2] = (qpti->dev_param[tgt].device_flags << 8);
0998     if (qpti->dev_param[tgt].device_flags & 0x10) {
0999         param[3] = (qpti->dev_param[tgt].synchronous_offset << 8) |
1000             qpti->dev_param[tgt].synchronous_period;
1001     } else {
1002         param[3] = 0;
1003     }
1004     qlogicpti_mbox_command(qpti, param, 0);
1005     return 0;
1006 }
1007 
1008 /*
1009  * The middle SCSI layer ensures that queuecommand never gets invoked
1010  * concurrently with itself or the interrupt handler (though the
1011  * interrupt handler may call this routine as part of
1012  * request-completion handling).
1013  *
1014  * "This code must fly." -davem
1015  */
1016 static int qlogicpti_queuecommand_lck(struct scsi_cmnd *Cmnd)
1017 {
1018     void (*done)(struct scsi_cmnd *) = scsi_done;
1019     struct Scsi_Host *host = Cmnd->device->host;
1020     struct qlogicpti *qpti = (struct qlogicpti *) host->hostdata;
1021     struct Command_Entry *cmd;
1022     u_int out_ptr;
1023     int in_ptr;
1024 
1025     in_ptr = qpti->req_in_ptr;
1026     cmd = (struct Command_Entry *) &qpti->req_cpu[in_ptr];
1027     out_ptr = sbus_readw(qpti->qregs + MBOX4);
1028     in_ptr = NEXT_REQ_PTR(in_ptr);
1029     if (in_ptr == out_ptr)
1030         goto toss_command;
1031 
1032     if (qpti->send_marker) {
1033         marker_frob(cmd);
1034         qpti->send_marker = 0;
1035         if (NEXT_REQ_PTR(in_ptr) == out_ptr) {
1036             sbus_writew(in_ptr, qpti->qregs + MBOX4);
1037             qpti->req_in_ptr = in_ptr;
1038             goto toss_command;
1039         }
1040         cmd = (struct Command_Entry *) &qpti->req_cpu[in_ptr];
1041         in_ptr = NEXT_REQ_PTR(in_ptr);
1042     }
1043     cmd_frob(cmd, Cmnd, qpti);
1044     if ((in_ptr = load_cmd(Cmnd, cmd, qpti, in_ptr, out_ptr)) == -1)
1045         goto toss_command;
1046 
1047     update_can_queue(host, in_ptr, out_ptr);
1048 
1049     return 0;
1050 
1051 toss_command:
1052     printk(KERN_EMERG "qlogicpti%d: request queue overflow\n",
1053            qpti->qpti_id);
1054 
1055     /* Unfortunately, unless you use the new EH code, which
1056      * we don't, the midlayer will ignore the return value,
1057      * which is insane.  We pick up the pieces like this.
1058      */
1059     Cmnd->result = DID_BUS_BUSY;
1060     done(Cmnd);
1061     return 1;
1062 }
1063 
1064 static DEF_SCSI_QCMD(qlogicpti_queuecommand)
1065 
1066 static int qlogicpti_return_status(struct Status_Entry *sts, int id)
1067 {
1068     int host_status = DID_ERROR;
1069 
1070     switch (sts->completion_status) {
1071           case CS_COMPLETE:
1072         host_status = DID_OK;
1073         break;
1074           case CS_INCOMPLETE:
1075         if (!(sts->state_flags & SF_GOT_BUS))
1076             host_status = DID_NO_CONNECT;
1077         else if (!(sts->state_flags & SF_GOT_TARGET))
1078             host_status = DID_BAD_TARGET;
1079         else if (!(sts->state_flags & SF_SENT_CDB))
1080             host_status = DID_ERROR;
1081         else if (!(sts->state_flags & SF_TRANSFERRED_DATA))
1082             host_status = DID_ERROR;
1083         else if (!(sts->state_flags & SF_GOT_STATUS))
1084             host_status = DID_ERROR;
1085         else if (!(sts->state_flags & SF_GOT_SENSE))
1086             host_status = DID_ERROR;
1087         break;
1088           case CS_DMA_ERROR:
1089           case CS_TRANSPORT_ERROR:
1090         host_status = DID_ERROR;
1091         break;
1092           case CS_RESET_OCCURRED:
1093           case CS_BUS_RESET:
1094         host_status = DID_RESET;
1095         break;
1096           case CS_ABORTED:
1097         host_status = DID_ABORT;
1098         break;
1099           case CS_TIMEOUT:
1100         host_status = DID_TIME_OUT;
1101         break;
1102           case CS_DATA_OVERRUN:
1103           case CS_COMMAND_OVERRUN:
1104           case CS_STATUS_OVERRUN:
1105           case CS_BAD_MESSAGE:
1106           case CS_NO_MESSAGE_OUT:
1107           case CS_EXT_ID_FAILED:
1108           case CS_IDE_MSG_FAILED:
1109           case CS_ABORT_MSG_FAILED:
1110           case CS_NOP_MSG_FAILED:
1111           case CS_PARITY_ERROR_MSG_FAILED:
1112           case CS_DEVICE_RESET_MSG_FAILED:
1113           case CS_ID_MSG_FAILED:
1114           case CS_UNEXP_BUS_FREE:
1115         host_status = DID_ERROR;
1116         break;
1117           case CS_DATA_UNDERRUN:
1118         host_status = DID_OK;
1119         break;
1120           default:
1121         printk(KERN_EMERG "qlogicpti%d: unknown completion status 0x%04x\n",
1122                id, sts->completion_status);
1123         host_status = DID_ERROR;
1124         break;
1125     }
1126 
1127     return (sts->scsi_status & STATUS_MASK) | (host_status << 16);
1128 }
1129 
1130 static struct scsi_cmnd *qlogicpti_intr_handler(struct qlogicpti *qpti)
1131 {
1132     struct scsi_cmnd *Cmnd, *done_queue = NULL;
1133     struct Status_Entry *sts;
1134     u_int in_ptr, out_ptr;
1135 
1136     if (!(sbus_readw(qpti->qregs + SBUS_STAT) & SBUS_STAT_RINT))
1137         return NULL;
1138         
1139     in_ptr = sbus_readw(qpti->qregs + MBOX5);
1140     sbus_writew(HCCTRL_CRIRQ, qpti->qregs + HCCTRL);
1141     if (sbus_readw(qpti->qregs + SBUS_SEMAPHORE) & SBUS_SEMAPHORE_LCK) {
1142         switch (sbus_readw(qpti->qregs + MBOX0)) {
1143         case ASYNC_SCSI_BUS_RESET:
1144         case EXECUTION_TIMEOUT_RESET:
1145             qpti->send_marker = 1;
1146             break;
1147         case INVALID_COMMAND:
1148         case HOST_INTERFACE_ERROR:
1149         case COMMAND_ERROR:
1150         case COMMAND_PARAM_ERROR:
1151             break;
1152         };
1153         sbus_writew(0, qpti->qregs + SBUS_SEMAPHORE);
1154     }
1155 
1156     /* This looks like a network driver! */
1157     out_ptr = qpti->res_out_ptr;
1158     while (out_ptr != in_ptr) {
1159         u_int cmd_slot;
1160 
1161         sts = (struct Status_Entry *) &qpti->res_cpu[out_ptr];
1162         out_ptr = NEXT_RES_PTR(out_ptr);
1163 
1164         /* We store an index in the handle, not the pointer in
1165          * some form.  This avoids problems due to the fact
1166          * that the handle provided is only 32-bits. -DaveM
1167          */
1168         cmd_slot = sts->handle;
1169         Cmnd = qpti->cmd_slots[cmd_slot];
1170         qpti->cmd_slots[cmd_slot] = NULL;
1171 
1172         if (sts->completion_status == CS_RESET_OCCURRED ||
1173             sts->completion_status == CS_ABORTED ||
1174             (sts->status_flags & STF_BUS_RESET))
1175             qpti->send_marker = 1;
1176 
1177         if (sts->state_flags & SF_GOT_SENSE)
1178             memcpy(Cmnd->sense_buffer, sts->req_sense_data,
1179                    SCSI_SENSE_BUFFERSIZE);
1180 
1181         if (sts->hdr.entry_type == ENTRY_STATUS)
1182             Cmnd->result =
1183                 qlogicpti_return_status(sts, qpti->qpti_id);
1184         else
1185             Cmnd->result = DID_ERROR << 16;
1186 
1187         if (scsi_bufflen(Cmnd))
1188             dma_unmap_sg(&qpti->op->dev,
1189                      scsi_sglist(Cmnd), scsi_sg_count(Cmnd),
1190                      Cmnd->sc_data_direction);
1191 
1192         qpti->cmd_count[Cmnd->device->id]--;
1193         sbus_writew(out_ptr, qpti->qregs + MBOX5);
1194         Cmnd->host_scribble = (unsigned char *) done_queue;
1195         done_queue = Cmnd;
1196     }
1197     qpti->res_out_ptr = out_ptr;
1198 
1199     return done_queue;
1200 }
1201 
1202 static irqreturn_t qpti_intr(int irq, void *dev_id)
1203 {
1204     struct qlogicpti *qpti = dev_id;
1205     unsigned long flags;
1206     struct scsi_cmnd *dq;
1207 
1208     spin_lock_irqsave(qpti->qhost->host_lock, flags);
1209     dq = qlogicpti_intr_handler(qpti);
1210 
1211     if (dq != NULL) {
1212         do {
1213             struct scsi_cmnd *next;
1214 
1215             next = (struct scsi_cmnd *) dq->host_scribble;
1216             scsi_done(dq);
1217             dq = next;
1218         } while (dq != NULL);
1219     }
1220     spin_unlock_irqrestore(qpti->qhost->host_lock, flags);
1221 
1222     return IRQ_HANDLED;
1223 }
1224 
1225 static int qlogicpti_abort(struct scsi_cmnd *Cmnd)
1226 {
1227     u_short param[6];
1228     struct Scsi_Host *host = Cmnd->device->host;
1229     struct qlogicpti *qpti = (struct qlogicpti *) host->hostdata;
1230     int return_status = SUCCESS;
1231     u32 cmd_cookie;
1232     int i;
1233 
1234     printk(KERN_WARNING "qlogicpti%d: Aborting cmd for tgt[%d] lun[%d]\n",
1235            qpti->qpti_id, (int)Cmnd->device->id, (int)Cmnd->device->lun);
1236 
1237     qlogicpti_disable_irqs(qpti);
1238 
1239     /* Find the 32-bit cookie we gave to the firmware for
1240      * this command.
1241      */
1242     for (i = 0; i < QLOGICPTI_REQ_QUEUE_LEN + 1; i++)
1243         if (qpti->cmd_slots[i] == Cmnd)
1244             break;
1245     cmd_cookie = i;
1246 
1247     param[0] = MBOX_ABORT;
1248     param[1] = (((u_short) Cmnd->device->id) << 8) | Cmnd->device->lun;
1249     param[2] = cmd_cookie >> 16;
1250     param[3] = cmd_cookie & 0xffff;
1251     if (qlogicpti_mbox_command(qpti, param, 0) ||
1252         (param[0] != MBOX_COMMAND_COMPLETE)) {
1253         printk(KERN_EMERG "qlogicpti%d: scsi abort failure: %x\n",
1254                qpti->qpti_id, param[0]);
1255         return_status = FAILED;
1256     }
1257 
1258     qlogicpti_enable_irqs(qpti);
1259 
1260     return return_status;
1261 }
1262 
1263 static int qlogicpti_reset(struct scsi_cmnd *Cmnd)
1264 {
1265     u_short param[6];
1266     struct Scsi_Host *host = Cmnd->device->host;
1267     struct qlogicpti *qpti = (struct qlogicpti *) host->hostdata;
1268     int return_status = SUCCESS;
1269 
1270     printk(KERN_WARNING "qlogicpti%d: Resetting SCSI bus!\n",
1271            qpti->qpti_id);
1272 
1273     qlogicpti_disable_irqs(qpti);
1274 
1275     param[0] = MBOX_BUS_RESET;
1276     param[1] = qpti->host_param.bus_reset_delay;
1277     if (qlogicpti_mbox_command(qpti, param, 0) ||
1278        (param[0] != MBOX_COMMAND_COMPLETE)) {
1279         printk(KERN_EMERG "qlogicisp%d: scsi bus reset failure: %x\n",
1280                qpti->qpti_id, param[0]);
1281         return_status = FAILED;
1282     }
1283 
1284     qlogicpti_enable_irqs(qpti);
1285 
1286     return return_status;
1287 }
1288 
1289 static struct scsi_host_template qpti_template = {
1290     .module         = THIS_MODULE,
1291     .name           = "qlogicpti",
1292     .info           = qlogicpti_info,
1293     .queuecommand       = qlogicpti_queuecommand,
1294     .slave_configure    = qlogicpti_slave_configure,
1295     .eh_abort_handler   = qlogicpti_abort,
1296     .eh_host_reset_handler  = qlogicpti_reset,
1297     .can_queue      = QLOGICPTI_REQ_QUEUE_LEN,
1298     .this_id        = 7,
1299     .sg_tablesize       = QLOGICPTI_MAX_SG(QLOGICPTI_REQ_QUEUE_LEN),
1300 };
1301 
1302 static const struct of_device_id qpti_match[];
1303 static int qpti_sbus_probe(struct platform_device *op)
1304 {
1305     struct device_node *dp = op->dev.of_node;
1306     struct Scsi_Host *host;
1307     struct qlogicpti *qpti;
1308     static int nqptis;
1309     const char *fcode;
1310 
1311     /* Sometimes Antares cards come up not completely
1312      * setup, and we get a report of a zero IRQ.
1313      */
1314     if (op->archdata.irqs[0] == 0)
1315         return -ENODEV;
1316 
1317     host = scsi_host_alloc(&qpti_template, sizeof(struct qlogicpti));
1318     if (!host)
1319         return -ENOMEM;
1320 
1321     qpti = shost_priv(host);
1322 
1323     host->max_id = MAX_TARGETS;
1324     qpti->qhost = host;
1325     qpti->op = op;
1326     qpti->qpti_id = nqptis;
1327     qpti->is_pti = !of_node_name_eq(op->dev.of_node, "QLGC,isp");
1328 
1329     if (qpti_map_regs(qpti) < 0)
1330         goto fail_unlink;
1331 
1332     if (qpti_register_irq(qpti) < 0)
1333         goto fail_unmap_regs;
1334 
1335     qpti_get_scsi_id(qpti);
1336     qpti_get_bursts(qpti);
1337     qpti_get_clock(qpti);
1338 
1339     /* Clear out scsi_cmnd array. */
1340     memset(qpti->cmd_slots, 0, sizeof(qpti->cmd_slots));
1341 
1342     if (qpti_map_queues(qpti) < 0)
1343         goto fail_free_irq;
1344 
1345     /* Load the firmware. */
1346     if (qlogicpti_load_firmware(qpti))
1347         goto fail_unmap_queues;
1348     if (qpti->is_pti) {
1349         /* Check the PTI status reg. */
1350         if (qlogicpti_verify_tmon(qpti))
1351             goto fail_unmap_queues;
1352     }
1353 
1354     /* Reset the ISP and init res/req queues. */
1355     if (qlogicpti_reset_hardware(host))
1356         goto fail_unmap_queues;
1357 
1358     printk("(Firmware v%d.%d.%d)", qpti->fware_majrev,
1359            qpti->fware_minrev, qpti->fware_micrev);
1360 
1361     fcode = of_get_property(dp, "isp-fcode", NULL);
1362     if (fcode && fcode[0])
1363         printk("(FCode %s)", fcode);
1364     if (of_find_property(dp, "differential", NULL) != NULL)
1365         qpti->differential = 1;
1366             
1367     printk("\nqlogicpti%d: [%s Wide, using %s interface]\n",
1368         qpti->qpti_id,
1369         (qpti->ultra ? "Ultra" : "Fast"),
1370         (qpti->differential ? "differential" : "single ended"));
1371 
1372     if (scsi_add_host(host, &op->dev)) {
1373         printk("qlogicpti%d: Failed scsi_add_host\n", qpti->qpti_id);
1374         goto fail_unmap_queues;
1375     }
1376 
1377     dev_set_drvdata(&op->dev, qpti);
1378 
1379     qpti_chain_add(qpti);
1380 
1381     scsi_scan_host(host);
1382     nqptis++;
1383 
1384     return 0;
1385 
1386 fail_unmap_queues:
1387 #define QSIZE(entries)  (((entries) + 1) * QUEUE_ENTRY_LEN)
1388     dma_free_coherent(&op->dev,
1389               QSIZE(RES_QUEUE_LEN),
1390               qpti->res_cpu, qpti->res_dvma);
1391     dma_free_coherent(&op->dev,
1392               QSIZE(QLOGICPTI_REQ_QUEUE_LEN),
1393               qpti->req_cpu, qpti->req_dvma);
1394 #undef QSIZE
1395 
1396 fail_free_irq:
1397     free_irq(qpti->irq, qpti);
1398 
1399 fail_unmap_regs:
1400     of_iounmap(&op->resource[0], qpti->qregs,
1401            resource_size(&op->resource[0]));
1402     if (qpti->is_pti)
1403         of_iounmap(&op->resource[0], qpti->sreg,
1404                sizeof(unsigned char));
1405 
1406 fail_unlink:
1407     scsi_host_put(host);
1408 
1409     return -ENODEV;
1410 }
1411 
1412 static int qpti_sbus_remove(struct platform_device *op)
1413 {
1414     struct qlogicpti *qpti = dev_get_drvdata(&op->dev);
1415 
1416     qpti_chain_del(qpti);
1417 
1418     scsi_remove_host(qpti->qhost);
1419 
1420     /* Shut up the card. */
1421     sbus_writew(0, qpti->qregs + SBUS_CTRL);
1422 
1423     /* Free IRQ handler and unmap Qlogic,ISP and PTI status regs. */
1424     free_irq(qpti->irq, qpti);
1425 
1426 #define QSIZE(entries)  (((entries) + 1) * QUEUE_ENTRY_LEN)
1427     dma_free_coherent(&op->dev,
1428               QSIZE(RES_QUEUE_LEN),
1429               qpti->res_cpu, qpti->res_dvma);
1430     dma_free_coherent(&op->dev,
1431               QSIZE(QLOGICPTI_REQ_QUEUE_LEN),
1432               qpti->req_cpu, qpti->req_dvma);
1433 #undef QSIZE
1434 
1435     of_iounmap(&op->resource[0], qpti->qregs,
1436            resource_size(&op->resource[0]));
1437     if (qpti->is_pti)
1438         of_iounmap(&op->resource[0], qpti->sreg, sizeof(unsigned char));
1439 
1440     scsi_host_put(qpti->qhost);
1441 
1442     return 0;
1443 }
1444 
1445 static const struct of_device_id qpti_match[] = {
1446     {
1447         .name = "ptisp",
1448     },
1449     {
1450         .name = "PTI,ptisp",
1451     },
1452     {
1453         .name = "QLGC,isp",
1454     },
1455     {
1456         .name = "SUNW,isp",
1457     },
1458     {},
1459 };
1460 MODULE_DEVICE_TABLE(of, qpti_match);
1461 
1462 static struct platform_driver qpti_sbus_driver = {
1463     .driver = {
1464         .name = "qpti",
1465         .of_match_table = qpti_match,
1466     },
1467     .probe      = qpti_sbus_probe,
1468     .remove     = qpti_sbus_remove,
1469 };
1470 module_platform_driver(qpti_sbus_driver);
1471 
1472 MODULE_DESCRIPTION("QlogicISP SBUS driver");
1473 MODULE_AUTHOR("David S. Miller (davem@davemloft.net)");
1474 MODULE_LICENSE("GPL");
1475 MODULE_VERSION("2.1");
1476 MODULE_FIRMWARE("qlogic/isp1000.bin");
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