drivers/scsi/qlogicfas408.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /* to be used by qlogicfas and qlogic_cs */
0003 #ifndef __QLOGICFAS408_H
0004 #define __QLOGICFAS408_H
0005
0006 /*----------------------------------------------------------------*/
0007 /* Configuration */
0008
0009 /* Set the following to max out the speed of the PIO PseudoDMA transfers,
0010    again, 0 tends to be slower, but more stable.  */
0011
0012 #define QL_TURBO_PDMA 1
0013
0014 /* This should be 1 to enable parity detection */
0015
0016 #define QL_ENABLE_PARITY 1
0017
0018 /* This will reset all devices when the driver is initialized (during bootup).
0019    The other linux drivers don't do this, but the DOS drivers do, and after
0020    using DOS or some kind of crash or lockup this will bring things back
0021    without requiring a cold boot.  It does take some time to recover from a
0022    reset, so it is slower, and I have seen timeouts so that devices weren't
0023    recognized when this was set. */
0024
0025 #define QL_RESET_AT_START 0
0026
0027 /* crystal frequency in megahertz (for offset 5 and 9)
0028    Please set this for your card.  Most Qlogic cards are 40 Mhz.  The
0029    Control Concepts ISA (not VLB) is 24 Mhz */
0030
0031 #define XTALFREQ    40
0032
0033 /**********/
0034 /* DANGER! modify these at your own risk */
0035 /* SLOWCABLE can usually be reset to zero if you have a clean setup and
0036    proper termination.  The rest are for synchronous transfers and other
0037    advanced features if your device can transfer faster than 5Mb/sec.
0038    If you are really curious, email me for a quick howto until I have
0039    something official */
0040 /**********/
0041
0042 /*****/
0043 /* config register 1 (offset 8) options */
0044 /* This needs to be set to 1 if your cabling is long or noisy */
0045 #define SLOWCABLE 1
0046
0047 /*****/
0048 /* offset 0xc */
0049 /* This will set fast (10Mhz) synchronous timing when set to 1
0050    For this to have an effect, FASTCLK must also be 1 */
0051 #define FASTSCSI 0
0052
0053 /* This when set to 1 will set a faster sync transfer rate */
0054 #define FASTCLK 0   /*(XTALFREQ>25?1:0)*/
0055
0056 /*****/
0057 /* offset 6 */
0058 /* This is the sync transfer divisor, XTALFREQ/X will be the maximum
0059    achievable data rate (assuming the rest of the system is capable
0060    and set properly) */
0061 #define SYNCXFRPD 5 /*(XTALFREQ/5)*/
0062
0063 /*****/
0064 /* offset 7 */
0065 /* This is the count of how many synchronous transfers can take place
0066     i.e. how many reqs can occur before an ack is given.
0067     The maximum value for this is 15, the upper bits can modify
0068     REQ/ACK assertion and deassertion during synchronous transfers
0069     If this is 0, the bus will only transfer asynchronously */
0070 #define SYNCOFFST 0
0071 /* for the curious, bits 7&6 control the deassertion delay in 1/2 cycles
0072     of the 40Mhz clock. If FASTCLK is 1, specifying 01 (1/2) will
0073     cause the deassertion to be early by 1/2 clock.  Bits 5&4 control
0074     the assertion delay, also in 1/2 clocks (FASTCLK is ignored here). */
0075
0076 /*----------------------------------------------------------------*/
0077
0078 struct qlogicfas408_priv {
0079     int qbase;      /* Port */
0080     int qinitid;        /* initiator ID */
0081     int qabort;     /* Flag to cause an abort */
0082     int qlirq;      /* IRQ being used */
0083     int int_type;       /* type of irq, 2 for ISA board, 0 for PCMCIA */
0084     char qinfo[80];     /* description */
0085     struct scsi_cmnd *qlcmd;    /* current command being processed */
0086     struct Scsi_Host *shost;    /* pointer back to host */
0087     struct qlogicfas408_priv *next; /* next private struct */
0088 };
0089
0090 /* The qlogic card uses two register maps - These macros select which one */
0091 #define REG0 ( outb( inb( qbase + 0xd ) & 0x7f , qbase + 0xd ), outb( 4 , qbase + 0xd ))
0092 #define REG1 ( outb( inb( qbase + 0xd ) | 0x80 , qbase + 0xd ), outb( 0xb4 | int_type, qbase + 0xd ))
0093
0094 /* following is watchdog timeout in microseconds */
0095 #define WATCHDOG 5000000
0096
0097 /*----------------------------------------------------------------*/
0098 /* the following will set the monitor border color (useful to find
0099    where something crashed or gets stuck at and as a simple profiler) */
0100
0101 #define rtrc(i) {}
0102
0103 #define get_priv_by_cmd(x) (struct qlogicfas408_priv *)&((x)->device->host->hostdata[0])
0104 #define get_priv_by_host(x) (struct qlogicfas408_priv *)&((x)->hostdata[0])
0105
0106 irqreturn_t qlogicfas408_ihandl(int irq, void *dev_id);
0107 int qlogicfas408_queuecommand(struct Scsi_Host *h, struct scsi_cmnd * cmd);
0108 int qlogicfas408_biosparam(struct scsi_device * disk,
0109                struct block_device *dev,
0110                sector_t capacity, int ip[]);
0111 int qlogicfas408_abort(struct scsi_cmnd * cmd);
0112 extern int qlogicfas408_host_reset(struct scsi_cmnd *cmd);
0113 const char *qlogicfas408_info(struct Scsi_Host *host);
0114 int qlogicfas408_get_chip_type(int qbase, int int_type);
0115 void qlogicfas408_setup(int qbase, int id, int int_type);
0116 int qlogicfas408_detect(int qbase, int int_type);
0117 void qlogicfas408_disable_ints(struct qlogicfas408_priv *priv);
0118 #endif  /* __QLOGICFAS408_H */
0119