drivers/scsi/pmcraid.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * pmcraid.h -- PMC Sierra MaxRAID controller driver header file
0004  *
0005  * Written By: Anil Ravindranath<anil_ravindranath@pmc-sierra.com>
0006  *             PMC-Sierra Inc
0007  *
0008  * Copyright (C) 2008, 2009 PMC Sierra Inc.
0009  */
0010
0011 #ifndef _PMCRAID_H
0012 #define _PMCRAID_H
0013
0014 #include <linux/types.h>
0015 #include <linux/completion.h>
0016 #include <linux/list.h>
0017 #include <scsi/scsi.h>
0018 #include <scsi/scsi_cmnd.h>
0019 #include <linux/cdev.h>
0020 #include <net/netlink.h>
0021 #include <net/genetlink.h>
0022 #include <linux/connector.h>
0023 /*
0024  * Driver name   : string representing the driver name
0025  * Device file   : /dev file to be used for management interfaces
0026  * Driver version: version string in major_version.minor_version.patch format
0027  * Driver date   : date information in "Mon dd yyyy" format
0028  */
0029 #define PMCRAID_DRIVER_NAME     "PMC MaxRAID"
0030 #define PMCRAID_DEVFILE         "pmcsas"
0031 #define PMCRAID_DRIVER_VERSION      "1.0.3"
0032
0033 #define PMCRAID_FW_VERSION_1        0x002
0034
0035 /* Maximum number of adapters supported by current version of the driver */
0036 #define PMCRAID_MAX_ADAPTERS        1024
0037
0038 /* Bit definitions as per firmware, bit position [0][1][2].....[31] */
0039 #define PMC_BIT8(n)          (1 << (7-n))
0040 #define PMC_BIT16(n)         (1 << (15-n))
0041 #define PMC_BIT32(n)         (1 << (31-n))
0042
0043 /* PMC PCI vendor ID and device ID values */
0044 #define PCI_VENDOR_ID_PMC           0x11F8
0045 #define PCI_DEVICE_ID_PMC_MAXRAID       0x5220
0046
0047 /*
0048  * MAX_CMD          : maximum commands that can be outstanding with IOA
0049  * MAX_IO_CMD       : command blocks available for IO commands
0050  * MAX_HCAM_CMD     : command blocks available for HCAMS
0051  * MAX_INTERNAL_CMD : command blocks available for internal commands like reset
0052  */
0053 #define PMCRAID_MAX_CMD             1024
0054 #define PMCRAID_MAX_IO_CMD          1020
0055 #define PMCRAID_MAX_HCAM_CMD            2
0056 #define PMCRAID_MAX_INTERNAL_CMD        2
0057
0058 /* MAX_IOADLS       : max number of scatter-gather lists supported by IOA
0059  * IOADLS_INTERNAL  : number of ioadls included as part of IOARCB.
0060  * IOADLS_EXTERNAL  : number of ioadls allocated external to IOARCB
0061  */
0062 #define PMCRAID_IOADLS_INTERNAL          27
0063 #define PMCRAID_IOADLS_EXTERNAL          37
0064 #define PMCRAID_MAX_IOADLS           PMCRAID_IOADLS_INTERNAL
0065
0066 /* HRRQ_ENTRY_SIZE  : size of hrrq buffer
0067  * IOARCB_ALIGNMENT : alignment required for IOARCB
0068  * IOADL_ALIGNMENT  : alignment requirement for IOADLs
0069  * MSIX_VECTORS     : number of MSIX vectors supported
0070  */
0071 #define HRRQ_ENTRY_SIZE                          sizeof(__le32)
0072 #define PMCRAID_IOARCB_ALIGNMENT                 32
0073 #define PMCRAID_IOADL_ALIGNMENT                  16
0074 #define PMCRAID_IOASA_ALIGNMENT                  4
0075 #define PMCRAID_NUM_MSIX_VECTORS                 16
0076
0077 /* various other limits */
0078 #define PMCRAID_VENDOR_ID_LEN           8
0079 #define PMCRAID_PRODUCT_ID_LEN          16
0080 #define PMCRAID_SERIAL_NUM_LEN          8
0081 #define PMCRAID_LUN_LEN             8
0082 #define PMCRAID_MAX_CDB_LEN         16
0083 #define PMCRAID_DEVICE_ID_LEN           8
0084 #define PMCRAID_SENSE_DATA_LEN          256
0085 #define PMCRAID_ADD_CMD_PARAM_LEN       48
0086
0087 #define PMCRAID_MAX_BUS_TO_SCAN                  1
0088 #define PMCRAID_MAX_NUM_TARGETS_PER_BUS          256
0089 #define PMCRAID_MAX_NUM_LUNS_PER_TARGET          8
0090
0091 /* IOA bus/target/lun number of IOA resources */
0092 #define PMCRAID_IOA_BUS_ID                       0xfe
0093 #define PMCRAID_IOA_TARGET_ID                    0xff
0094 #define PMCRAID_IOA_LUN_ID                       0xff
0095 #define PMCRAID_VSET_BUS_ID                      0x1
0096 #define PMCRAID_VSET_LUN_ID                      0x0
0097 #define PMCRAID_PHYS_BUS_ID                      0x0
0098 #define PMCRAID_VIRTUAL_ENCL_BUS_ID              0x8
0099 #define PMCRAID_MAX_VSET_TARGETS                 0x7F
0100 #define PMCRAID_MAX_VSET_LUNS_PER_TARGET         8
0101
0102 #define PMCRAID_IOA_MAX_SECTORS                  32767
0103 #define PMCRAID_VSET_MAX_SECTORS                 512
0104 #define PMCRAID_MAX_CMD_PER_LUN                  254
0105
0106 /* Number of configuration table entries (resources), includes 1 FP,
0107  * 1 Enclosure device
0108  */
0109 #define PMCRAID_MAX_RESOURCES                    256
0110
0111 /* Adapter Commands used by driver */
0112 #define PMCRAID_QUERY_RESOURCE_STATE             0xC2
0113 #define PMCRAID_RESET_DEVICE                     0xC3
0114 /* options to select reset target */
0115 #define ENABLE_RESET_MODIFIER                    0x80
0116 #define RESET_DEVICE_LUN                         0x40
0117 #define RESET_DEVICE_TARGET                      0x20
0118 #define RESET_DEVICE_BUS                         0x10
0119
0120 #define PMCRAID_IDENTIFY_HRRQ                    0xC4
0121 #define PMCRAID_QUERY_IOA_CONFIG                 0xC5
0122 #define PMCRAID_QUERY_CMD_STATUS         0xCB
0123 #define PMCRAID_ABORT_CMD                        0xC7
0124
0125 /* CANCEL ALL command, provides option for setting SYNC_COMPLETE
0126  * on the target resources for which commands got cancelled
0127  */
0128 #define PMCRAID_CANCEL_ALL_REQUESTS      0xCE
0129 #define PMCRAID_SYNC_COMPLETE_AFTER_CANCEL       PMC_BIT8(0)
0130
0131 /* HCAM command and types of HCAM supported by IOA */
0132 #define PMCRAID_HOST_CONTROLLED_ASYNC            0xCF
0133 #define PMCRAID_HCAM_CODE_CONFIG_CHANGE          0x01
0134 #define PMCRAID_HCAM_CODE_LOG_DATA               0x02
0135
0136 /* IOA shutdown command and various shutdown types */
0137 #define PMCRAID_IOA_SHUTDOWN                     0xF7
0138 #define PMCRAID_SHUTDOWN_NORMAL                  0x00
0139 #define PMCRAID_SHUTDOWN_PREPARE_FOR_NORMAL      0x40
0140 #define PMCRAID_SHUTDOWN_NONE                    0x100
0141 #define PMCRAID_SHUTDOWN_ABBREV                  0x80
0142
0143 /* SET SUPPORTED DEVICES command and the option to select all the
0144  * devices to be supported
0145  */
0146 #define PMCRAID_SET_SUPPORTED_DEVICES            0xFB
0147 #define ALL_DEVICES_SUPPORTED                    PMC_BIT8(0)
0148
0149 /* This option is used with SCSI WRITE_BUFFER command */
0150 #define PMCRAID_WR_BUF_DOWNLOAD_AND_SAVE         0x05
0151
0152 /* IOASC Codes used by driver */
0153 #define PMCRAID_IOASC_SENSE_MASK                 0xFFFFFF00
0154 #define PMCRAID_IOASC_SENSE_KEY(ioasc)           ((ioasc) >> 24)
0155 #define PMCRAID_IOASC_SENSE_CODE(ioasc)          (((ioasc) & 0x00ff0000) >> 16)
0156 #define PMCRAID_IOASC_SENSE_QUAL(ioasc)          (((ioasc) & 0x0000ff00) >> 8)
0157 #define PMCRAID_IOASC_SENSE_STATUS(ioasc)        ((ioasc) & 0x000000ff)
0158
0159 #define PMCRAID_IOASC_GOOD_COMPLETION           0x00000000
0160 #define PMCRAID_IOASC_GC_IOARCB_NOTFOUND        0x005A0000
0161 #define PMCRAID_IOASC_NR_INIT_CMD_REQUIRED      0x02040200
0162 #define PMCRAID_IOASC_NR_IOA_RESET_REQUIRED     0x02048000
0163 #define PMCRAID_IOASC_NR_SYNC_REQUIRED          0x023F0000
0164 #define PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC      0x03110C00
0165 #define PMCRAID_IOASC_HW_CANNOT_COMMUNICATE     0x04050000
0166 #define PMCRAID_IOASC_HW_DEVICE_TIMEOUT         0x04080100
0167 #define PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR    0x04448500
0168 #define PMCRAID_IOASC_HW_IOA_RESET_REQUIRED     0x04448600
0169 #define PMCRAID_IOASC_IR_INVALID_RESOURCE_HANDLE        0x05250000
0170 #define PMCRAID_IOASC_AC_TERMINATED_BY_HOST     0x0B5A0000
0171 #define PMCRAID_IOASC_UA_BUS_WAS_RESET          0x06290000
0172 #define PMCRAID_IOASC_TIME_STAMP_OUT_OF_SYNC        0x06908B00
0173 #define PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER     0x06298000
0174
0175 /* Driver defined IOASCs */
0176 #define PMCRAID_IOASC_IOA_WAS_RESET         0x10000001
0177 #define PMCRAID_IOASC_PCI_ACCESS_ERROR          0x10000002
0178
0179 /* Various timeout values (in milliseconds) used. If any of these are chip
0180  * specific, move them to pmcraid_chip_details structure.
0181  */
0182 #define PMCRAID_PCI_DEASSERT_TIMEOUT        2000
0183 #define PMCRAID_BIST_TIMEOUT            2000
0184 #define PMCRAID_AENWAIT_TIMEOUT         5000
0185 #define PMCRAID_TRANSOP_TIMEOUT         60000
0186
0187 #define PMCRAID_RESET_TIMEOUT           (2 * HZ)
0188 #define PMCRAID_CHECK_FOR_RESET_TIMEOUT     ((HZ / 10))
0189 #define PMCRAID_VSET_IO_TIMEOUT         (60 * HZ)
0190 #define PMCRAID_INTERNAL_TIMEOUT        (60 * HZ)
0191 #define PMCRAID_SHUTDOWN_TIMEOUT        (150 * HZ)
0192 #define PMCRAID_RESET_BUS_TIMEOUT       (60 * HZ)
0193 #define PMCRAID_RESET_HOST_TIMEOUT      (150 * HZ)
0194 #define PMCRAID_REQUEST_SENSE_TIMEOUT       (30 * HZ)
0195 #define PMCRAID_SET_SUP_DEV_TIMEOUT     (2 * 60 * HZ)
0196
0197 /* structure to represent a scatter-gather element (IOADL descriptor) */
0198 struct pmcraid_ioadl_desc {
0199     __le64 address;
0200     __le32 data_len;
0201     __u8  reserved[3];
0202     __u8  flags;
0203 } __attribute__((packed, aligned(PMCRAID_IOADL_ALIGNMENT)));
0204
0205 /* pmcraid_ioadl_desc.flags values */
0206 #define IOADL_FLAGS_CHAINED      PMC_BIT8(0)
0207 #define IOADL_FLAGS_LAST_DESC    PMC_BIT8(1)
0208 #define IOADL_FLAGS_READ_LAST    PMC_BIT8(1)
0209 #define IOADL_FLAGS_WRITE_LAST   PMC_BIT8(1)
0210
0211
0212 /* additional IOARCB data which can be CDB or additional request parameters
0213  * or list of IOADLs. Firmware supports max of 512 bytes for IOARCB, hence then
0214  * number of IOADLs are limted to 27. In case they are more than 27, they will
0215  * be used in chained form
0216  */
0217 struct pmcraid_ioarcb_add_data {
0218     union {
0219         struct pmcraid_ioadl_desc ioadl[PMCRAID_IOADLS_INTERNAL];
0220         __u8 add_cmd_params[PMCRAID_ADD_CMD_PARAM_LEN];
0221     } u;
0222 };
0223
0224 /*
0225  * IOA Request Control Block
0226  */
0227 struct pmcraid_ioarcb {
0228     __le64 ioarcb_bus_addr;
0229     __le32 resource_handle;
0230     __le32 response_handle;
0231     __le64 ioadl_bus_addr;
0232     __le32 ioadl_length;
0233     __le32 data_transfer_length;
0234     __le64 ioasa_bus_addr;
0235     __le16 ioasa_len;
0236     __le16 cmd_timeout;
0237     __le16 add_cmd_param_offset;
0238     __le16 add_cmd_param_length;
0239     __le32 reserved1[2];
0240     __le32 reserved2;
0241     __u8  request_type;
0242     __u8  request_flags0;
0243     __u8  request_flags1;
0244     __u8  hrrq_id;
0245     __u8  cdb[PMCRAID_MAX_CDB_LEN];
0246     struct pmcraid_ioarcb_add_data add_data;
0247 };
0248
0249 /* well known resource handle values */
0250 #define PMCRAID_IOA_RES_HANDLE        0xffffffff
0251 #define PMCRAID_INVALID_RES_HANDLE    0
0252
0253 /* pmcraid_ioarcb.request_type values */
0254 #define REQ_TYPE_SCSI                 0x00
0255 #define REQ_TYPE_IOACMD               0x01
0256 #define REQ_TYPE_HCAM                 0x02
0257
0258 /* pmcraid_ioarcb.flags0 values */
0259 #define TRANSFER_DIR_WRITE            PMC_BIT8(0)
0260 #define INHIBIT_UL_CHECK              PMC_BIT8(2)
0261 #define SYNC_OVERRIDE                 PMC_BIT8(3)
0262 #define SYNC_COMPLETE                 PMC_BIT8(4)
0263 #define NO_LINK_DESCS                 PMC_BIT8(5)
0264
0265 /* pmcraid_ioarcb.flags1 values */
0266 #define DELAY_AFTER_RESET             PMC_BIT8(0)
0267 #define TASK_TAG_SIMPLE               0x10
0268 #define TASK_TAG_ORDERED              0x20
0269 #define TASK_TAG_QUEUE_HEAD           0x30
0270
0271 /* toggle bit offset in response handle */
0272 #define HRRQ_TOGGLE_BIT               0x01
0273 #define HRRQ_RESPONSE_BIT             0x02
0274
0275 /* IOA Status Area */
0276 struct pmcraid_ioasa_vset {
0277     __le32 failing_lba_hi;
0278     __le32 failing_lba_lo;
0279     __le32 reserved;
0280 } __attribute__((packed, aligned(4)));
0281
0282 struct pmcraid_ioasa {
0283     __le32 ioasc;
0284     __le16 returned_status_length;
0285     __le16 available_status_length;
0286     __le32 residual_data_length;
0287     __le32 ilid;
0288     __le32 fd_ioasc;
0289     __le32 fd_res_address;
0290     __le32 fd_res_handle;
0291     __le32 reserved;
0292
0293     /* resource specific sense information */
0294     union {
0295         struct pmcraid_ioasa_vset vset;
0296     } u;
0297
0298     /* IOA autosense data */
0299     __le16 auto_sense_length;
0300     __le16 error_data_length;
0301     __u8  sense_data[PMCRAID_SENSE_DATA_LEN];
0302 } __attribute__((packed, aligned(4)));
0303
0304 #define PMCRAID_DRIVER_ILID           0xffffffff
0305
0306 /* Config Table Entry per Resource */
0307 struct pmcraid_config_table_entry {
0308     __u8  resource_type;
0309     __u8  bus_protocol;
0310     __le16 array_id;
0311     __u8  common_flags0;
0312     __u8  common_flags1;
0313     __u8  unique_flags0;
0314     __u8  unique_flags1;    /*also used as vset target_id */
0315     __le32 resource_handle;
0316     __le32 resource_address;
0317     __u8  device_id[PMCRAID_DEVICE_ID_LEN];
0318     __u8  lun[PMCRAID_LUN_LEN];
0319 } __attribute__((packed, aligned(4)));
0320
0321 /* extended configuration table sizes are also of 32 bytes in size */
0322 struct pmcraid_config_table_entry_ext {
0323     struct pmcraid_config_table_entry cfgte;
0324 };
0325
0326 /* resource types (config_table_entry.resource_type values) */
0327 #define RES_TYPE_AF_DASD     0x00
0328 #define RES_TYPE_GSCSI       0x01
0329 #define RES_TYPE_VSET        0x02
0330 #define RES_TYPE_IOA_FP      0xFF
0331
0332 #define RES_IS_IOA(res)      ((res).resource_type == RES_TYPE_IOA_FP)
0333 #define RES_IS_GSCSI(res)    ((res).resource_type == RES_TYPE_GSCSI)
0334 #define RES_IS_VSET(res)     ((res).resource_type == RES_TYPE_VSET)
0335 #define RES_IS_AFDASD(res)   ((res).resource_type == RES_TYPE_AF_DASD)
0336
0337 /* bus_protocol values used by driver */
0338 #define RES_TYPE_VENCLOSURE  0x8
0339
0340 /* config_table_entry.common_flags0 */
0341 #define MULTIPATH_RESOURCE   PMC_BIT32(0)
0342
0343 /* unique_flags1 */
0344 #define IMPORT_MODE_MANUAL   PMC_BIT8(0)
0345
0346 /* well known resource handle values */
0347 #define RES_HANDLE_IOA       0xFFFFFFFF
0348 #define RES_HANDLE_NONE      0x00000000
0349
0350 /* well known resource address values */
0351 #define RES_ADDRESS_IOAFP    0xFEFFFFFF
0352 #define RES_ADDRESS_INVALID  0xFFFFFFFF
0353
0354 /* BUS/TARGET/LUN values from resource_addrr */
0355 #define RES_BUS(res_addr)    (le32_to_cpu(res_addr) & 0xFF)
0356 #define RES_TARGET(res_addr) ((le32_to_cpu(res_addr) >> 16) & 0xFF)
0357 #define RES_LUN(res_addr)    0x0
0358
0359 /* configuration table structure */
0360 struct pmcraid_config_table {
0361     __le16 num_entries;
0362     __u8  table_format;
0363     __u8  reserved1;
0364     __u8  flags;
0365     __u8  reserved2[11];
0366     union {
0367         struct pmcraid_config_table_entry
0368                 entries[PMCRAID_MAX_RESOURCES];
0369         struct pmcraid_config_table_entry_ext
0370                 entries_ext[PMCRAID_MAX_RESOURCES];
0371     };
0372 } __attribute__((packed, aligned(4)));
0373
0374 /* config_table.flags value */
0375 #define MICROCODE_UPDATE_REQUIRED       PMC_BIT32(0)
0376
0377 /*
0378  * HCAM format
0379  */
0380 #define PMCRAID_HOSTRCB_LDNSIZE         4056
0381
0382 /* Error log notification format */
0383 struct pmcraid_hostrcb_error {
0384     __le32 fd_ioasc;
0385     __le32 fd_ra;
0386     __le32 fd_rh;
0387     __le32 prc;
0388     union {
0389         __u8 data[PMCRAID_HOSTRCB_LDNSIZE];
0390     } u;
0391 } __attribute__ ((packed, aligned(4)));
0392
0393 struct pmcraid_hcam_hdr {
0394     __u8  op_code;
0395     __u8  notification_type;
0396     __u8  notification_lost;
0397     __u8  flags;
0398     __u8  overlay_id;
0399     __u8  reserved1[3];
0400     __le32 ilid;
0401     __le32 timestamp1;
0402     __le32 timestamp2;
0403     __le32 data_len;
0404 } __attribute__((packed, aligned(4)));
0405
0406 #define PMCRAID_AEN_GROUP   0x3
0407
0408 struct pmcraid_hcam_ccn {
0409     struct pmcraid_hcam_hdr header;
0410     struct pmcraid_config_table_entry cfg_entry;
0411     struct pmcraid_config_table_entry cfg_entry_old;
0412 } __attribute__((packed, aligned(4)));
0413
0414 #define PMCRAID_CCN_EXT_SIZE    3944
0415 struct pmcraid_hcam_ccn_ext {
0416     struct pmcraid_hcam_hdr header;
0417     struct pmcraid_config_table_entry_ext cfg_entry;
0418     struct pmcraid_config_table_entry_ext cfg_entry_old;
0419     __u8   reserved[PMCRAID_CCN_EXT_SIZE];
0420 } __attribute__((packed, aligned(4)));
0421
0422 struct pmcraid_hcam_ldn {
0423     struct pmcraid_hcam_hdr header;
0424     struct pmcraid_hostrcb_error error_log;
0425 } __attribute__((packed, aligned(4)));
0426
0427 /* pmcraid_hcam.op_code values */
0428 #define HOSTRCB_TYPE_CCN            0xE1
0429 #define HOSTRCB_TYPE_LDN            0xE2
0430
0431 /* pmcraid_hcam.notification_type values */
0432 #define NOTIFICATION_TYPE_ENTRY_CHANGED     0x0
0433 #define NOTIFICATION_TYPE_ENTRY_NEW     0x1
0434 #define NOTIFICATION_TYPE_ENTRY_DELETED     0x2
0435 #define NOTIFICATION_TYPE_STATE_CHANGE      0x3
0436 #define NOTIFICATION_TYPE_ENTRY_STATECHANGED    0x4
0437 #define NOTIFICATION_TYPE_ERROR_LOG     0x10
0438 #define NOTIFICATION_TYPE_INFORMATION_LOG   0x11
0439
0440 #define HOSTRCB_NOTIFICATIONS_LOST      PMC_BIT8(0)
0441
0442 /* pmcraid_hcam.flags values */
0443 #define HOSTRCB_INTERNAL_OP_ERROR       PMC_BIT8(0)
0444 #define HOSTRCB_ERROR_RESPONSE_SENT     PMC_BIT8(1)
0445
0446 /* pmcraid_hcam.overlay_id values */
0447 #define HOSTRCB_OVERLAY_ID_08           0x08
0448 #define HOSTRCB_OVERLAY_ID_09           0x09
0449 #define HOSTRCB_OVERLAY_ID_11           0x11
0450 #define HOSTRCB_OVERLAY_ID_12           0x12
0451 #define HOSTRCB_OVERLAY_ID_13           0x13
0452 #define HOSTRCB_OVERLAY_ID_14           0x14
0453 #define HOSTRCB_OVERLAY_ID_16           0x16
0454 #define HOSTRCB_OVERLAY_ID_17           0x17
0455 #define HOSTRCB_OVERLAY_ID_20           0x20
0456 #define HOSTRCB_OVERLAY_ID_FF           0xFF
0457
0458 /* Implementation specific card details */
0459 struct pmcraid_chip_details {
0460     /* hardware register offsets */
0461     unsigned long  ioastatus;
0462     unsigned long  ioarrin;
0463     unsigned long  mailbox;
0464     unsigned long  global_intr_mask;
0465     unsigned long  ioa_host_intr;
0466     unsigned long  ioa_host_msix_intr;
0467     unsigned long  ioa_host_intr_clr;
0468     unsigned long  ioa_host_mask;
0469     unsigned long  ioa_host_mask_clr;
0470     unsigned long  host_ioa_intr;
0471     unsigned long  host_ioa_intr_clr;
0472
0473     /* timeout used during transitional to operational state */
0474     unsigned long transop_timeout;
0475 };
0476
0477 /* IOA to HOST doorbells (interrupts) */
0478 #define INTRS_TRANSITION_TO_OPERATIONAL     PMC_BIT32(0)
0479 #define INTRS_IOARCB_TRANSFER_FAILED        PMC_BIT32(3)
0480 #define INTRS_IOA_UNIT_CHECK            PMC_BIT32(4)
0481 #define INTRS_NO_HRRQ_FOR_CMD_RESPONSE      PMC_BIT32(5)
0482 #define INTRS_CRITICAL_OP_IN_PROGRESS       PMC_BIT32(6)
0483 #define INTRS_IO_DEBUG_ACK          PMC_BIT32(7)
0484 #define INTRS_IOARRIN_LOST          PMC_BIT32(27)
0485 #define INTRS_SYSTEM_BUS_MMIO_ERROR     PMC_BIT32(28)
0486 #define INTRS_IOA_PROCESSOR_ERROR       PMC_BIT32(29)
0487 #define INTRS_HRRQ_VALID            PMC_BIT32(30)
0488 #define INTRS_OPERATIONAL_STATUS        PMC_BIT32(0)
0489 #define INTRS_ALLOW_MSIX_VECTOR0        PMC_BIT32(31)
0490
0491 /* Host to IOA Doorbells */
0492 #define DOORBELL_RUNTIME_RESET          PMC_BIT32(1)
0493 #define DOORBELL_IOA_RESET_ALERT        PMC_BIT32(7)
0494 #define DOORBELL_IOA_DEBUG_ALERT        PMC_BIT32(9)
0495 #define DOORBELL_ENABLE_DESTRUCTIVE_DIAGS   PMC_BIT32(8)
0496 #define DOORBELL_IOA_START_BIST         PMC_BIT32(23)
0497 #define DOORBELL_INTR_MODE_MSIX         PMC_BIT32(25)
0498 #define DOORBELL_INTR_MSIX_CLR          PMC_BIT32(26)
0499 #define DOORBELL_RESET_IOA          PMC_BIT32(31)
0500
0501 /* Global interrupt mask register value */
0502 #define GLOBAL_INTERRUPT_MASK           0x5ULL
0503
0504 #define PMCRAID_ERROR_INTERRUPTS    (INTRS_IOARCB_TRANSFER_FAILED | \
0505                      INTRS_IOA_UNIT_CHECK | \
0506                      INTRS_NO_HRRQ_FOR_CMD_RESPONSE | \
0507                      INTRS_IOARRIN_LOST | \
0508                      INTRS_SYSTEM_BUS_MMIO_ERROR | \
0509                      INTRS_IOA_PROCESSOR_ERROR)
0510
0511 #define PMCRAID_PCI_INTERRUPTS      (PMCRAID_ERROR_INTERRUPTS | \
0512                      INTRS_HRRQ_VALID | \
0513                      INTRS_TRANSITION_TO_OPERATIONAL |\
0514                      INTRS_ALLOW_MSIX_VECTOR0)
0515
0516 /* control_block, associated with each of the commands contains IOARCB, IOADLs
0517  * memory for IOASA. Additional 3 * 16 bytes are allocated in order to support
0518  * additional request parameters (of max size 48) any command.
0519  */
0520 struct pmcraid_control_block {
0521     struct pmcraid_ioarcb ioarcb;
0522     struct pmcraid_ioadl_desc ioadl[PMCRAID_IOADLS_EXTERNAL + 3];
0523     struct pmcraid_ioasa ioasa;
0524 } __attribute__ ((packed, aligned(PMCRAID_IOARCB_ALIGNMENT)));
0525
0526 /* pmcraid_sglist - Scatter-gather list allocated for passthrough ioctls
0527  */
0528 struct pmcraid_sglist {
0529     u32 order;
0530     u32 num_sg;
0531     u32 num_dma_sg;
0532     struct scatterlist *scatterlist;
0533 };
0534
0535 /* page D0 inquiry data of focal point resource */
0536 struct pmcraid_inquiry_data {
0537     __u8    ph_dev_type;
0538     __u8    page_code;
0539     __u8    reserved1;
0540     __u8    add_page_len;
0541     __u8    length;
0542     __u8    reserved2;
0543     __be16  fw_version;
0544     __u8    reserved3[16];
0545 };
0546
0547 #define PMCRAID_TIMESTAMP_LEN       12
0548 #define PMCRAID_REQ_TM_STR_LEN      6
0549 #define PMCRAID_SCSI_SET_TIMESTAMP  0xA4
0550 #define PMCRAID_SCSI_SERVICE_ACTION 0x0F
0551
0552 struct pmcraid_timestamp_data {
0553     __u8 reserved1[4];
0554     __u8 timestamp[PMCRAID_REQ_TM_STR_LEN];     /* current time value */
0555     __u8 reserved2[2];
0556 };
0557
0558 /* pmcraid_cmd - LLD representation of SCSI command */
0559 struct pmcraid_cmd {
0560
0561     /* Ptr and bus address of DMA.able control block for this command */
0562     struct pmcraid_control_block *ioa_cb;
0563     dma_addr_t ioa_cb_bus_addr;
0564     dma_addr_t dma_handle;
0565
0566     /* pointer to mid layer structure of SCSI commands */
0567     struct scsi_cmnd *scsi_cmd;
0568
0569     struct list_head free_list;
0570     struct completion wait_for_completion;
0571     struct timer_list timer;    /* needed for internal commands */
0572     u32 timeout;            /* current timeout value */
0573     u32 index;          /* index into the command list */
0574     u8 completion_req;      /* for handling internal commands */
0575     u8 release;         /* for handling completions */
0576
0577     void (*cmd_done) (struct pmcraid_cmd *);
0578     struct pmcraid_instance *drv_inst;
0579
0580     struct pmcraid_sglist *sglist; /* used for passthrough IOCTLs */
0581
0582     /* scratch used */
0583     union {
0584         /* during reset sequence */
0585         unsigned long time_left;
0586         struct pmcraid_resource_entry *res;
0587         int hrrq_index;
0588
0589         /* used during IO command error handling. Sense buffer
0590          * for REQUEST SENSE command if firmware is not sending
0591          * auto sense data
0592          */
0593         struct  {
0594             u8 *sense_buffer;
0595             dma_addr_t sense_buffer_dma;
0596         };
0597     };
0598 };
0599
0600 /*
0601  * Interrupt registers of IOA
0602  */
0603 struct pmcraid_interrupts {
0604     void __iomem *ioa_host_interrupt_reg;
0605     void __iomem *ioa_host_msix_interrupt_reg;
0606     void __iomem *ioa_host_interrupt_clr_reg;
0607     void __iomem *ioa_host_interrupt_mask_reg;
0608     void __iomem *ioa_host_interrupt_mask_clr_reg;
0609     void __iomem *global_interrupt_mask_reg;
0610     void __iomem *host_ioa_interrupt_reg;
0611     void __iomem *host_ioa_interrupt_clr_reg;
0612 };
0613
0614 /* ISR parameters LLD allocates (one for each MSI-X if enabled) vectors */
0615 struct pmcraid_isr_param {
0616     struct pmcraid_instance *drv_inst;
0617     u8 hrrq_id;         /* hrrq entry index */
0618 };
0619
0620
0621 /* AEN message header sent as part of event data to applications */
0622 struct pmcraid_aen_msg {
0623     u32 hostno;
0624     u32 length;
0625     u8  reserved[8];
0626     u8  data[];
0627 };
0628
0629 /* Controller state event message type */
0630 struct pmcraid_state_msg {
0631     struct pmcraid_aen_msg msg;
0632     u32 ioa_state;
0633 };
0634
0635 #define PMC_DEVICE_EVENT_RESET_START        0x11000000
0636 #define PMC_DEVICE_EVENT_RESET_SUCCESS      0x11000001
0637 #define PMC_DEVICE_EVENT_RESET_FAILED       0x11000002
0638 #define PMC_DEVICE_EVENT_SHUTDOWN_START     0x11000003
0639 #define PMC_DEVICE_EVENT_SHUTDOWN_SUCCESS   0x11000004
0640 #define PMC_DEVICE_EVENT_SHUTDOWN_FAILED    0x11000005
0641
0642 struct pmcraid_hostrcb {
0643     struct pmcraid_instance *drv_inst;
0644     struct pmcraid_aen_msg *msg;
0645     struct pmcraid_hcam_hdr *hcam;  /* pointer to hcam buffer */
0646     struct pmcraid_cmd  *cmd;       /* pointer to command block used */
0647     dma_addr_t baddr;       /* system address of hcam buffer */
0648     atomic_t ignore;        /* process HCAM response ? */
0649 };
0650
0651 #define PMCRAID_AEN_HDR_SIZE    sizeof(struct pmcraid_aen_msg)
0652
0653
0654
0655 /*
0656  * Per adapter structure maintained by LLD
0657  */
0658 struct pmcraid_instance {
0659     /* Array of allowed-to-be-exposed resources, initialized from
0660      * Configutation Table, later updated with CCNs
0661      */
0662     struct pmcraid_resource_entry *res_entries;
0663
0664     struct list_head free_res_q;    /* res_entries lists for easy lookup */
0665     struct list_head used_res_q;    /* List of to be exposed resources */
0666     spinlock_t resource_lock;   /* spinlock to protect resource list */
0667
0668     void __iomem *mapped_dma_addr;
0669     void __iomem *ioa_status;   /* Iomapped IOA status register */
0670     void __iomem *mailbox;      /* Iomapped mailbox register */
0671     void __iomem *ioarrin;      /* IOmapped IOARR IN register */
0672
0673     struct pmcraid_interrupts int_regs;
0674     struct pmcraid_chip_details *chip_cfg;
0675
0676     /* HostRCBs needed for HCAM */
0677     struct pmcraid_hostrcb ldn;
0678     struct pmcraid_hostrcb ccn;
0679     struct pmcraid_state_msg scn;   /* controller state change msg */
0680
0681
0682     /* Bus address of start of HRRQ */
0683     dma_addr_t hrrq_start_bus_addr[PMCRAID_NUM_MSIX_VECTORS];
0684
0685     /* Pointer to 1st entry of HRRQ */
0686     __le32 *hrrq_start[PMCRAID_NUM_MSIX_VECTORS];
0687
0688     /* Pointer to last entry of HRRQ */
0689     __le32 *hrrq_end[PMCRAID_NUM_MSIX_VECTORS];
0690
0691     /* Pointer to current pointer of hrrq */
0692     __le32 *hrrq_curr[PMCRAID_NUM_MSIX_VECTORS];
0693
0694     /* Lock for HRRQ access */
0695     spinlock_t hrrq_lock[PMCRAID_NUM_MSIX_VECTORS];
0696
0697     struct pmcraid_inquiry_data *inq_data;
0698     dma_addr_t  inq_data_baddr;
0699
0700     struct pmcraid_timestamp_data *timestamp_data;
0701     dma_addr_t  timestamp_data_baddr;
0702
0703     /* size of configuration table entry, varies based on the firmware */
0704     u32 config_table_entry_size;
0705
0706     /* Expected toggle bit at host */
0707     u8 host_toggle_bit[PMCRAID_NUM_MSIX_VECTORS];
0708
0709
0710     /* Wait Q for  threads to wait for Reset IOA completion */
0711     wait_queue_head_t reset_wait_q;
0712     struct pmcraid_cmd *reset_cmd;
0713
0714     /* structures for supporting SIGIO based AEN. */
0715     struct fasync_struct *aen_queue;
0716     struct mutex aen_queue_lock;    /* lock for aen subscribers list */
0717     struct cdev cdev;
0718
0719     struct Scsi_Host *host; /* mid layer interface structure handle */
0720     struct pci_dev *pdev;   /* PCI device structure handle */
0721
0722     /* No of Reset IOA retries . IOA marked dead if threshold exceeds */
0723     u8 ioa_reset_attempts;
0724 #define PMCRAID_RESET_ATTEMPTS 3
0725
0726     u8  current_log_level;  /* default level for logging IOASC errors */
0727
0728     u8  num_hrrq;       /* Number of interrupt vectors allocated */
0729     u8  interrupt_mode; /* current interrupt mode legacy or msix */
0730     dev_t dev;      /* Major-Minor numbers for Char device */
0731
0732     /* Used as ISR handler argument */
0733     struct pmcraid_isr_param hrrq_vector[PMCRAID_NUM_MSIX_VECTORS];
0734
0735     /* Message id as filled in last fired IOARCB, used to identify HRRQ */
0736     atomic_t last_message_id;
0737
0738     /* configuration table */
0739     struct pmcraid_config_table *cfg_table;
0740     dma_addr_t cfg_table_bus_addr;
0741
0742     /* structures related to command blocks */
0743     struct kmem_cache *cmd_cachep;      /* cache for cmd blocks */
0744     struct dma_pool *control_pool;      /* pool for control blocks */
0745     char   cmd_pool_name[64];       /* name of cmd cache */
0746     char   ctl_pool_name[64];       /* name of control cache */
0747
0748     struct pmcraid_cmd *cmd_list[PMCRAID_MAX_CMD];
0749
0750     struct list_head free_cmd_pool;
0751     struct list_head pending_cmd_pool;
0752     spinlock_t free_pool_lock;      /* free pool lock */
0753     spinlock_t pending_pool_lock;       /* pending pool lock */
0754
0755     /* Tasklet to handle deferred processing */
0756     struct tasklet_struct isr_tasklet[PMCRAID_NUM_MSIX_VECTORS];
0757
0758     /* Work-queue (Shared) for deferred reset processing */
0759     struct work_struct worker_q;
0760
0761     /* No of IO commands pending with FW */
0762     atomic_t outstanding_cmds;
0763
0764     /* should add/delete resources to mid-layer now ?*/
0765     atomic_t expose_resources;
0766
0767
0768
0769     u32 ioa_state:4;    /* For IOA Reset sequence FSM */
0770 #define IOA_STATE_OPERATIONAL       0x0
0771 #define IOA_STATE_UNKNOWN           0x1
0772 #define IOA_STATE_DEAD              0x2
0773 #define IOA_STATE_IN_SOFT_RESET     0x3
0774 #define IOA_STATE_IN_HARD_RESET     0x4
0775 #define IOA_STATE_IN_RESET_ALERT    0x5
0776 #define IOA_STATE_IN_BRINGDOWN      0x6
0777 #define IOA_STATE_IN_BRINGUP        0x7
0778
0779     u32 ioa_reset_in_progress:1; /* true if IOA reset is in progress */
0780     u32 ioa_hard_reset:1;   /* TRUE if Hard Reset is needed */
0781     u32 ioa_unit_check:1;   /* Indicates Unit Check condition */
0782     u32 ioa_bringdown:1;    /* whether IOA needs to be brought down */
0783     u32 force_ioa_reset:1;  /* force adapter reset ? */
0784     u32 reinit_cfg_table:1; /* reinit config table due to lost CCN */
0785     u32 ioa_shutdown_type:2;/* shutdown type used during reset */
0786 #define SHUTDOWN_NONE               0x0
0787 #define SHUTDOWN_NORMAL             0x1
0788 #define SHUTDOWN_ABBREV             0x2
0789     u32 timestamp_error:1; /* indicate set timestamp for out of sync */
0790
0791 };
0792
0793 /* LLD maintained resource entry structure */
0794 struct pmcraid_resource_entry {
0795     struct list_head queue; /* link to "to be exposed" resources */
0796     union {
0797         struct pmcraid_config_table_entry cfg_entry;
0798         struct pmcraid_config_table_entry_ext cfg_entry_ext;
0799     };
0800     struct scsi_device *scsi_dev;   /* Link scsi_device structure */
0801     atomic_t read_failures;     /* count of failed READ commands */
0802     atomic_t write_failures;    /* count of failed WRITE commands */
0803
0804     /* To indicate add/delete/modify during CCN */
0805     u8 change_detected;
0806 #define RES_CHANGE_ADD          0x1 /* add this to mid-layer */
0807 #define RES_CHANGE_DEL          0x2 /* remove this from mid-layer */
0808
0809     u8 reset_progress;      /* Device is resetting */
0810
0811     /*
0812      * When IOA asks for sync (i.e. IOASC = Not Ready, Sync Required), this
0813      * flag will be set, mid layer will be asked to retry. In the next
0814      * attempt, this flag will be checked in queuecommand() to set
0815      * SYNC_COMPLETE flag in IOARCB (flag_0).
0816      */
0817     u8 sync_reqd;
0818
0819     /* target indicates the mapped target_id assigned to this resource if
0820      * this is VSET resource. For non-VSET resources this will be un-used
0821      * or zero
0822      */
0823     u8 target;
0824 };
0825
0826 /* Data structures used in IOASC error code logging */
0827 struct pmcraid_ioasc_error {
0828     u32 ioasc_code;     /* IOASC code */
0829     u8 log_level;       /* default log level assignment. */
0830     char *error_string;
0831 };
0832
0833 /* Initial log_level assignments for various IOASCs */
0834 #define IOASC_LOG_LEVEL_NONE        0x0 /* no logging */
0835 #define IOASC_LOG_LEVEL_MUST        0x1 /* must log: all high-severity errors */
0836 #define IOASC_LOG_LEVEL_HARD        0x2 /* optional – low severity errors */
0837
0838 /* Error information maintained by LLD. LLD initializes the pmcraid_error_table
0839  * statically.
0840  */
0841 static struct pmcraid_ioasc_error pmcraid_ioasc_error_table[] = {
0842     {0x01180600, IOASC_LOG_LEVEL_HARD,
0843      "Recovered Error, soft media error, sector reassignment suggested"},
0844     {0x015D0000, IOASC_LOG_LEVEL_HARD,
0845      "Recovered Error, failure prediction threshold exceeded"},
0846     {0x015D9200, IOASC_LOG_LEVEL_HARD,
0847      "Recovered Error, soft Cache Card Battery error threshold"},
0848     {0x015D9200, IOASC_LOG_LEVEL_HARD,
0849      "Recovered Error, soft Cache Card Battery error threshold"},
0850     {0x02048000, IOASC_LOG_LEVEL_HARD,
0851      "Not Ready, IOA Reset Required"},
0852     {0x02408500, IOASC_LOG_LEVEL_HARD,
0853      "Not Ready, IOA microcode download required"},
0854     {0x03110B00, IOASC_LOG_LEVEL_HARD,
0855      "Medium Error, data unreadable, reassignment suggested"},
0856     {0x03110C00, IOASC_LOG_LEVEL_MUST,
0857      "Medium Error, data unreadable do not reassign"},
0858     {0x03310000, IOASC_LOG_LEVEL_HARD,
0859      "Medium Error, media corrupted"},
0860     {0x04050000, IOASC_LOG_LEVEL_HARD,
0861      "Hardware Error, IOA can't communicate with device"},
0862     {0x04080000, IOASC_LOG_LEVEL_MUST,
0863      "Hardware Error, device bus error"},
0864     {0x04088000, IOASC_LOG_LEVEL_MUST,
0865      "Hardware Error, device bus is not functioning"},
0866     {0x04118000, IOASC_LOG_LEVEL_HARD,
0867      "Hardware Error, IOA reserved area data check"},
0868     {0x04118100, IOASC_LOG_LEVEL_HARD,
0869      "Hardware Error, IOA reserved area invalid data pattern"},
0870     {0x04118200, IOASC_LOG_LEVEL_HARD,
0871      "Hardware Error, IOA reserved area LRC error"},
0872     {0x04320000, IOASC_LOG_LEVEL_HARD,
0873      "Hardware Error, reassignment space exhausted"},
0874     {0x04330000, IOASC_LOG_LEVEL_HARD,
0875      "Hardware Error, data transfer underlength error"},
0876     {0x04330000, IOASC_LOG_LEVEL_HARD,
0877      "Hardware Error, data transfer overlength error"},
0878     {0x04418000, IOASC_LOG_LEVEL_MUST,
0879      "Hardware Error, PCI bus error"},
0880     {0x04440000, IOASC_LOG_LEVEL_HARD,
0881      "Hardware Error, device error"},
0882     {0x04448200, IOASC_LOG_LEVEL_MUST,
0883      "Hardware Error, IOA error"},
0884     {0x04448300, IOASC_LOG_LEVEL_HARD,
0885      "Hardware Error, undefined device response"},
0886     {0x04448400, IOASC_LOG_LEVEL_HARD,
0887      "Hardware Error, IOA microcode error"},
0888     {0x04448600, IOASC_LOG_LEVEL_HARD,
0889      "Hardware Error, IOA reset required"},
0890     {0x04449200, IOASC_LOG_LEVEL_HARD,
0891      "Hardware Error, hard Cache Fearuee Card Battery error"},
0892     {0x0444A000, IOASC_LOG_LEVEL_HARD,
0893      "Hardware Error, failed device altered"},
0894     {0x0444A200, IOASC_LOG_LEVEL_HARD,
0895      "Hardware Error, data check after reassignment"},
0896     {0x0444A300, IOASC_LOG_LEVEL_HARD,
0897      "Hardware Error, LRC error after reassignment"},
0898     {0x044A0000, IOASC_LOG_LEVEL_HARD,
0899      "Hardware Error, device bus error (msg/cmd phase)"},
0900     {0x04670400, IOASC_LOG_LEVEL_HARD,
0901      "Hardware Error, new device can't be used"},
0902     {0x04678000, IOASC_LOG_LEVEL_HARD,
0903      "Hardware Error, invalid multiadapter configuration"},
0904     {0x04678100, IOASC_LOG_LEVEL_HARD,
0905      "Hardware Error, incorrect connection between enclosures"},
0906     {0x04678200, IOASC_LOG_LEVEL_HARD,
0907      "Hardware Error, connections exceed IOA design limits"},
0908     {0x04678300, IOASC_LOG_LEVEL_HARD,
0909      "Hardware Error, incorrect multipath connection"},
0910     {0x04679000, IOASC_LOG_LEVEL_HARD,
0911      "Hardware Error, command to LUN failed"},
0912     {0x064C8000, IOASC_LOG_LEVEL_HARD,
0913      "Unit Attention, cache exists for missing/failed device"},
0914     {0x06670100, IOASC_LOG_LEVEL_HARD,
0915      "Unit Attention, incompatible exposed mode device"},
0916     {0x06670600, IOASC_LOG_LEVEL_HARD,
0917      "Unit Attention, attachment of logical unit failed"},
0918     {0x06678000, IOASC_LOG_LEVEL_HARD,
0919      "Unit Attention, cables exceed connective design limit"},
0920     {0x06678300, IOASC_LOG_LEVEL_HARD,
0921      "Unit Attention, incomplete multipath connection between" \
0922      "IOA and enclosure"},
0923     {0x06678400, IOASC_LOG_LEVEL_HARD,
0924      "Unit Attention, incomplete multipath connection between" \
0925      "device and enclosure"},
0926     {0x06678500, IOASC_LOG_LEVEL_HARD,
0927      "Unit Attention, incomplete multipath connection between" \
0928      "IOA and remote IOA"},
0929     {0x06678600, IOASC_LOG_LEVEL_HARD,
0930      "Unit Attention, missing remote IOA"},
0931     {0x06679100, IOASC_LOG_LEVEL_HARD,
0932      "Unit Attention, enclosure doesn't support required multipath" \
0933      "function"},
0934     {0x06698200, IOASC_LOG_LEVEL_HARD,
0935      "Unit Attention, corrupt array parity detected on device"},
0936     {0x066B0200, IOASC_LOG_LEVEL_HARD,
0937      "Unit Attention, array exposed"},
0938     {0x066B8200, IOASC_LOG_LEVEL_HARD,
0939      "Unit Attention, exposed array is still protected"},
0940     {0x066B9200, IOASC_LOG_LEVEL_HARD,
0941      "Unit Attention, Multipath redundancy level got worse"},
0942     {0x07270000, IOASC_LOG_LEVEL_HARD,
0943      "Data Protect, device is read/write protected by IOA"},
0944     {0x07278000, IOASC_LOG_LEVEL_HARD,
0945      "Data Protect, IOA doesn't support device attribute"},
0946     {0x07278100, IOASC_LOG_LEVEL_HARD,
0947      "Data Protect, NVRAM mirroring prohibited"},
0948     {0x07278400, IOASC_LOG_LEVEL_HARD,
0949      "Data Protect, array is short 2 or more devices"},
0950     {0x07278600, IOASC_LOG_LEVEL_HARD,
0951      "Data Protect, exposed array is short a required device"},
0952     {0x07278700, IOASC_LOG_LEVEL_HARD,
0953      "Data Protect, array members not at required addresses"},
0954     {0x07278800, IOASC_LOG_LEVEL_HARD,
0955      "Data Protect, exposed mode device resource address conflict"},
0956     {0x07278900, IOASC_LOG_LEVEL_HARD,
0957      "Data Protect, incorrect resource address of exposed mode device"},
0958     {0x07278A00, IOASC_LOG_LEVEL_HARD,
0959      "Data Protect, Array is missing a device and parity is out of sync"},
0960     {0x07278B00, IOASC_LOG_LEVEL_HARD,
0961      "Data Protect, maximum number of arrays already exist"},
0962     {0x07278C00, IOASC_LOG_LEVEL_HARD,
0963      "Data Protect, cannot locate cache data for device"},
0964     {0x07278D00, IOASC_LOG_LEVEL_HARD,
0965      "Data Protect, cache data exits for a changed device"},
0966     {0x07279100, IOASC_LOG_LEVEL_HARD,
0967      "Data Protect, detection of a device requiring format"},
0968     {0x07279200, IOASC_LOG_LEVEL_HARD,
0969      "Data Protect, IOA exceeds maximum number of devices"},
0970     {0x07279600, IOASC_LOG_LEVEL_HARD,
0971      "Data Protect, missing array, volume set is not functional"},
0972     {0x07279700, IOASC_LOG_LEVEL_HARD,
0973      "Data Protect, single device for a volume set"},
0974     {0x07279800, IOASC_LOG_LEVEL_HARD,
0975      "Data Protect, missing multiple devices for a volume set"},
0976     {0x07279900, IOASC_LOG_LEVEL_HARD,
0977      "Data Protect, maximum number of volument sets already exists"},
0978     {0x07279A00, IOASC_LOG_LEVEL_HARD,
0979      "Data Protect, other volume set problem"},
0980 };
0981
0982 /* macros to help in debugging */
0983 #define pmcraid_err(...)  \
0984     printk(KERN_ERR "MaxRAID: "__VA_ARGS__)
0985
0986 #define pmcraid_info(...) \
0987     if (pmcraid_debug_log) \
0988         printk(KERN_INFO "MaxRAID: "__VA_ARGS__)
0989
0990 /* check if given command is a SCSI READ or SCSI WRITE command */
0991 #define SCSI_READ_CMD           0x1 /* any of SCSI READ commands */
0992 #define SCSI_WRITE_CMD          0x2 /* any of SCSI WRITE commands */
0993 #define SCSI_CMD_TYPE(opcode) \
0994 ({  u8 op = opcode; u8 __type = 0;\
0995     if (op == READ_6 || op == READ_10 || op == READ_12 || op == READ_16)\
0996         __type = SCSI_READ_CMD;\
0997     else if (op == WRITE_6 || op == WRITE_10 || op == WRITE_12 || \
0998          op == WRITE_16)\
0999         __type = SCSI_WRITE_CMD;\
1000     __type;\
1001 })
1002
1003 #define IS_SCSI_READ_WRITE(opcode) \
1004 ({  u8 __type = SCSI_CMD_TYPE(opcode); \
1005     (__type == SCSI_READ_CMD || __type == SCSI_WRITE_CMD) ? 1 : 0;\
1006 })
1007
1008
1009 /*
1010  * pmcraid_ioctl_header - definition of header structure that precedes all the
1011  * buffers given as ioctl arguments.
1012  *
1013  * .signature           : always ASCII string, "PMCRAID"
1014  * .reserved            : not used
1015  * .buffer_length       : length of the buffer following the header
1016  */
1017 struct pmcraid_ioctl_header {
1018     u8  signature[8];
1019     u32 reserved;
1020     u32 buffer_length;
1021 };
1022
1023 #define PMCRAID_IOCTL_SIGNATURE      "PMCRAID"
1024
1025 /*
1026  * keys to differentiate between driver handled IOCTLs and passthrough
1027  * IOCTLs passed to IOA. driver determines the ioctl type using macro
1028  * _IOC_TYPE
1029  */
1030 #define PMCRAID_DRIVER_IOCTL         'D'
1031
1032 #define DRV_IOCTL(n, size) \
1033     _IOC(_IOC_READ|_IOC_WRITE, PMCRAID_DRIVER_IOCTL, (n), (size))
1034
1035 /*
1036  * _ARGSIZE: macro that gives size of the argument type passed to an IOCTL cmd.
1037  * This is to facilitate applications avoiding un-necessary memory allocations.
1038  * For example, most of driver handled ioctls do not require ioarcb, ioasa.
1039  */
1040 #define _ARGSIZE(arg) (sizeof(struct pmcraid_ioctl_header) + sizeof(arg))
1041
1042 /* Driver handled IOCTL command definitions */
1043
1044 #define PMCRAID_IOCTL_RESET_ADAPTER          \
1045     DRV_IOCTL(5, sizeof(struct pmcraid_ioctl_header))
1046
1047 #endif /* _PMCRAID_H */