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0001 /*
0002  * PMC-Sierra PM8001/8081/8088/8089 SAS/SATA based host adapters driver
0003  *
0004  * Copyright (c) 2008-2009 USI Co., Ltd.
0005  * All rights reserved.
0006  *
0007  * Redistribution and use in source and binary forms, with or without
0008  * modification, are permitted provided that the following conditions
0009  * are met:
0010  * 1. Redistributions of source code must retain the above copyright
0011  *    notice, this list of conditions, and the following disclaimer,
0012  *    without modification.
0013  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
0014  *    substantially similar to the "NO WARRANTY" disclaimer below
0015  *    ("Disclaimer") and any redistribution must be conditioned upon
0016  *    including a substantially similar Disclaimer requirement for further
0017  *    binary redistribution.
0018  * 3. Neither the names of the above-listed copyright holders nor the names
0019  *    of any contributors may be used to endorse or promote products derived
0020  *    from this software without specific prior written permission.
0021  *
0022  * Alternatively, this software may be distributed under the terms of the
0023  * GNU General Public License ("GPL") version 2 as published by the Free
0024  * Software Foundation.
0025  *
0026  * NO WARRANTY
0027  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
0028  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
0029  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
0030  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
0031  * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
0032  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
0033  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
0034  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
0035  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
0036  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0037  * POSSIBILITY OF SUCH DAMAGES.
0038  *
0039  */
0040 
0041 #ifndef _PM8001_SAS_H_
0042 #define _PM8001_SAS_H_
0043 
0044 #include <linux/kernel.h>
0045 #include <linux/module.h>
0046 #include <linux/spinlock.h>
0047 #include <linux/delay.h>
0048 #include <linux/types.h>
0049 #include <linux/ctype.h>
0050 #include <linux/dma-mapping.h>
0051 #include <linux/pci.h>
0052 #include <linux/interrupt.h>
0053 #include <linux/workqueue.h>
0054 #include <scsi/libsas.h>
0055 #include <scsi/scsi_tcq.h>
0056 #include <scsi/sas_ata.h>
0057 #include <linux/atomic.h>
0058 #include <linux/blk-mq.h>
0059 #include <linux/blk-mq-pci.h>
0060 #include "pm8001_defs.h"
0061 
0062 #define DRV_NAME        "pm80xx"
0063 #define DRV_VERSION     "0.1.40"
0064 #define PM8001_FAIL_LOGGING 0x01 /* Error message logging */
0065 #define PM8001_INIT_LOGGING 0x02 /* driver init logging */
0066 #define PM8001_DISC_LOGGING 0x04 /* discovery layer logging */
0067 #define PM8001_IO_LOGGING   0x08 /* I/O path logging */
0068 #define PM8001_EH_LOGGING   0x10 /* libsas EH function logging*/
0069 #define PM8001_IOCTL_LOGGING    0x20 /* IOCTL message logging */
0070 #define PM8001_MSG_LOGGING  0x40 /* misc message logging */
0071 #define PM8001_DEV_LOGGING  0x80 /* development message logging */
0072 #define PM8001_DEVIO_LOGGING    0x100 /* development io message logging */
0073 #define PM8001_IOERR_LOGGING    0x200 /* development io err message logging */
0074 
0075 #define pm8001_info(HBA, fmt, ...)                  \
0076     pr_info("%s:: %s %d: " fmt,                 \
0077         (HBA)->name, __func__, __LINE__, ##__VA_ARGS__)
0078 
0079 #define pm8001_dbg(HBA, level, fmt, ...)                \
0080 do {                                    \
0081     if (unlikely((HBA)->logging_level & PM8001_##level##_LOGGING))  \
0082         pm8001_info(HBA, fmt, ##__VA_ARGS__);           \
0083 } while (0)
0084 
0085 #define PM8001_USE_TASKLET
0086 #define PM8001_USE_MSIX
0087 #define PM8001_READ_VPD
0088 
0089 
0090 #define IS_SPCV_12G(dev)    ((dev->device == 0X8074)        \
0091                 || (dev->device == 0X8076)      \
0092                 || (dev->device == 0X8077)      \
0093                 || (dev->device == 0X8070)      \
0094                 || (dev->device == 0X8072))
0095 
0096 #define PM8001_NAME_LENGTH      32/* generic length of strings */
0097 extern struct list_head hba_list;
0098 extern const struct pm8001_dispatch pm8001_8001_dispatch;
0099 extern const struct pm8001_dispatch pm8001_80xx_dispatch;
0100 
0101 struct pm8001_hba_info;
0102 struct pm8001_ccb_info;
0103 struct pm8001_device;
0104 
0105 struct pm8001_ioctl_payload {
0106     u32 signature;
0107     u16 major_function;
0108     u16 minor_function;
0109     u16 status;
0110     u16 offset;
0111     u16 id;
0112     u32 wr_length;
0113     u32 rd_length;
0114     u8  *func_specific;
0115 };
0116 
0117 #define MPI_FATAL_ERROR_TABLE_OFFSET_MASK 0xFFFFFF
0118 #define MPI_FATAL_ERROR_TABLE_SIZE(value) ((0xFF000000 & value) >> SHIFT24)
0119 #define MPI_FATAL_EDUMP_TABLE_LO_OFFSET            0x00     /* HNFBUFL */
0120 #define MPI_FATAL_EDUMP_TABLE_HI_OFFSET            0x04     /* HNFBUFH */
0121 #define MPI_FATAL_EDUMP_TABLE_LENGTH               0x08     /* HNFBLEN */
0122 #define MPI_FATAL_EDUMP_TABLE_HANDSHAKE            0x0C     /* FDDHSHK */
0123 #define MPI_FATAL_EDUMP_TABLE_STATUS               0x10     /* FDDTSTAT */
0124 #define MPI_FATAL_EDUMP_TABLE_ACCUM_LEN            0x14     /* ACCDDLEN */
0125 #define MPI_FATAL_EDUMP_TABLE_TOTAL_LEN        0x18     /* TOTALLEN */
0126 #define MPI_FATAL_EDUMP_TABLE_SIGNATURE        0x1C     /* SIGNITURE */
0127 #define MPI_FATAL_EDUMP_HANDSHAKE_RDY              0x1
0128 #define MPI_FATAL_EDUMP_HANDSHAKE_BUSY             0x0
0129 #define MPI_FATAL_EDUMP_TABLE_STAT_RSVD                 0x0
0130 #define MPI_FATAL_EDUMP_TABLE_STAT_DMA_FAILED           0x1
0131 #define MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_MORE_DATA 0x2
0132 #define MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_DONE      0x3
0133 #define TYPE_GSM_SPACE        1
0134 #define TYPE_QUEUE            2
0135 #define TYPE_FATAL            3
0136 #define TYPE_NON_FATAL        4
0137 #define TYPE_INBOUND          1
0138 #define TYPE_OUTBOUND         2
0139 struct forensic_data {
0140     u32  data_type;
0141     union {
0142         struct {
0143             u32  direct_len;
0144             u32  direct_offset;
0145             void  *direct_data;
0146         } gsm_buf;
0147         struct {
0148             u16  queue_type;
0149             u16  queue_index;
0150             u32  direct_len;
0151             void  *direct_data;
0152         } queue_buf;
0153         struct {
0154             u32  direct_len;
0155             u32  direct_offset;
0156             u32  read_len;
0157             void  *direct_data;
0158         } data_buf;
0159     };
0160 };
0161 
0162 /* bit31-26 - mask bar */
0163 #define SCRATCH_PAD0_BAR_MASK                    0xFC000000
0164 /* bit25-0  - offset mask */
0165 #define SCRATCH_PAD0_OFFSET_MASK                 0x03FFFFFF
0166 /* if AAP error state */
0167 #define SCRATCH_PAD0_AAPERR_MASK                 0xFFFFFFFF
0168 /* Inbound doorbell bit7 */
0169 #define SPCv_MSGU_CFG_TABLE_NONFATAL_DUMP    0x80
0170 /* Inbound doorbell bit7 SPCV */
0171 #define SPCV_MSGU_CFG_TABLE_TRANSFER_DEBUG_INFO  0x80
0172 #define MAIN_MERRDCTO_MERRDCES               0xA0/* DWORD 0x28) */
0173 
0174 struct pm8001_dispatch {
0175     char *name;
0176     int (*chip_init)(struct pm8001_hba_info *pm8001_ha);
0177     void (*chip_post_init)(struct pm8001_hba_info *pm8001_ha);
0178     int (*chip_soft_rst)(struct pm8001_hba_info *pm8001_ha);
0179     void (*chip_rst)(struct pm8001_hba_info *pm8001_ha);
0180     int (*chip_ioremap)(struct pm8001_hba_info *pm8001_ha);
0181     void (*chip_iounmap)(struct pm8001_hba_info *pm8001_ha);
0182     irqreturn_t (*isr)(struct pm8001_hba_info *pm8001_ha, u8 vec);
0183     u32 (*is_our_interrupt)(struct pm8001_hba_info *pm8001_ha);
0184     int (*isr_process_oq)(struct pm8001_hba_info *pm8001_ha, u8 vec);
0185     void (*interrupt_enable)(struct pm8001_hba_info *pm8001_ha, u8 vec);
0186     void (*interrupt_disable)(struct pm8001_hba_info *pm8001_ha, u8 vec);
0187     void (*make_prd)(struct scatterlist *scatter, int nr, void *prd);
0188     int (*smp_req)(struct pm8001_hba_info *pm8001_ha,
0189         struct pm8001_ccb_info *ccb);
0190     int (*ssp_io_req)(struct pm8001_hba_info *pm8001_ha,
0191         struct pm8001_ccb_info *ccb);
0192     int (*sata_req)(struct pm8001_hba_info *pm8001_ha,
0193         struct pm8001_ccb_info *ccb);
0194     int (*phy_start_req)(struct pm8001_hba_info *pm8001_ha, u8 phy_id);
0195     int (*phy_stop_req)(struct pm8001_hba_info *pm8001_ha, u8 phy_id);
0196     int (*reg_dev_req)(struct pm8001_hba_info *pm8001_ha,
0197         struct pm8001_device *pm8001_dev, u32 flag);
0198     int (*dereg_dev_req)(struct pm8001_hba_info *pm8001_ha, u32 device_id);
0199     int (*phy_ctl_req)(struct pm8001_hba_info *pm8001_ha,
0200         u32 phy_id, u32 phy_op);
0201     int (*task_abort)(struct pm8001_hba_info *pm8001_ha,
0202         struct pm8001_ccb_info *ccb);
0203     int (*ssp_tm_req)(struct pm8001_hba_info *pm8001_ha,
0204         struct pm8001_ccb_info *ccb, struct sas_tmf_task *tmf);
0205     int (*get_nvmd_req)(struct pm8001_hba_info *pm8001_ha, void *payload);
0206     int (*set_nvmd_req)(struct pm8001_hba_info *pm8001_ha, void *payload);
0207     int (*fw_flash_update_req)(struct pm8001_hba_info *pm8001_ha,
0208         void *payload);
0209     int (*set_dev_state_req)(struct pm8001_hba_info *pm8001_ha,
0210         struct pm8001_device *pm8001_dev, u32 state);
0211     int (*sas_diag_start_end_req)(struct pm8001_hba_info *pm8001_ha,
0212         u32 state);
0213     int (*sas_diag_execute_req)(struct pm8001_hba_info *pm8001_ha,
0214         u32 state);
0215     int (*sas_re_init_req)(struct pm8001_hba_info *pm8001_ha);
0216     int (*fatal_errors)(struct pm8001_hba_info *pm8001_ha);
0217     void (*hw_event_ack_req)(struct pm8001_hba_info *pm8001_ha,
0218         u32 Qnum, u32 SEA, u32 port_id, u32 phyId, u32 param0,
0219         u32 param1);
0220 };
0221 
0222 struct pm8001_chip_info {
0223     u32     encrypt;
0224     u32 n_phy;
0225     const struct pm8001_dispatch    *dispatch;
0226 };
0227 #define PM8001_CHIP_DISP    (pm8001_ha->chip->dispatch)
0228 
0229 struct pm8001_port {
0230     struct asd_sas_port sas_port;
0231     u8          port_attached;
0232     u16         wide_port_phymap;
0233     u8          port_state;
0234     u8          port_id;
0235     struct list_head    list;
0236 };
0237 
0238 struct pm8001_phy {
0239     struct pm8001_hba_info  *pm8001_ha;
0240     struct pm8001_port  *port;
0241     struct asd_sas_phy  sas_phy;
0242     struct sas_identify identify;
0243     struct scsi_device  *sdev;
0244     u64         dev_sas_addr;
0245     u32         phy_type;
0246     struct completion   *enable_completion;
0247     u32         frame_rcvd_size;
0248     u8          frame_rcvd[32];
0249     u8          phy_attached;
0250     u8          phy_state;
0251     enum sas_linkrate   minimum_linkrate;
0252     enum sas_linkrate   maximum_linkrate;
0253     struct completion   *reset_completion;
0254     bool            port_reset_status;
0255     bool            reset_success;
0256 };
0257 
0258 /* port reset status */
0259 #define PORT_RESET_SUCCESS  0x00
0260 #define PORT_RESET_TMO      0x01
0261 
0262 struct pm8001_device {
0263     enum sas_device_type    dev_type;
0264     struct domain_device    *sas_device;
0265     u32         attached_phy;
0266     u32         id;
0267     struct completion   *dcompletion;
0268     struct completion   *setds_completion;
0269     u32         device_id;
0270     atomic_t        running_req;
0271 };
0272 
0273 struct pm8001_prd_imt {
0274     __le32          len;
0275     __le32          e;
0276 };
0277 
0278 struct pm8001_prd {
0279     __le64          addr;       /* 64-bit buffer address */
0280     struct pm8001_prd_imt   im_len;     /* 64-bit length */
0281 } __attribute__ ((packed));
0282 /*
0283  * CCB(Command Control Block)
0284  */
0285 struct pm8001_ccb_info {
0286     struct sas_task     *task;
0287     u32         n_elem;
0288     u32         ccb_tag;
0289     dma_addr_t      ccb_dma_handle;
0290     struct pm8001_device    *device;
0291     struct pm8001_prd   *buf_prd;
0292     struct fw_control_ex    *fw_control_context;
0293     u8          open_retry;
0294 };
0295 
0296 struct mpi_mem {
0297     void            *virt_ptr;
0298     dma_addr_t      phys_addr;
0299     u32         phys_addr_hi;
0300     u32         phys_addr_lo;
0301     u32         total_len;
0302     u32         num_elements;
0303     u32         element_size;
0304     u32         alignment;
0305 };
0306 
0307 struct mpi_mem_req {
0308     /* The number of element in the  mpiMemory array */
0309     u32         count;
0310     /* The array of structures that define memroy regions*/
0311     struct mpi_mem      region[USI_MAX_MEMCNT];
0312 };
0313 
0314 struct encrypt {
0315     u32 cipher_mode;
0316     u32 sec_mode;
0317     u32 status;
0318     u32 flag;
0319 };
0320 
0321 struct sas_phy_attribute_table {
0322     u32 phystart1_16[16];
0323     u32 outbound_hw_event_pid1_16[16];
0324 };
0325 
0326 union main_cfg_table {
0327     struct {
0328     u32         signature;
0329     u32         interface_rev;
0330     u32         firmware_rev;
0331     u32         max_out_io;
0332     u32         max_sgl;
0333     u32         ctrl_cap_flag;
0334     u32         gst_offset;
0335     u32         inbound_queue_offset;
0336     u32         outbound_queue_offset;
0337     u32         inbound_q_nppd_hppd;
0338     u32         outbound_hw_event_pid0_3;
0339     u32         outbound_hw_event_pid4_7;
0340     u32         outbound_ncq_event_pid0_3;
0341     u32         outbound_ncq_event_pid4_7;
0342     u32         outbound_tgt_ITNexus_event_pid0_3;
0343     u32         outbound_tgt_ITNexus_event_pid4_7;
0344     u32         outbound_tgt_ssp_event_pid0_3;
0345     u32         outbound_tgt_ssp_event_pid4_7;
0346     u32         outbound_tgt_smp_event_pid0_3;
0347     u32         outbound_tgt_smp_event_pid4_7;
0348     u32         upper_event_log_addr;
0349     u32         lower_event_log_addr;
0350     u32         event_log_size;
0351     u32         event_log_option;
0352     u32         upper_iop_event_log_addr;
0353     u32         lower_iop_event_log_addr;
0354     u32         iop_event_log_size;
0355     u32         iop_event_log_option;
0356     u32         fatal_err_interrupt;
0357     u32         fatal_err_dump_offset0;
0358     u32         fatal_err_dump_length0;
0359     u32         fatal_err_dump_offset1;
0360     u32         fatal_err_dump_length1;
0361     u32         hda_mode_flag;
0362     u32         anolog_setup_table_offset;
0363     u32         rsvd[4];
0364     } pm8001_tbl;
0365 
0366     struct {
0367     u32         signature;
0368     u32         interface_rev;
0369     u32         firmware_rev;
0370     u32         max_out_io;
0371     u32         max_sgl;
0372     u32         ctrl_cap_flag;
0373     u32         gst_offset;
0374     u32         inbound_queue_offset;
0375     u32         outbound_queue_offset;
0376     u32         inbound_q_nppd_hppd;
0377     u32         rsvd[8];
0378     u32         crc_core_dump;
0379     u32         rsvd1;
0380     u32         upper_event_log_addr;
0381     u32         lower_event_log_addr;
0382     u32         event_log_size;
0383     u32         event_log_severity;
0384     u32         upper_pcs_event_log_addr;
0385     u32         lower_pcs_event_log_addr;
0386     u32         pcs_event_log_size;
0387     u32         pcs_event_log_severity;
0388     u32         fatal_err_interrupt;
0389     u32         fatal_err_dump_offset0;
0390     u32         fatal_err_dump_length0;
0391     u32         fatal_err_dump_offset1;
0392     u32         fatal_err_dump_length1;
0393     u32         gpio_led_mapping;
0394     u32         analog_setup_table_offset;
0395     u32         int_vec_table_offset;
0396     u32         phy_attr_table_offset;
0397     u32         port_recovery_timer;
0398     u32         interrupt_reassertion_delay;
0399     u32         fatal_n_non_fatal_dump;         /* 0x28 */
0400     u32         ila_version;
0401     u32         inc_fw_version;
0402     } pm80xx_tbl;
0403 };
0404 
0405 union general_status_table {
0406     struct {
0407     u32         gst_len_mpistate;
0408     u32         iq_freeze_state0;
0409     u32         iq_freeze_state1;
0410     u32         msgu_tcnt;
0411     u32         iop_tcnt;
0412     u32         rsvd;
0413     u32         phy_state[8];
0414     u32         gpio_input_val;
0415     u32         rsvd1[2];
0416     u32         recover_err_info[8];
0417     } pm8001_tbl;
0418     struct {
0419     u32         gst_len_mpistate;
0420     u32         iq_freeze_state0;
0421     u32         iq_freeze_state1;
0422     u32         msgu_tcnt;
0423     u32         iop_tcnt;
0424     u32         rsvd[9];
0425     u32         gpio_input_val;
0426     u32         rsvd1[2];
0427     u32         recover_err_info[8];
0428     } pm80xx_tbl;
0429 };
0430 struct inbound_queue_table {
0431     u32         element_pri_size_cnt;
0432     u32         upper_base_addr;
0433     u32         lower_base_addr;
0434     u32         ci_upper_base_addr;
0435     u32         ci_lower_base_addr;
0436     u32         pi_pci_bar;
0437     u32         pi_offset;
0438     u32         total_length;
0439     void            *base_virt;
0440     void            *ci_virt;
0441     u32         reserved;
0442     __le32          consumer_index;
0443     u32         producer_idx;
0444     spinlock_t      iq_lock;
0445 };
0446 struct outbound_queue_table {
0447     u32         element_size_cnt;
0448     u32         upper_base_addr;
0449     u32         lower_base_addr;
0450     void            *base_virt;
0451     u32         pi_upper_base_addr;
0452     u32         pi_lower_base_addr;
0453     u32         ci_pci_bar;
0454     u32         ci_offset;
0455     u32         total_length;
0456     void            *pi_virt;
0457     u32         interrup_vec_cnt_delay;
0458     u32         dinterrup_to_pci_offset;
0459     __le32          producer_index;
0460     u32         consumer_idx;
0461     spinlock_t      oq_lock;
0462     unsigned long       lock_flags;
0463 };
0464 struct pm8001_hba_memspace {
0465     void __iomem        *memvirtaddr;
0466     u64         membase;
0467     u32         memsize;
0468 };
0469 struct isr_param {
0470     struct pm8001_hba_info *drv_inst;
0471     u32 irq_id;
0472 };
0473 struct pm8001_hba_info {
0474     char            name[PM8001_NAME_LENGTH];
0475     struct list_head    list;
0476     unsigned long       flags;
0477     spinlock_t      lock;/* host-wide lock */
0478     spinlock_t      bitmap_lock;
0479     struct pci_dev      *pdev;/* our device */
0480     struct device       *dev;
0481     struct pm8001_hba_memspace io_mem[6];
0482     struct mpi_mem_req  memoryMap;
0483     struct encrypt      encrypt_info; /* support encryption */
0484     struct forensic_data    forensic_info;
0485     u32         fatal_bar_loc;
0486     u32         forensic_last_offset;
0487     u32         fatal_forensic_shift_offset;
0488     u32         forensic_fatal_step;
0489     u32         forensic_preserved_accumulated_transfer;
0490     u32         evtlog_ib_offset;
0491     u32         evtlog_ob_offset;
0492     void __iomem    *msg_unit_tbl_addr;/*Message Unit Table Addr*/
0493     void __iomem    *main_cfg_tbl_addr;/*Main Config Table Addr*/
0494     void __iomem    *general_stat_tbl_addr;/*General Status Table Addr*/
0495     void __iomem    *inbnd_q_tbl_addr;/*Inbound Queue Config Table Addr*/
0496     void __iomem    *outbnd_q_tbl_addr;/*Outbound Queue Config Table Addr*/
0497     void __iomem    *pspa_q_tbl_addr;
0498             /*MPI SAS PHY attributes Queue Config Table Addr*/
0499     void __iomem    *ivt_tbl_addr; /*MPI IVT Table Addr */
0500     void __iomem    *fatal_tbl_addr; /*MPI IVT Table Addr */
0501     union main_cfg_table    main_cfg_tbl;
0502     union general_status_table  gs_tbl;
0503     struct inbound_queue_table  inbnd_q_tbl[PM8001_MAX_INB_NUM];
0504     struct outbound_queue_table outbnd_q_tbl[PM8001_MAX_OUTB_NUM];
0505     struct sas_phy_attribute_table  phy_attr_table;
0506                     /* MPI SAS PHY attributes */
0507     u8          sas_addr[SAS_ADDR_SIZE];
0508     struct sas_ha_struct    *sas;/* SCSI/SAS glue */
0509     struct Scsi_Host    *shost;
0510     u32         chip_id;
0511     const struct pm8001_chip_info   *chip;
0512     struct completion   *nvmd_completion;
0513     int         tags_num;
0514     unsigned long       *tags;
0515     struct pm8001_phy   phy[PM8001_MAX_PHYS];
0516     struct pm8001_port  port[PM8001_MAX_PHYS];
0517     u32         id;
0518     u32         irq;
0519     u32         iomb_size; /* SPC and SPCV IOMB size */
0520     struct pm8001_device    *devices;
0521     struct pm8001_ccb_info  *ccb_info;
0522     u32         ccb_count;
0523 #ifdef PM8001_USE_MSIX
0524     int         number_of_intr;/*will be used in remove()*/
0525     char            intr_drvname[PM8001_MAX_MSIX_VEC]
0526                 [PM8001_NAME_LENGTH+1+3+1];
0527 #endif
0528 #ifdef PM8001_USE_TASKLET
0529     struct tasklet_struct   tasklet[PM8001_MAX_MSIX_VEC];
0530 #endif
0531     u32         logging_level;
0532     u32         link_rate;
0533     u32         fw_status;
0534     u32         smp_exp_mode;
0535     bool            controller_fatal_error;
0536     const struct firmware   *fw_image;
0537     struct isr_param irq_vector[PM8001_MAX_MSIX_VEC];
0538     u32         reset_in_progress;
0539     u32         non_fatal_count;
0540     u32         non_fatal_read_length;
0541     u32 max_q_num;
0542     u32 ib_offset;
0543     u32 ob_offset;
0544     u32 ci_offset;
0545     u32 pi_offset;
0546     u32 max_memcnt;
0547 };
0548 
0549 struct pm8001_work {
0550     struct work_struct work;
0551     struct pm8001_hba_info *pm8001_ha;
0552     void *data;
0553     int handler;
0554 };
0555 
0556 struct pm8001_fw_image_header {
0557     u8 vender_id[8];
0558     u8 product_id;
0559     u8 hardware_rev;
0560     u8 dest_partition;
0561     u8 reserved;
0562     u8 fw_rev[4];
0563     __be32  image_length;
0564     __be32 image_crc;
0565     __be32 startup_entry;
0566 } __attribute__((packed, aligned(4)));
0567 
0568 
0569 /**
0570  * FW Flash Update status values
0571  */
0572 #define FLASH_UPDATE_COMPLETE_PENDING_REBOOT    0x00
0573 #define FLASH_UPDATE_IN_PROGRESS        0x01
0574 #define FLASH_UPDATE_HDR_ERR            0x02
0575 #define FLASH_UPDATE_OFFSET_ERR         0x03
0576 #define FLASH_UPDATE_CRC_ERR            0x04
0577 #define FLASH_UPDATE_LENGTH_ERR         0x05
0578 #define FLASH_UPDATE_HW_ERR         0x06
0579 #define FLASH_UPDATE_DNLD_NOT_SUPPORTED     0x10
0580 #define FLASH_UPDATE_DISABLED           0x11
0581 
0582 #define NCQ_READ_LOG_FLAG           0x80000000
0583 #define NCQ_ABORT_ALL_FLAG          0x40000000
0584 #define NCQ_2ND_RLE_FLAG            0x20000000
0585 
0586 /* Device states */
0587 #define DS_OPERATIONAL              0x01
0588 #define DS_PORT_IN_RESET            0x02
0589 #define DS_IN_RECOVERY              0x03
0590 #define DS_IN_ERROR             0x04
0591 #define DS_NON_OPERATIONAL          0x07
0592 
0593 /**
0594  * brief param structure for firmware flash update.
0595  */
0596 struct fw_flash_updata_info {
0597     u32         cur_image_offset;
0598     u32         cur_image_len;
0599     u32         total_image_len;
0600     struct pm8001_prd   sgl;
0601 };
0602 
0603 struct fw_control_info {
0604     u32         retcode;/*ret code (status)*/
0605     u32         phase;/*ret code phase*/
0606     u32         phaseCmplt;/*percent complete for the current
0607     update phase */
0608     u32         version;/*Hex encoded firmware version number*/
0609     u32         offset;/*Used for downloading firmware  */
0610     u32         len; /*len of buffer*/
0611     u32         size;/* Used in OS VPD and Trace get size
0612     operations.*/
0613     u32         reserved;/* padding required for 64 bit
0614     alignment */
0615     u8          buffer[1];/* Start of buffer */
0616 };
0617 struct fw_control_ex {
0618     struct fw_control_info *fw_control;
0619     void            *buffer;/* keep buffer pointer to be
0620     freed when the response comes*/
0621     void            *virtAddr;/* keep virtual address of the data */
0622     void            *usrAddr;/* keep virtual address of the
0623     user data */
0624     dma_addr_t      phys_addr;
0625     u32         len; /* len of buffer  */
0626     void            *payload; /* pointer to IOCTL Payload */
0627     u8          inProgress;/*if 1 - the IOCTL request is in
0628     progress */
0629     void            *param1;
0630     void            *param2;
0631     void            *param3;
0632 };
0633 
0634 /* pm8001 workqueue */
0635 extern struct workqueue_struct *pm8001_wq;
0636 
0637 /******************** function prototype *********************/
0638 int pm8001_tag_alloc(struct pm8001_hba_info *pm8001_ha, u32 *tag_out);
0639 void pm8001_tag_init(struct pm8001_hba_info *pm8001_ha);
0640 u32 pm8001_get_ncq_tag(struct sas_task *task, u32 *tag);
0641 void pm8001_ccb_task_free(struct pm8001_hba_info *pm8001_ha,
0642               struct pm8001_ccb_info *ccb);
0643 int pm8001_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func,
0644     void *funcdata);
0645 void pm8001_scan_start(struct Scsi_Host *shost);
0646 int pm8001_scan_finished(struct Scsi_Host *shost, unsigned long time);
0647 int pm8001_queue_command(struct sas_task *task, gfp_t gfp_flags);
0648 int pm8001_abort_task(struct sas_task *task);
0649 int pm8001_clear_task_set(struct domain_device *dev, u8 *lun);
0650 int pm8001_dev_found(struct domain_device *dev);
0651 void pm8001_dev_gone(struct domain_device *dev);
0652 int pm8001_lu_reset(struct domain_device *dev, u8 *lun);
0653 int pm8001_I_T_nexus_reset(struct domain_device *dev);
0654 int pm8001_I_T_nexus_event_handler(struct domain_device *dev);
0655 int pm8001_query_task(struct sas_task *task);
0656 void pm8001_port_formed(struct asd_sas_phy *sas_phy);
0657 void pm8001_open_reject_retry(
0658     struct pm8001_hba_info *pm8001_ha,
0659     struct sas_task *task_to_close,
0660     struct pm8001_device *device_to_close);
0661 int pm8001_mem_alloc(struct pci_dev *pdev, void **virt_addr,
0662     dma_addr_t *pphys_addr, u32 *pphys_addr_hi, u32 *pphys_addr_lo,
0663     u32 mem_size, u32 align);
0664 
0665 void pm8001_chip_iounmap(struct pm8001_hba_info *pm8001_ha);
0666 int pm8001_mpi_build_cmd(struct pm8001_hba_info *pm8001_ha,
0667             u32 q_index, u32 opCode, void *payload, size_t nb,
0668             u32 responseQueue);
0669 int pm8001_mpi_msg_free_get(struct inbound_queue_table *circularQ,
0670                 u16 messageSize, void **messagePtr);
0671 u32 pm8001_mpi_msg_free_set(struct pm8001_hba_info *pm8001_ha, void *pMsg,
0672             struct outbound_queue_table *circularQ, u8 bc);
0673 u32 pm8001_mpi_msg_consume(struct pm8001_hba_info *pm8001_ha,
0674             struct outbound_queue_table *circularQ,
0675             void **messagePtr1, u8 *pBC);
0676 int pm8001_chip_set_dev_state_req(struct pm8001_hba_info *pm8001_ha,
0677             struct pm8001_device *pm8001_dev, u32 state);
0678 int pm8001_chip_fw_flash_update_req(struct pm8001_hba_info *pm8001_ha,
0679                     void *payload);
0680 int pm8001_chip_fw_flash_update_build(struct pm8001_hba_info *pm8001_ha,
0681                     void *fw_flash_updata_info, u32 tag);
0682 int pm8001_chip_set_nvmd_req(struct pm8001_hba_info *pm8001_ha, void *payload);
0683 int pm8001_chip_get_nvmd_req(struct pm8001_hba_info *pm8001_ha, void *payload);
0684 int pm8001_chip_ssp_tm_req(struct pm8001_hba_info *pm8001_ha,
0685                 struct pm8001_ccb_info *ccb,
0686                 struct sas_tmf_task *tmf);
0687 int pm8001_chip_abort_task(struct pm8001_hba_info *pm8001_ha,
0688                 struct pm8001_ccb_info *ccb);
0689 int pm8001_chip_dereg_dev_req(struct pm8001_hba_info *pm8001_ha, u32 device_id);
0690 void pm8001_chip_make_sg(struct scatterlist *scatter, int nr, void *prd);
0691 void pm8001_work_fn(struct work_struct *work);
0692 int pm8001_handle_event(struct pm8001_hba_info *pm8001_ha,
0693                     void *data, int handler);
0694 void pm8001_mpi_set_dev_state_resp(struct pm8001_hba_info *pm8001_ha,
0695                             void *piomb);
0696 void pm8001_mpi_set_nvmd_resp(struct pm8001_hba_info *pm8001_ha,
0697                             void *piomb);
0698 void pm8001_mpi_get_nvmd_resp(struct pm8001_hba_info *pm8001_ha,
0699                             void *piomb);
0700 int pm8001_mpi_local_phy_ctl(struct pm8001_hba_info *pm8001_ha,
0701                             void *piomb);
0702 void pm8001_get_lrate_mode(struct pm8001_phy *phy, u8 link_rate);
0703 void pm8001_get_attached_sas_addr(struct pm8001_phy *phy, u8 *sas_addr);
0704 void pm8001_bytes_dmaed(struct pm8001_hba_info *pm8001_ha, int i);
0705 int pm8001_mpi_reg_resp(struct pm8001_hba_info *pm8001_ha, void *piomb);
0706 int pm8001_mpi_dereg_resp(struct pm8001_hba_info *pm8001_ha, void *piomb);
0707 int pm8001_mpi_fw_flash_update_resp(struct pm8001_hba_info *pm8001_ha,
0708                             void *piomb);
0709 int pm8001_mpi_general_event(struct pm8001_hba_info *pm8001_ha, void *piomb);
0710 int pm8001_mpi_task_abort_resp(struct pm8001_hba_info *pm8001_ha, void *piomb);
0711 struct sas_task *pm8001_alloc_task(void);
0712 void pm8001_task_done(struct sas_task *task);
0713 void pm8001_free_task(struct sas_task *task);
0714 void pm8001_tag_free(struct pm8001_hba_info *pm8001_ha, u32 tag);
0715 struct pm8001_device *pm8001_find_dev(struct pm8001_hba_info *pm8001_ha,
0716                     u32 device_id);
0717 int pm80xx_set_thermal_config(struct pm8001_hba_info *pm8001_ha);
0718 
0719 int pm8001_bar4_shift(struct pm8001_hba_info *pm8001_ha, u32 shiftValue);
0720 void pm8001_set_phy_profile(struct pm8001_hba_info *pm8001_ha,
0721     u32 length, u8 *buf);
0722 void pm8001_set_phy_profile_single(struct pm8001_hba_info *pm8001_ha,
0723         u32 phy, u32 length, u32 *buf);
0724 int pm80xx_bar4_shift(struct pm8001_hba_info *pm8001_ha, u32 shiftValue);
0725 ssize_t pm80xx_get_fatal_dump(struct device *cdev,
0726         struct device_attribute *attr, char *buf);
0727 ssize_t pm80xx_get_non_fatal_dump(struct device *cdev,
0728         struct device_attribute *attr, char *buf);
0729 ssize_t pm8001_get_gsm_dump(struct device *cdev, u32, char *buf);
0730 int pm80xx_fatal_errors(struct pm8001_hba_info *pm8001_ha);
0731 void pm8001_free_dev(struct pm8001_device *pm8001_dev);
0732 /* ctl shared API */
0733 extern const struct attribute_group *pm8001_host_groups[];
0734 
0735 #define PM8001_INVALID_TAG  ((u32)-1)
0736 
0737 /*
0738  * Allocate a new tag and return the corresponding ccb after initializing it.
0739  */
0740 static inline struct pm8001_ccb_info *
0741 pm8001_ccb_alloc(struct pm8001_hba_info *pm8001_ha,
0742          struct pm8001_device *dev, struct sas_task *task)
0743 {
0744     struct pm8001_ccb_info *ccb;
0745     u32 tag;
0746 
0747     if (pm8001_tag_alloc(pm8001_ha, &tag)) {
0748         pm8001_dbg(pm8001_ha, FAIL, "Failed to allocate a tag\n");
0749         return NULL;
0750     }
0751 
0752     ccb = &pm8001_ha->ccb_info[tag];
0753     ccb->task = task;
0754     ccb->n_elem = 0;
0755     ccb->ccb_tag = tag;
0756     ccb->device = dev;
0757     ccb->fw_control_context = NULL;
0758     ccb->open_retry = 0;
0759 
0760     return ccb;
0761 }
0762 
0763 /*
0764  * Free the tag of an initialized ccb.
0765  */
0766 static inline void pm8001_ccb_free(struct pm8001_hba_info *pm8001_ha,
0767                    struct pm8001_ccb_info *ccb)
0768 {
0769     u32 tag = ccb->ccb_tag;
0770 
0771     /*
0772      * Cleanup the ccb to make sure that a manual scan of the adapter
0773      * ccb_info array can detect ccb's that are in use.
0774      * C.f. pm8001_open_reject_retry()
0775      */
0776     ccb->task = NULL;
0777     ccb->ccb_tag = PM8001_INVALID_TAG;
0778     ccb->device = NULL;
0779     ccb->fw_control_context = NULL;
0780 
0781     pm8001_tag_free(pm8001_ha, tag);
0782 }
0783 
0784 static inline void pm8001_ccb_task_free_done(struct pm8001_hba_info *pm8001_ha,
0785                          struct pm8001_ccb_info *ccb)
0786 {
0787     struct sas_task *task = ccb->task;
0788 
0789     pm8001_ccb_task_free(pm8001_ha, ccb);
0790     smp_mb(); /*in order to force CPU ordering*/
0791     task->task_done(task);
0792 }
0793 void pm8001_setds_completion(struct domain_device *dev);
0794 void pm8001_tmf_aborted(struct sas_task *task);
0795 
0796 #endif
0797
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