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0001 /* 0002 * PMC-Sierra SPC 8001 SAS/SATA based host adapters driver 0003 * 0004 * Copyright (c) 2008-2009 USI Co., Ltd. 0005 * All rights reserved. 0006 * 0007 * Redistribution and use in source and binary forms, with or without 0008 * modification, are permitted provided that the following conditions 0009 * are met: 0010 * 1. Redistributions of source code must retain the above copyright 0011 * notice, this list of conditions, and the following disclaimer, 0012 * without modification. 0013 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 0014 * substantially similar to the "NO WARRANTY" disclaimer below 0015 * ("Disclaimer") and any redistribution must be conditioned upon 0016 * including a substantially similar Disclaimer requirement for further 0017 * binary redistribution. 0018 * 3. Neither the names of the above-listed copyright holders nor the names 0019 * of any contributors may be used to endorse or promote products derived 0020 * from this software without specific prior written permission. 0021 * 0022 * Alternatively, this software may be distributed under the terms of the 0023 * GNU General Public License ("GPL") version 2 as published by the Free 0024 * Software Foundation. 0025 * 0026 * NO WARRANTY 0027 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 0028 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 0029 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR 0030 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 0031 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 0032 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 0033 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 0034 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 0035 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 0036 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 0037 * POSSIBILITY OF SUCH DAMAGES. 0038 * 0039 */ 0040 0041 #ifndef _PM8001_CHIPS_H_ 0042 #define _PM8001_CHIPS_H_ 0043 0044 static inline u32 pm8001_read_32(void *virt_addr) 0045 { 0046 return *((u32 *)virt_addr); 0047 } 0048 0049 static inline void pm8001_write_32(void *addr, u32 offset, __le32 val) 0050 { 0051 *((__le32 *)(addr + offset)) = val; 0052 } 0053 0054 static inline u32 pm8001_cr32(struct pm8001_hba_info *pm8001_ha, u32 bar, 0055 u32 offset) 0056 { 0057 return readl(pm8001_ha->io_mem[bar].memvirtaddr + offset); 0058 } 0059 0060 static inline void pm8001_cw32(struct pm8001_hba_info *pm8001_ha, u32 bar, 0061 u32 addr, u32 val) 0062 { 0063 writel(val, pm8001_ha->io_mem[bar].memvirtaddr + addr); 0064 } 0065 static inline u32 pm8001_mr32(void __iomem *addr, u32 offset) 0066 { 0067 return readl(addr + offset); 0068 } 0069 static inline void pm8001_mw32(void __iomem *addr, u32 offset, u32 val) 0070 { 0071 writel(val, addr + offset); 0072 } 0073 static inline u32 get_pci_bar_index(u32 pcibar) 0074 { 0075 switch (pcibar) { 0076 case 0x18: 0077 case 0x1C: 0078 return 1; 0079 case 0x20: 0080 return 2; 0081 case 0x24: 0082 return 3; 0083 default: 0084 return 0; 0085 } 0086 } 0087 0088 #endif /* _PM8001_CHIPS_H_ */ 0089
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