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0001 /*
0002   NinjaSCSI I/O funtions 
0003       By: YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>
0004  
0005   This software may be used and distributed according to the terms of
0006   the GNU General Public License.
0007 
0008   */
0009 
0010 /* $Id: nsp_io.h,v 1.3 2003/08/04 21:15:26 elca Exp $ */
0011 
0012 #ifndef __NSP_IO_H__
0013 #define __NSP_IO_H__
0014 
0015 static inline          void nsp_write(unsigned int base,
0016                       unsigned int index,
0017                       unsigned char val);
0018 static inline unsigned char nsp_read(unsigned int base,
0019                      unsigned int index);
0020 static inline          void nsp_index_write(unsigned int BaseAddr,
0021                         unsigned int Register,
0022                         unsigned char Value);
0023 static inline unsigned char nsp_index_read(unsigned int BaseAddr,
0024                        unsigned int Register);
0025 
0026 /*******************************************************************
0027  * Basic IO
0028  */
0029 
0030 static inline void nsp_write(unsigned int  base,
0031                  unsigned int  index,
0032                  unsigned char val)
0033 {
0034     outb(val, (base + index));
0035 }
0036 
0037 static inline unsigned char nsp_read(unsigned int base,
0038                      unsigned int index)
0039 {
0040     return inb(base + index);
0041 }
0042 
0043 
0044 /**********************************************************************
0045  * Indexed IO
0046  */
0047 static inline unsigned char nsp_index_read(unsigned int BaseAddr,
0048                        unsigned int Register)
0049 {
0050     outb(Register, BaseAddr + INDEXREG);
0051     return inb(BaseAddr + DATAREG);
0052 }
0053 
0054 static inline void nsp_index_write(unsigned int  BaseAddr,
0055                    unsigned int  Register,
0056                    unsigned char Value)
0057 {
0058     outb(Register, BaseAddr + INDEXREG);
0059     outb(Value, BaseAddr + DATAREG);
0060 }
0061 
0062 /*********************************************************************
0063  * fifo func
0064  */
0065 
0066 /* read 8 bit FIFO */
0067 static inline void nsp_multi_read_1(unsigned int   BaseAddr,
0068                     unsigned int   Register,
0069                     void          *buf,
0070                     unsigned long  count)
0071 {
0072     insb(BaseAddr + Register, buf, count);
0073 }
0074 
0075 static inline void nsp_fifo8_read(unsigned int   base,
0076                   void          *buf,
0077                   unsigned long  count)
0078 {
0079     /*nsp_dbg(NSP_DEBUG_DATA_IO, "buf=0x%p, count=0x%lx", buf, count);*/
0080     nsp_multi_read_1(base, FIFODATA, buf, count);
0081 }
0082 
0083 /*--------------------------------------------------------------*/
0084 
0085 /* read 16 bit FIFO */
0086 static inline void nsp_multi_read_2(unsigned int   BaseAddr,
0087                     unsigned int   Register,
0088                     void          *buf,
0089                     unsigned long  count)
0090 {
0091     insw(BaseAddr + Register, buf, count);
0092 }
0093 
0094 static inline void nsp_fifo16_read(unsigned int   base,
0095                    void          *buf,
0096                    unsigned long  count)
0097 {
0098     //nsp_dbg(NSP_DEBUG_DATA_IO, "buf=0x%p, count=0x%lx*2", buf, count);
0099     nsp_multi_read_2(base, FIFODATA, buf, count);
0100 }
0101 
0102 /*--------------------------------------------------------------*/
0103 
0104 /* read 32bit FIFO */
0105 static inline void nsp_multi_read_4(unsigned int   BaseAddr,
0106                     unsigned int   Register,
0107                     void          *buf,
0108                     unsigned long  count)
0109 {
0110     insl(BaseAddr + Register, buf, count);
0111 }
0112 
0113 static inline void nsp_fifo32_read(unsigned int   base,
0114                    void          *buf,
0115                    unsigned long  count)
0116 {
0117     //nsp_dbg(NSP_DEBUG_DATA_IO, "buf=0x%p, count=0x%lx*4", buf, count);
0118     nsp_multi_read_4(base, FIFODATA, buf, count);
0119 }
0120 
0121 /*----------------------------------------------------------*/
0122 
0123 /* write 8bit FIFO */
0124 static inline void nsp_multi_write_1(unsigned int   BaseAddr,
0125                      unsigned int   Register,
0126                      void          *buf,
0127                      unsigned long  count)
0128 {
0129     outsb(BaseAddr + Register, buf, count);
0130 }
0131 
0132 static inline void nsp_fifo8_write(unsigned int   base,
0133                    void          *buf,
0134                    unsigned long  count)
0135 {
0136     nsp_multi_write_1(base, FIFODATA, buf, count);
0137 }
0138 
0139 /*---------------------------------------------------------*/
0140 
0141 /* write 16bit FIFO */
0142 static inline void nsp_multi_write_2(unsigned int   BaseAddr,
0143                      unsigned int   Register,
0144                      void          *buf,
0145                      unsigned long  count)
0146 {
0147     outsw(BaseAddr + Register, buf, count);
0148 }
0149 
0150 static inline void nsp_fifo16_write(unsigned int   base,
0151                     void          *buf,
0152                     unsigned long  count)
0153 {
0154     nsp_multi_write_2(base, FIFODATA, buf, count);
0155 }
0156 
0157 /*---------------------------------------------------------*/
0158 
0159 /* write 32bit FIFO */
0160 static inline void nsp_multi_write_4(unsigned int   BaseAddr,
0161                      unsigned int   Register,
0162                      void          *buf,
0163                      unsigned long  count)
0164 {
0165     outsl(BaseAddr + Register, buf, count);
0166 }
0167 
0168 static inline void nsp_fifo32_write(unsigned int   base,
0169                     void          *buf,
0170                     unsigned long  count)
0171 {
0172     nsp_multi_write_4(base, FIFODATA, buf, count);
0173 }
0174 
0175 
0176 /*====================================================================*/
0177 
0178 static inline void nsp_mmio_write(unsigned long base,
0179                   unsigned int  index,
0180                   unsigned char val)
0181 {
0182     unsigned char *ptr = (unsigned char *)(base + NSP_MMIO_OFFSET + index);
0183 
0184     writeb(val, ptr);
0185 }
0186 
0187 static inline unsigned char nsp_mmio_read(unsigned long base,
0188                       unsigned int  index)
0189 {
0190     unsigned char *ptr = (unsigned char *)(base + NSP_MMIO_OFFSET + index);
0191 
0192     return readb(ptr);
0193 }
0194 
0195 /*-----------*/
0196 
0197 static inline unsigned char nsp_mmio_index_read(unsigned long base,
0198                         unsigned int  reg)
0199 {
0200     unsigned char *index_ptr = (unsigned char *)(base + NSP_MMIO_OFFSET + INDEXREG);
0201     unsigned char *data_ptr  = (unsigned char *)(base + NSP_MMIO_OFFSET + DATAREG);
0202 
0203     writeb((unsigned char)reg, index_ptr);
0204     return readb(data_ptr);
0205 }
0206 
0207 static inline void nsp_mmio_index_write(unsigned long base,
0208                     unsigned int  reg,
0209                     unsigned char val)
0210 {
0211     unsigned char *index_ptr = (unsigned char *)(base + NSP_MMIO_OFFSET + INDEXREG);
0212     unsigned char *data_ptr  = (unsigned char *)(base + NSP_MMIO_OFFSET + DATAREG);
0213 
0214     writeb((unsigned char)reg, index_ptr);
0215     writeb(val,                data_ptr);
0216 }
0217 
0218 /* read 32bit FIFO */
0219 static inline void nsp_mmio_multi_read_4(unsigned long  base,
0220                      unsigned int   Register,
0221                      void          *buf,
0222                      unsigned long  count)
0223 {
0224     unsigned long *ptr = (unsigned long *)(base + Register);
0225     unsigned long *tmp = (unsigned long *)buf;
0226     int i;
0227 
0228     //nsp_dbg(NSP_DEBUG_DATA_IO, "base 0x%0lx ptr 0x%p",base,ptr);
0229 
0230     for (i = 0; i < count; i++) {
0231         *tmp = readl(ptr);
0232         //nsp_dbg(NSP_DEBUG_DATA_IO, "<%d,%p,%p,%lx>", i, ptr, tmp, *tmp);
0233         tmp++;
0234     }
0235 }
0236 
0237 static inline void nsp_mmio_fifo32_read(unsigned int   base,
0238                     void          *buf,
0239                     unsigned long  count)
0240 {
0241     //nsp_dbg(NSP_DEBUG_DATA_IO, "buf=0x%p, count=0x%lx*4", buf, count);
0242     nsp_mmio_multi_read_4(base, FIFODATA, buf, count);
0243 }
0244 
0245 static inline void nsp_mmio_multi_write_4(unsigned long  base,
0246                       unsigned int   Register,
0247                       void          *buf,
0248                       unsigned long  count)
0249 {
0250     unsigned long *ptr = (unsigned long *)(base + Register);
0251     unsigned long *tmp = (unsigned long *)buf;
0252     int i;
0253 
0254     //nsp_dbg(NSP_DEBUG_DATA_IO, "base 0x%0lx ptr 0x%p",base,ptr);
0255 
0256     for (i = 0; i < count; i++) {
0257         writel(*tmp, ptr);
0258         //nsp_dbg(NSP_DEBUG_DATA_IO, "<%d,%p,%p,%lx>", i, ptr, tmp, *tmp);
0259         tmp++;
0260     }
0261 }
0262 
0263 static inline void nsp_mmio_fifo32_write(unsigned int   base,
0264                      void          *buf,
0265                      unsigned long  count)
0266 {
0267     //nsp_dbg(NSP_DEBUG_DATA_IO, "buf=0x%p, count=0x%lx*4", buf, count);
0268     nsp_mmio_multi_write_4(base, FIFODATA, buf, count);
0269 }
0270 
0271 
0272 
0273 #endif
0274 /* end */
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