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0001 /*
0002  * This is the Fusion MPT base driver providing common API layer interface
0003  * for access to MPT (Message Passing Technology) firmware.
0004  *
0005  * This code is based on drivers/scsi/mpt3sas/mpt3sas_base.h
0006  * Copyright (C) 2012-2014  LSI Corporation
0007  * Copyright (C) 2013-2014 Avago Technologies
0008  *  (mailto: MPT-FusionLinux.pdl@avagotech.com)
0009  *
0010  * This program is free software; you can redistribute it and/or
0011  * modify it under the terms of the GNU General Public License
0012  * as published by the Free Software Foundation; either version 2
0013  * of the License, or (at your option) any later version.
0014  *
0015  * This program is distributed in the hope that it will be useful,
0016  * but WITHOUT ANY WARRANTY; without even the implied warranty of
0017  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
0018  * GNU General Public License for more details.
0019  *
0020  * NO WARRANTY
0021  * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
0022  * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
0023  * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
0024  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
0025  * solely responsible for determining the appropriateness of using and
0026  * distributing the Program and assumes all risks associated with its
0027  * exercise of rights under this Agreement, including but not limited to
0028  * the risks and costs of program errors, damage to or loss of data,
0029  * programs or equipment, and unavailability or interruption of operations.
0030 
0031  * DISCLAIMER OF LIABILITY
0032  * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
0033  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
0034  * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
0035  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
0036  * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
0037  * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
0038  * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
0039 
0040  * You should have received a copy of the GNU General Public License
0041  * along with this program; if not, write to the Free Software
0042  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301,
0043  * USA.
0044  */
0045 
0046 #ifndef MPT3SAS_BASE_H_INCLUDED
0047 #define MPT3SAS_BASE_H_INCLUDED
0048 
0049 #include "mpi/mpi2_type.h"
0050 #include "mpi/mpi2.h"
0051 #include "mpi/mpi2_ioc.h"
0052 #include "mpi/mpi2_cnfg.h"
0053 #include "mpi/mpi2_init.h"
0054 #include "mpi/mpi2_raid.h"
0055 #include "mpi/mpi2_tool.h"
0056 #include "mpi/mpi2_sas.h"
0057 #include "mpi/mpi2_pci.h"
0058 #include "mpi/mpi2_image.h"
0059 
0060 #include <scsi/scsi.h>
0061 #include <scsi/scsi_cmnd.h>
0062 #include <scsi/scsi_device.h>
0063 #include <scsi/scsi_host.h>
0064 #include <scsi/scsi_tcq.h>
0065 #include <scsi/scsi_transport_sas.h>
0066 #include <scsi/scsi_dbg.h>
0067 #include <scsi/scsi_eh.h>
0068 #include <linux/pci.h>
0069 #include <linux/poll.h>
0070 #include <linux/irq_poll.h>
0071 
0072 #include "mpt3sas_debug.h"
0073 #include "mpt3sas_trigger_diag.h"
0074 #include "mpt3sas_trigger_pages.h"
0075 
0076 /* driver versioning info */
0077 #define MPT3SAS_DRIVER_NAME     "mpt3sas"
0078 #define MPT3SAS_AUTHOR "Avago Technologies <MPT-FusionLinux.pdl@avagotech.com>"
0079 #define MPT3SAS_DESCRIPTION "LSI MPT Fusion SAS 3.0 Device Driver"
0080 #define MPT3SAS_DRIVER_VERSION      "42.100.00.00"
0081 #define MPT3SAS_MAJOR_VERSION       42
0082 #define MPT3SAS_MINOR_VERSION       100
0083 #define MPT3SAS_BUILD_VERSION       0
0084 #define MPT3SAS_RELEASE_VERSION 00
0085 
0086 #define MPT2SAS_DRIVER_NAME     "mpt2sas"
0087 #define MPT2SAS_DESCRIPTION "LSI MPT Fusion SAS 2.0 Device Driver"
0088 #define MPT2SAS_DRIVER_VERSION      "20.102.00.00"
0089 #define MPT2SAS_MAJOR_VERSION       20
0090 #define MPT2SAS_MINOR_VERSION       102
0091 #define MPT2SAS_BUILD_VERSION       0
0092 #define MPT2SAS_RELEASE_VERSION 00
0093 
0094 /* CoreDump: Default timeout */
0095 #define MPT3SAS_DEFAULT_COREDUMP_TIMEOUT_SECONDS    (15) /*15 seconds*/
0096 #define MPT3SAS_COREDUMP_LOOP_DONE                     (0xFF)
0097 #define MPT3SAS_TIMESYNC_TIMEOUT_SECONDS        (10) /* 10 seconds */
0098 #define MPT3SAS_TIMESYNC_UPDATE_INTERVAL        (900) /* 15 minutes */
0099 #define MPT3SAS_TIMESYNC_UNIT_MASK          (0x80) /* bit 7 */
0100 #define MPT3SAS_TIMESYNC_MASK               (0x7F) /* 0 - 6 bits */
0101 #define SECONDS_PER_MIN                 (60)
0102 #define SECONDS_PER_HOUR                (3600)
0103 #define MPT3SAS_COREDUMP_LOOP_DONE          (0xFF)
0104 #define MPI26_SET_IOC_PARAMETER_SYNC_TIMESTAMP      (0x81)
0105 
0106 /*
0107  * Set MPT3SAS_SG_DEPTH value based on user input.
0108  */
0109 #define MPT_MAX_PHYS_SEGMENTS   SG_CHUNK_SIZE
0110 #define MPT_MIN_PHYS_SEGMENTS   16
0111 #define MPT_KDUMP_MIN_PHYS_SEGMENTS 32
0112 
0113 #define MCPU_MAX_CHAINS_PER_IO  3
0114 
0115 #ifdef CONFIG_SCSI_MPT3SAS_MAX_SGE
0116 #define MPT3SAS_SG_DEPTH        CONFIG_SCSI_MPT3SAS_MAX_SGE
0117 #else
0118 #define MPT3SAS_SG_DEPTH        MPT_MAX_PHYS_SEGMENTS
0119 #endif
0120 
0121 #ifdef CONFIG_SCSI_MPT2SAS_MAX_SGE
0122 #define MPT2SAS_SG_DEPTH        CONFIG_SCSI_MPT2SAS_MAX_SGE
0123 #else
0124 #define MPT2SAS_SG_DEPTH        MPT_MAX_PHYS_SEGMENTS
0125 #endif
0126 
0127 /*
0128  * Generic Defines
0129  */
0130 #define MPT3SAS_SATA_QUEUE_DEPTH    32
0131 #define MPT3SAS_SAS_QUEUE_DEPTH     254
0132 #define MPT3SAS_RAID_QUEUE_DEPTH    128
0133 #define MPT3SAS_KDUMP_SCSI_IO_DEPTH 200
0134 
0135 #define MPT3SAS_RAID_MAX_SECTORS    8192
0136 #define MPT3SAS_HOST_PAGE_SIZE_4K   12
0137 #define MPT3SAS_NVME_QUEUE_DEPTH    128
0138 #define MPT_NAME_LENGTH         32  /* generic length of strings */
0139 #define MPT_STRING_LENGTH       64
0140 #define MPI_FRAME_START_OFFSET      256
0141 #define REPLY_FREE_POOL_SIZE        512 /*(32 maxcredix *4)*(4 times)*/
0142 
0143 #define MPT_MAX_CALLBACKS       32
0144 
0145 #define MPT_MAX_HBA_NUM_PHYS        32
0146 
0147 #define INTERNAL_CMDS_COUNT     10  /* reserved cmds */
0148 /* reserved for issuing internally framed scsi io cmds */
0149 #define INTERNAL_SCSIIO_CMDS_COUNT  3
0150 
0151 #define MPI3_HIM_MASK           0xFFFFFFFF /* mask every bit*/
0152 
0153 #define MPT3SAS_INVALID_DEVICE_HANDLE   0xFFFF
0154 
0155 #define MAX_CHAIN_ELEMT_SZ      16
0156 #define DEFAULT_NUM_FWCHAIN_ELEMTS  8
0157 
0158 #define IO_UNIT_CONTROL_SHUTDOWN_TIMEOUT 6
0159 #define FW_IMG_HDR_READ_TIMEOUT 15
0160 
0161 #define IOC_OPERATIONAL_WAIT_COUNT  10
0162 
0163 /*
0164  * NVMe defines
0165  */
0166 #define NVME_PRP_SIZE           8   /* PRP size */
0167 #define NVME_ERROR_RESPONSE_SIZE    16  /* Max NVME Error Response */
0168 #define NVME_TASK_ABORT_MIN_TIMEOUT 6
0169 #define NVME_TASK_ABORT_MAX_TIMEOUT 60
0170 #define NVME_TASK_MNGT_CUSTOM_MASK  (0x0010)
0171 #define NVME_PRP_PAGE_SIZE      4096    /* Page size */
0172 
0173 struct mpt3sas_nvme_cmd {
0174     u8  rsvd[24];
0175     __le64  prp1;
0176     __le64  prp2;
0177 };
0178 
0179 /*
0180  * logging format
0181  */
0182 #define ioc_err(ioc, fmt, ...)                      \
0183     pr_err("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
0184 #define ioc_notice(ioc, fmt, ...)                   \
0185     pr_notice("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
0186 #define ioc_warn(ioc, fmt, ...)                     \
0187     pr_warn("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
0188 #define ioc_info(ioc, fmt, ...)                     \
0189     pr_info("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
0190 
0191 /*
0192  *  WarpDrive Specific Log codes
0193  */
0194 
0195 #define MPT2_WARPDRIVE_LOGENTRY     (0x8002)
0196 #define MPT2_WARPDRIVE_LC_SSDT          (0x41)
0197 #define MPT2_WARPDRIVE_LC_SSDLW     (0x43)
0198 #define MPT2_WARPDRIVE_LC_SSDLF     (0x44)
0199 #define MPT2_WARPDRIVE_LC_BRMF          (0x4D)
0200 
0201 /*
0202  * per target private data
0203  */
0204 #define MPT_TARGET_FLAGS_RAID_COMPONENT 0x01
0205 #define MPT_TARGET_FLAGS_VOLUME     0x02
0206 #define MPT_TARGET_FLAGS_DELETED    0x04
0207 #define MPT_TARGET_FASTPATH_IO      0x08
0208 #define MPT_TARGET_FLAGS_PCIE_DEVICE    0x10
0209 
0210 #define SAS2_PCI_DEVICE_B0_REVISION (0x01)
0211 #define SAS3_PCI_DEVICE_C0_REVISION (0x02)
0212 
0213 /* Atlas PCIe Switch Management Port */
0214 #define MPI26_ATLAS_PCIe_SWITCH_DEVID   (0x00B2)
0215 
0216 /*
0217  * Intel HBA branding
0218  */
0219 #define MPT2SAS_INTEL_RMS25JB080_BRANDING    \
0220     "Intel(R) Integrated RAID Module RMS25JB080"
0221 #define MPT2SAS_INTEL_RMS25JB040_BRANDING    \
0222     "Intel(R) Integrated RAID Module RMS25JB040"
0223 #define MPT2SAS_INTEL_RMS25KB080_BRANDING    \
0224     "Intel(R) Integrated RAID Module RMS25KB080"
0225 #define MPT2SAS_INTEL_RMS25KB040_BRANDING    \
0226     "Intel(R) Integrated RAID Module RMS25KB040"
0227 #define MPT2SAS_INTEL_RMS25LB040_BRANDING   \
0228     "Intel(R) Integrated RAID Module RMS25LB040"
0229 #define MPT2SAS_INTEL_RMS25LB080_BRANDING   \
0230     "Intel(R) Integrated RAID Module RMS25LB080"
0231 #define MPT2SAS_INTEL_RMS2LL080_BRANDING    \
0232     "Intel Integrated RAID Module RMS2LL080"
0233 #define MPT2SAS_INTEL_RMS2LL040_BRANDING    \
0234     "Intel Integrated RAID Module RMS2LL040"
0235 #define MPT2SAS_INTEL_RS25GB008_BRANDING       \
0236     "Intel(R) RAID Controller RS25GB008"
0237 #define MPT2SAS_INTEL_SSD910_BRANDING          \
0238     "Intel(R) SSD 910 Series"
0239 
0240 #define MPT3SAS_INTEL_RMS3JC080_BRANDING       \
0241     "Intel(R) Integrated RAID Module RMS3JC080"
0242 #define MPT3SAS_INTEL_RS3GC008_BRANDING       \
0243     "Intel(R) RAID Controller RS3GC008"
0244 #define MPT3SAS_INTEL_RS3FC044_BRANDING       \
0245     "Intel(R) RAID Controller RS3FC044"
0246 #define MPT3SAS_INTEL_RS3UC080_BRANDING       \
0247     "Intel(R) RAID Controller RS3UC080"
0248 
0249 /*
0250  * Intel HBA SSDIDs
0251  */
0252 #define MPT2SAS_INTEL_RMS25JB080_SSDID      0x3516
0253 #define MPT2SAS_INTEL_RMS25JB040_SSDID      0x3517
0254 #define MPT2SAS_INTEL_RMS25KB080_SSDID      0x3518
0255 #define MPT2SAS_INTEL_RMS25KB040_SSDID      0x3519
0256 #define MPT2SAS_INTEL_RMS25LB040_SSDID      0x351A
0257 #define MPT2SAS_INTEL_RMS25LB080_SSDID      0x351B
0258 #define MPT2SAS_INTEL_RMS2LL080_SSDID       0x350E
0259 #define MPT2SAS_INTEL_RMS2LL040_SSDID       0x350F
0260 #define MPT2SAS_INTEL_RS25GB008_SSDID       0x3000
0261 #define MPT2SAS_INTEL_SSD910_SSDID      0x3700
0262 
0263 #define MPT3SAS_INTEL_RMS3JC080_SSDID       0x3521
0264 #define MPT3SAS_INTEL_RS3GC008_SSDID        0x3522
0265 #define MPT3SAS_INTEL_RS3FC044_SSDID        0x3523
0266 #define MPT3SAS_INTEL_RS3UC080_SSDID        0x3524
0267 
0268 /*
0269  * Dell HBA branding
0270  */
0271 #define MPT2SAS_DELL_BRANDING_SIZE                 32
0272 
0273 #define MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING        "Dell 6Gbps SAS HBA"
0274 #define MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING    "Dell PERC H200 Adapter"
0275 #define MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING "Dell PERC H200 Integrated"
0276 #define MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING    "Dell PERC H200 Modular"
0277 #define MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING   "Dell PERC H200 Embedded"
0278 #define MPT2SAS_DELL_PERC_H200_BRANDING            "Dell PERC H200"
0279 #define MPT2SAS_DELL_6GBPS_SAS_BRANDING            "Dell 6Gbps SAS"
0280 
0281 #define MPT3SAS_DELL_12G_HBA_BRANDING       \
0282     "Dell 12Gbps HBA"
0283 
0284 /*
0285  * Dell HBA SSDIDs
0286  */
0287 #define MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID    0x1F1C
0288 #define MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID    0x1F1D
0289 #define MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID 0x1F1E
0290 #define MPT2SAS_DELL_PERC_H200_MODULAR_SSDID    0x1F1F
0291 #define MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID   0x1F20
0292 #define MPT2SAS_DELL_PERC_H200_SSDID        0x1F21
0293 #define MPT2SAS_DELL_6GBPS_SAS_SSDID        0x1F22
0294 
0295 #define MPT3SAS_DELL_12G_HBA_SSDID      0x1F46
0296 
0297 /*
0298  * Cisco HBA branding
0299  */
0300 #define MPT3SAS_CISCO_12G_8E_HBA_BRANDING       \
0301     "Cisco 9300-8E 12G SAS HBA"
0302 #define MPT3SAS_CISCO_12G_8I_HBA_BRANDING       \
0303     "Cisco 9300-8i 12G SAS HBA"
0304 #define MPT3SAS_CISCO_12G_AVILA_HBA_BRANDING    \
0305     "Cisco 12G Modular SAS Pass through Controller"
0306 #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_BRANDING     \
0307     "UCS C3X60 12G SAS Pass through Controller"
0308 /*
0309  * Cisco HBA SSSDIDs
0310  */
0311 #define MPT3SAS_CISCO_12G_8E_HBA_SSDID  0x14C
0312 #define MPT3SAS_CISCO_12G_8I_HBA_SSDID  0x154
0313 #define MPT3SAS_CISCO_12G_AVILA_HBA_SSDID  0x155
0314 #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_SSDID  0x156
0315 
0316 /*
0317  * status bits for ioc->diag_buffer_status
0318  */
0319 #define MPT3_DIAG_BUFFER_IS_REGISTERED  (0x01)
0320 #define MPT3_DIAG_BUFFER_IS_RELEASED    (0x02)
0321 #define MPT3_DIAG_BUFFER_IS_DIAG_RESET  (0x04)
0322 #define MPT3_DIAG_BUFFER_IS_DRIVER_ALLOCATED (0x08)
0323 #define MPT3_DIAG_BUFFER_IS_APP_OWNED (0x10)
0324 
0325 /*
0326  * HP HBA branding
0327  */
0328 #define MPT2SAS_HP_3PAR_SSVID                0x1590
0329 
0330 #define MPT2SAS_HP_2_4_INTERNAL_BRANDING    \
0331     "HP H220 Host Bus Adapter"
0332 #define MPT2SAS_HP_2_4_EXTERNAL_BRANDING    \
0333     "HP H221 Host Bus Adapter"
0334 #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING   \
0335     "HP H222 Host Bus Adapter"
0336 #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING   \
0337     "HP H220i Host Bus Adapter"
0338 #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING   \
0339     "HP H210i Host Bus Adapter"
0340 
0341 /*
0342  * HO HBA SSDIDs
0343  */
0344 #define MPT2SAS_HP_2_4_INTERNAL_SSDID           0x0041
0345 #define MPT2SAS_HP_2_4_EXTERNAL_SSDID           0x0042
0346 #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID  0x0043
0347 #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID      0x0044
0348 #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID      0x0046
0349 
0350 /*
0351  * Combined Reply Queue constants,
0352  * There are twelve Supplemental Reply Post Host Index Registers
0353  * and each register is at offset 0x10 bytes from the previous one.
0354  */
0355 #define MAX_COMBINED_MSIX_VECTORS(gen35) ((gen35 == 1) ? 16 : 8)
0356 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G3 12
0357 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G35    16
0358 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET   (0x10)
0359 #define MPT3_MIN_IRQS                   1
0360 
0361 /* OEM Identifiers */
0362 #define MFG10_OEM_ID_INVALID                   (0x00000000)
0363 #define MFG10_OEM_ID_DELL                      (0x00000001)
0364 #define MFG10_OEM_ID_FSC                       (0x00000002)
0365 #define MFG10_OEM_ID_SUN                       (0x00000003)
0366 #define MFG10_OEM_ID_IBM                       (0x00000004)
0367 
0368 /* GENERIC Flags 0*/
0369 #define MFG10_GF0_OCE_DISABLED                 (0x00000001)
0370 #define MFG10_GF0_R1E_DRIVE_COUNT              (0x00000002)
0371 #define MFG10_GF0_R10_DISPLAY                  (0x00000004)
0372 #define MFG10_GF0_SSD_DATA_SCRUB_DISABLE       (0x00000008)
0373 #define MFG10_GF0_SINGLE_DRIVE_R0              (0x00000010)
0374 
0375 #define VIRTUAL_IO_FAILED_RETRY         (0x32010081)
0376 
0377 /* High IOPs definitions */
0378 #define MPT3SAS_DEVICE_HIGH_IOPS_DEPTH      8
0379 #define MPT3SAS_HIGH_IOPS_REPLY_QUEUES      8
0380 #define MPT3SAS_HIGH_IOPS_BATCH_COUNT       16
0381 #define MPT3SAS_GEN35_MAX_MSIX_QUEUES       128
0382 #define RDPQ_MAX_INDEX_IN_ONE_CHUNK     16
0383 
0384 /* OEM Specific Flags will come from OEM specific header files */
0385 struct Mpi2ManufacturingPage10_t {
0386     MPI2_CONFIG_PAGE_HEADER Header;     /* 00h */
0387     U8  OEMIdentifier;          /* 04h */
0388     U8  Reserved1;          /* 05h */
0389     U16 Reserved2;          /* 08h */
0390     U32 Reserved3;          /* 0Ch */
0391     U32 GenericFlags0;          /* 10h */
0392     U32 GenericFlags1;          /* 14h */
0393     U32 Reserved4;          /* 18h */
0394     U32 OEMSpecificFlags0;      /* 1Ch */
0395     U32 OEMSpecificFlags1;      /* 20h */
0396     U32 Reserved5[18];          /* 24h - 60h*/
0397 };
0398 
0399 
0400 /* Miscellaneous options */
0401 struct Mpi2ManufacturingPage11_t {
0402     MPI2_CONFIG_PAGE_HEADER Header;     /* 00h */
0403     __le32  Reserved1;          /* 04h */
0404     u8  Reserved2;          /* 08h */
0405     u8  EEDPTagMode;            /* 09h */
0406     u8  Reserved3;          /* 0Ah */
0407     u8  Reserved4;          /* 0Bh */
0408     __le32  Reserved5[8];           /* 0Ch-2Ch */
0409     u16 AddlFlags2;         /* 2Ch */
0410     u8  AddlFlags3;         /* 2Eh */
0411     u8  Reserved6;          /* 2Fh */
0412     __le32  Reserved7[7];           /* 30h - 4Bh */
0413     u8  NVMeAbortTO;            /* 4Ch */
0414     u8  NumPerDevEvents;        /* 4Dh */
0415     u8  HostTraceBufferDecrementSizeKB; /* 4Eh */
0416     u8  HostTraceBufferFlags;       /* 4Fh */
0417     u16 HostTraceBufferMaxSizeKB;   /* 50h */
0418     u16 HostTraceBufferMinSizeKB;   /* 52h */
0419     u8  CoreDumpTOSec;          /* 54h */
0420     u8  TimeSyncInterval;       /* 55h */
0421     u16 Reserved9;          /* 56h */
0422     __le32  Reserved10;         /* 58h */
0423 };
0424 
0425 /**
0426  * struct MPT3SAS_TARGET - starget private hostdata
0427  * @starget: starget object
0428  * @sas_address: target sas address
0429  * @raid_device: raid_device pointer to access volume data
0430  * @handle: device handle
0431  * @num_luns: number luns
0432  * @flags: MPT_TARGET_FLAGS_XXX flags
0433  * @deleted: target flaged for deletion
0434  * @tm_busy: target is busy with TM request.
0435  * @port: hba port entry containing target's port number info
0436  * @sas_dev: The sas_device associated with this target
0437  * @pcie_dev: The pcie device associated with this target
0438  */
0439 struct MPT3SAS_TARGET {
0440     struct scsi_target *starget;
0441     u64 sas_address;
0442     struct _raid_device *raid_device;
0443     u16 handle;
0444     int num_luns;
0445     u32 flags;
0446     u8  deleted;
0447     u8  tm_busy;
0448     struct hba_port *port;
0449     struct _sas_device *sas_dev;
0450     struct _pcie_device *pcie_dev;
0451 };
0452 
0453 
0454 /*
0455  * per device private data
0456  */
0457 #define MPT_DEVICE_FLAGS_INIT       0x01
0458 
0459 #define MFG_PAGE10_HIDE_SSDS_MASK   (0x00000003)
0460 #define MFG_PAGE10_HIDE_ALL_DISKS   (0x00)
0461 #define MFG_PAGE10_EXPOSE_ALL_DISKS (0x01)
0462 #define MFG_PAGE10_HIDE_IF_VOL_PRESENT  (0x02)
0463 
0464 /**
0465  * struct MPT3SAS_DEVICE - sdev private hostdata
0466  * @sas_target: starget private hostdata
0467  * @lun: lun number
0468  * @flags: MPT_DEVICE_XXX flags
0469  * @configured_lun: lun is configured
0470  * @block: device is in SDEV_BLOCK state
0471  * @tlr_snoop_check: flag used in determining whether to disable TLR
0472  * @eedp_enable: eedp support enable bit
0473  * @eedp_type: 0(type_1), 1(type_2), 2(type_3)
0474  * @eedp_block_length: block size
0475  * @ata_command_pending: SATL passthrough outstanding for device
0476  */
0477 struct MPT3SAS_DEVICE {
0478     struct MPT3SAS_TARGET *sas_target;
0479     unsigned int    lun;
0480     u32 flags;
0481     u8  configured_lun;
0482     u8  block;
0483     u8  tlr_snoop_check;
0484     u8  ignore_delay_remove;
0485     /* Iopriority Command Handling */
0486     u8  ncq_prio_enable;
0487     /*
0488      * Bug workaround for SATL handling: the mpt2/3sas firmware
0489      * doesn't return BUSY or TASK_SET_FULL for subsequent
0490      * commands while a SATL pass through is in operation as the
0491      * spec requires, it simply does nothing with them until the
0492      * pass through completes, causing them possibly to timeout if
0493      * the passthrough is a long executing command (like format or
0494      * secure erase).  This variable allows us to do the right
0495      * thing while a SATL command is pending.
0496      */
0497     unsigned long ata_command_pending;
0498 
0499 };
0500 
0501 #define MPT3_CMD_NOT_USED   0x8000  /* free */
0502 #define MPT3_CMD_COMPLETE   0x0001  /* completed */
0503 #define MPT3_CMD_PENDING    0x0002  /* pending */
0504 #define MPT3_CMD_REPLY_VALID    0x0004  /* reply is valid */
0505 #define MPT3_CMD_RESET      0x0008  /* host reset dropped the command */
0506 #define MPT3_CMD_COMPLETE_ASYNC 0x0010  /* tells whether cmd completes in same thread or not */
0507 
0508 /**
0509  * struct _internal_cmd - internal commands struct
0510  * @mutex: mutex
0511  * @done: completion
0512  * @reply: reply message pointer
0513  * @sense: sense data
0514  * @status: MPT3_CMD_XXX status
0515  * @smid: system message id
0516  */
0517 struct _internal_cmd {
0518     struct mutex mutex;
0519     struct completion done;
0520     void    *reply;
0521     void    *sense;
0522     u16 status;
0523     u16 smid;
0524 };
0525 
0526 
0527 
0528 /**
0529  * struct _sas_device - attached device information
0530  * @list: sas device list
0531  * @starget: starget object
0532  * @sas_address: device sas address
0533  * @device_name: retrieved from the SAS IDENTIFY frame.
0534  * @handle: device handle
0535  * @sas_address_parent: sas address of parent expander or sas host
0536  * @enclosure_handle: enclosure handle
0537  * @enclosure_logical_id: enclosure logical identifier
0538  * @volume_handle: volume handle (valid when hidden raid member)
0539  * @volume_wwid: volume unique identifier
0540  * @device_info: bitfield provides detailed info about the device
0541  * @id: target id
0542  * @channel: target channel
0543  * @slot: number number
0544  * @phy: phy identifier provided in sas device page 0
0545  * @responding: used in _scsih_sas_device_mark_responding
0546  * @fast_path: fast path feature enable bit
0547  * @pfa_led_on: flag for PFA LED status
0548  * @pend_sas_rphy_add: flag to check if device is in sas_rphy_add()
0549  *  addition routine.
0550  * @chassis_slot: chassis slot
0551  * @is_chassis_slot_valid: chassis slot valid or not
0552  * @port: hba port entry containing device's port number info
0553  * @rphy: device's sas_rphy address used to identify this device structure in
0554  *  target_alloc callback function
0555  */
0556 struct _sas_device {
0557     struct list_head list;
0558     struct scsi_target *starget;
0559     u64 sas_address;
0560     u64 device_name;
0561     u16 handle;
0562     u64 sas_address_parent;
0563     u16 enclosure_handle;
0564     u64 enclosure_logical_id;
0565     u16 volume_handle;
0566     u64 volume_wwid;
0567     u32 device_info;
0568     int id;
0569     int channel;
0570     u16 slot;
0571     u8  phy;
0572     u8  responding;
0573     u8  fast_path;
0574     u8  pfa_led_on;
0575     u8  pend_sas_rphy_add;
0576     u8  enclosure_level;
0577     u8  chassis_slot;
0578     u8  is_chassis_slot_valid;
0579     u8  connector_name[5];
0580     struct kref refcount;
0581     u8  port_type;
0582     struct hba_port *port;
0583     struct sas_rphy *rphy;
0584 };
0585 
0586 static inline void sas_device_get(struct _sas_device *s)
0587 {
0588     kref_get(&s->refcount);
0589 }
0590 
0591 static inline void sas_device_free(struct kref *r)
0592 {
0593     kfree(container_of(r, struct _sas_device, refcount));
0594 }
0595 
0596 static inline void sas_device_put(struct _sas_device *s)
0597 {
0598     kref_put(&s->refcount, sas_device_free);
0599 }
0600 
0601 /*
0602  * struct _pcie_device - attached PCIe device information
0603  * @list: pcie device list
0604  * @starget: starget object
0605  * @wwid: device WWID
0606  * @handle: device handle
0607  * @device_info: bitfield provides detailed info about the device
0608  * @id: target id
0609  * @channel: target channel
0610  * @slot: slot number
0611  * @port_num: port number
0612  * @responding: used in _scsih_pcie_device_mark_responding
0613  * @fast_path: fast path feature enable bit
0614  * @nvme_mdts: MaximumDataTransferSize from PCIe Device Page 2 for
0615  *      NVMe device only
0616  * @enclosure_handle: enclosure handle
0617  * @enclosure_logical_id: enclosure logical identifier
0618  * @enclosure_level: The level of device's enclosure from the controller
0619  * @connector_name: ASCII value of the Connector's name
0620  * @serial_number: pointer of serial number string allocated runtime
0621  * @access_status: Device's Access Status
0622  * @shutdown_latency: NVMe device's RTD3 Entry Latency
0623  * @refcount: reference count for deletion
0624  */
0625 struct _pcie_device {
0626     struct list_head list;
0627     struct scsi_target *starget;
0628     u64 wwid;
0629     u16 handle;
0630     u32 device_info;
0631     int id;
0632     int channel;
0633     u16 slot;
0634     u8  port_num;
0635     u8  responding;
0636     u8  fast_path;
0637     u32 nvme_mdts;
0638     u16 enclosure_handle;
0639     u64 enclosure_logical_id;
0640     u8  enclosure_level;
0641     u8  connector_name[4];
0642     u8  *serial_number;
0643     u8  reset_timeout;
0644     u8  access_status;
0645     u16 shutdown_latency;
0646     struct kref refcount;
0647 };
0648 /**
0649  * pcie_device_get - Increment the pcie device reference count
0650  *
0651  * @p: pcie_device object
0652  *
0653  * When ever this function called it will increment the
0654  * reference count of the pcie device for which this function called.
0655  *
0656  */
0657 static inline void pcie_device_get(struct _pcie_device *p)
0658 {
0659     kref_get(&p->refcount);
0660 }
0661 
0662 /**
0663  * pcie_device_free - Release the pcie device object
0664  * @r - kref object
0665  *
0666  * Free's the pcie device object. It will be called when reference count
0667  * reaches to zero.
0668  */
0669 static inline void pcie_device_free(struct kref *r)
0670 {
0671     kfree(container_of(r, struct _pcie_device, refcount));
0672 }
0673 
0674 /**
0675  * pcie_device_put - Decrement the pcie device reference count
0676  *
0677  * @p: pcie_device object
0678  *
0679  * When ever this function called it will decrement the
0680  * reference count of the pcie device for which this function called.
0681  *
0682  * When refernce count reaches to Zero, this will call pcie_device_free to the
0683  * pcie_device object.
0684  */
0685 static inline void pcie_device_put(struct _pcie_device *p)
0686 {
0687     kref_put(&p->refcount, pcie_device_free);
0688 }
0689 /**
0690  * struct _raid_device - raid volume link list
0691  * @list: sas device list
0692  * @starget: starget object
0693  * @sdev: scsi device struct (volumes are single lun)
0694  * @wwid: unique identifier for the volume
0695  * @handle: device handle
0696  * @block_size: Block size of the volume
0697  * @id: target id
0698  * @channel: target channel
0699  * @volume_type: the raid level
0700  * @device_info: bitfield provides detailed info about the hidden components
0701  * @num_pds: number of hidden raid components
0702  * @responding: used in _scsih_raid_device_mark_responding
0703  * @percent_complete: resync percent complete
0704  * @direct_io_enabled: Whether direct io to PDs are allowed or not
0705  * @stripe_exponent: X where 2powX is the stripe sz in blocks
0706  * @block_exponent: X where 2powX is the block sz in bytes
0707  * @max_lba: Maximum number of LBA in the volume
0708  * @stripe_sz: Stripe Size of the volume
0709  * @device_info: Device info of the volume member disk
0710  * @pd_handle: Array of handles of the physical drives for direct I/O in le16
0711  */
0712 #define MPT_MAX_WARPDRIVE_PDS       8
0713 struct _raid_device {
0714     struct list_head list;
0715     struct scsi_target *starget;
0716     struct scsi_device *sdev;
0717     u64 wwid;
0718     u16 handle;
0719     u16 block_sz;
0720     int id;
0721     int channel;
0722     u8  volume_type;
0723     u8  num_pds;
0724     u8  responding;
0725     u8  percent_complete;
0726     u8  direct_io_enabled;
0727     u8  stripe_exponent;
0728     u8  block_exponent;
0729     u64 max_lba;
0730     u32 stripe_sz;
0731     u32 device_info;
0732     u16 pd_handle[MPT_MAX_WARPDRIVE_PDS];
0733 };
0734 
0735 /**
0736  * struct _boot_device - boot device info
0737  *
0738  * @channel: sas, raid, or pcie channel
0739  * @device: holds pointer for struct _sas_device, struct _raid_device or
0740  *     struct _pcie_device
0741  */
0742 struct _boot_device {
0743     int channel;
0744     void *device;
0745 };
0746 
0747 /**
0748  * struct _sas_port - wide/narrow sas port information
0749  * @port_list: list of ports belonging to expander
0750  * @num_phys: number of phys belonging to this port
0751  * @remote_identify: attached device identification
0752  * @rphy: sas transport rphy object
0753  * @port: sas transport wide/narrow port object
0754  * @hba_port: hba port entry containing port's port number info
0755  * @phy_list: _sas_phy list objects belonging to this port
0756  */
0757 struct _sas_port {
0758     struct list_head port_list;
0759     u8  num_phys;
0760     struct sas_identify remote_identify;
0761     struct sas_rphy *rphy;
0762     struct sas_port *port;
0763     struct hba_port *hba_port;
0764     struct list_head phy_list;
0765 };
0766 
0767 /**
0768  * struct _sas_phy - phy information
0769  * @port_siblings: list of phys belonging to a port
0770  * @identify: phy identification
0771  * @remote_identify: attached device identification
0772  * @phy: sas transport phy object
0773  * @phy_id: unique phy id
0774  * @handle: device handle for this phy
0775  * @attached_handle: device handle for attached device
0776  * @phy_belongs_to_port: port has been created for this phy
0777  * @port: hba port entry containing port number info
0778  */
0779 struct _sas_phy {
0780     struct list_head port_siblings;
0781     struct sas_identify identify;
0782     struct sas_identify remote_identify;
0783     struct sas_phy *phy;
0784     u8  phy_id;
0785     u16 handle;
0786     u16 attached_handle;
0787     u8  phy_belongs_to_port;
0788     u8  hba_vphy;
0789     struct hba_port *port;
0790 };
0791 
0792 /**
0793  * struct _sas_node - sas_host/expander information
0794  * @list: list of expanders
0795  * @parent_dev: parent device class
0796  * @num_phys: number phys belonging to this sas_host/expander
0797  * @sas_address: sas address of this sas_host/expander
0798  * @handle: handle for this sas_host/expander
0799  * @sas_address_parent: sas address of parent expander or sas host
0800  * @enclosure_handle: handle for this a member of an enclosure
0801  * @device_info: bitwise defining capabilities of this sas_host/expander
0802  * @responding: used in _scsih_expander_device_mark_responding
0803  * @nr_phys_allocated: Allocated memory for this many count phys
0804  * @phy: a list of phys that make up this sas_host/expander
0805  * @sas_port_list: list of ports attached to this sas_host/expander
0806  * @port: hba port entry containing node's port number info
0807  * @rphy: sas_rphy object of this expander
0808  */
0809 struct _sas_node {
0810     struct list_head list;
0811     struct device *parent_dev;
0812     u8  num_phys;
0813     u64 sas_address;
0814     u16 handle;
0815     u64 sas_address_parent;
0816     u16 enclosure_handle;
0817     u64 enclosure_logical_id;
0818     u8  responding;
0819     u8  nr_phys_allocated;
0820     struct hba_port *port;
0821     struct  _sas_phy *phy;
0822     struct list_head sas_port_list;
0823     struct sas_rphy *rphy;
0824 };
0825 
0826 /**
0827  * struct _enclosure_node - enclosure information
0828  * @list: list of enclosures
0829  * @pg0: enclosure pg0;
0830  */
0831 struct _enclosure_node {
0832     struct list_head list;
0833     Mpi2SasEnclosurePage0_t pg0;
0834 };
0835 
0836 /**
0837  * enum reset_type - reset state
0838  * @FORCE_BIG_HAMMER: issue diagnostic reset
0839  * @SOFT_RESET: issue message_unit_reset, if fails to to big hammer
0840  */
0841 enum reset_type {
0842     FORCE_BIG_HAMMER,
0843     SOFT_RESET,
0844 };
0845 
0846 /**
0847  * struct pcie_sg_list - PCIe SGL buffer (contiguous per I/O)
0848  * @pcie_sgl: PCIe native SGL for NVMe devices
0849  * @pcie_sgl_dma: physical address
0850  */
0851 struct pcie_sg_list {
0852     void            *pcie_sgl;
0853     dma_addr_t      pcie_sgl_dma;
0854 };
0855 
0856 /**
0857  * struct chain_tracker - firmware chain tracker
0858  * @chain_buffer: chain buffer
0859  * @chain_buffer_dma: physical address
0860  * @tracker_list: list of free request (ioc->free_chain_list)
0861  */
0862 struct chain_tracker {
0863     void *chain_buffer;
0864     dma_addr_t chain_buffer_dma;
0865 };
0866 
0867 struct chain_lookup {
0868     struct chain_tracker *chains_per_smid;
0869     atomic_t    chain_offset;
0870 };
0871 
0872 /**
0873  * struct scsiio_tracker - scsi mf request tracker
0874  * @smid: system message id
0875  * @cb_idx: callback index
0876  * @direct_io: To indicate whether I/O is direct (WARPDRIVE)
0877  * @chain_list: list of associated firmware chain tracker
0878  * @msix_io: IO's msix
0879  */
0880 struct scsiio_tracker {
0881     u16 smid;
0882     struct scsi_cmnd *scmd;
0883     u8  cb_idx;
0884     u8  direct_io;
0885     struct pcie_sg_list pcie_sg_list;
0886     struct list_head chain_list;
0887     u16     msix_io;
0888 };
0889 
0890 /**
0891  * struct request_tracker - firmware request tracker
0892  * @smid: system message id
0893  * @cb_idx: callback index
0894  * @tracker_list: list of free request (ioc->free_list)
0895  */
0896 struct request_tracker {
0897     u16 smid;
0898     u8  cb_idx;
0899     struct list_head tracker_list;
0900 };
0901 
0902 /**
0903  * struct _tr_list - target reset list
0904  * @handle: device handle
0905  * @state: state machine
0906  */
0907 struct _tr_list {
0908     struct list_head list;
0909     u16 handle;
0910     u16 state;
0911 };
0912 
0913 /**
0914  * struct _sc_list - delayed SAS_IO_UNIT_CONTROL message list
0915  * @handle: device handle
0916  */
0917 struct _sc_list {
0918     struct list_head list;
0919     u16     handle;
0920 };
0921 
0922 /**
0923  * struct _event_ack_list - delayed event acknowledgment list
0924  * @Event: Event ID
0925  * @EventContext: used to track the event uniquely
0926  */
0927 struct _event_ack_list {
0928     struct list_head list;
0929     U16     Event;
0930     U32     EventContext;
0931 };
0932 
0933 /**
0934  * struct adapter_reply_queue - the reply queue struct
0935  * @ioc: per adapter object
0936  * @msix_index: msix index into vector table
0937  * @vector: irq vector
0938  * @reply_post_host_index: head index in the pool where FW completes IO
0939  * @reply_post_free: reply post base virt address
0940  * @name: the name registered to request_irq()
0941  * @busy: isr is actively processing replies on another cpu
0942  * @os_irq: irq number
0943  * @irqpoll: irq_poll object
0944  * @irq_poll_scheduled: Tells whether irq poll is scheduled or not
0945  * @is_iouring_poll_q: Tells whether reply queues is assigned
0946  *          to io uring poll queues or not
0947  * @list: this list
0948 */
0949 struct adapter_reply_queue {
0950     struct MPT3SAS_ADAPTER  *ioc;
0951     u8          msix_index;
0952     u32         reply_post_host_index;
0953     Mpi2ReplyDescriptorsUnion_t *reply_post_free;
0954     char            name[MPT_NAME_LENGTH];
0955     atomic_t        busy;
0956     u32         os_irq;
0957     struct irq_poll         irqpoll;
0958     bool            irq_poll_scheduled;
0959     bool            irq_line_enable;
0960     bool            is_iouring_poll_q;
0961     struct list_head    list;
0962 };
0963 
0964 /**
0965  * struct io_uring_poll_queue - the io uring poll queue structure
0966  * @busy: Tells whether io uring poll queue is busy or not
0967  * @pause: Tells whether IOs are paused on io uring poll queue or not
0968  * @reply_q: reply queue mapped for io uring poll queue
0969  */
0970 struct io_uring_poll_queue {
0971     atomic_t    busy;
0972     atomic_t    pause;
0973     struct adapter_reply_queue *reply_q;
0974 };
0975 
0976 typedef void (*MPT_ADD_SGE)(void *paddr, u32 flags_length, dma_addr_t dma_addr);
0977 
0978 /* SAS3.0 support */
0979 typedef int (*MPT_BUILD_SG_SCMD)(struct MPT3SAS_ADAPTER *ioc,
0980     struct scsi_cmnd *scmd, u16 smid, struct _pcie_device *pcie_device);
0981 typedef void (*MPT_BUILD_SG)(struct MPT3SAS_ADAPTER *ioc, void *psge,
0982         dma_addr_t data_out_dma, size_t data_out_sz,
0983         dma_addr_t data_in_dma, size_t data_in_sz);
0984 typedef void (*MPT_BUILD_ZERO_LEN_SGE)(struct MPT3SAS_ADAPTER *ioc,
0985         void *paddr);
0986 
0987 /* SAS3.5 support */
0988 typedef void (*NVME_BUILD_PRP)(struct MPT3SAS_ADAPTER *ioc, u16 smid,
0989     Mpi26NVMeEncapsulatedRequest_t *nvme_encap_request,
0990     dma_addr_t data_out_dma, size_t data_out_sz, dma_addr_t data_in_dma,
0991     size_t data_in_sz);
0992 
0993 /* To support atomic and non atomic descriptors*/
0994 typedef void (*PUT_SMID_IO_FP_HIP) (struct MPT3SAS_ADAPTER *ioc, u16 smid,
0995     u16 funcdep);
0996 typedef void (*PUT_SMID_DEFAULT) (struct MPT3SAS_ADAPTER *ioc, u16 smid);
0997 typedef u32 (*BASE_READ_REG) (const volatile void __iomem *addr);
0998 /*
0999  * To get high iops reply queue's msix index when high iops mode is enabled
1000  * else get the msix index of general reply queues.
1001  */
1002 typedef u8 (*GET_MSIX_INDEX) (struct MPT3SAS_ADAPTER *ioc,
1003     struct scsi_cmnd *scmd);
1004 
1005 /* IOC Facts and Port Facts converted from little endian to cpu */
1006 union mpi3_version_union {
1007     MPI2_VERSION_STRUCT     Struct;
1008     u32             Word;
1009 };
1010 
1011 struct mpt3sas_facts {
1012     u16         MsgVersion;
1013     u16         HeaderVersion;
1014     u8          IOCNumber;
1015     u8          VP_ID;
1016     u8          VF_ID;
1017     u16         IOCExceptions;
1018     u16         IOCStatus;
1019     u32         IOCLogInfo;
1020     u8          MaxChainDepth;
1021     u8          WhoInit;
1022     u8          NumberOfPorts;
1023     u8          MaxMSIxVectors;
1024     u16         RequestCredit;
1025     u16         ProductID;
1026     u32         IOCCapabilities;
1027     union mpi3_version_union    FWVersion;
1028     u16         IOCRequestFrameSize;
1029     u16         IOCMaxChainSegmentSize;
1030     u16         MaxInitiators;
1031     u16         MaxTargets;
1032     u16         MaxSasExpanders;
1033     u16         MaxEnclosures;
1034     u16         ProtocolFlags;
1035     u16         HighPriorityCredit;
1036     u16         MaxReplyDescriptorPostQueueDepth;
1037     u8          ReplyFrameSize;
1038     u8          MaxVolumes;
1039     u16         MaxDevHandle;
1040     u16         MaxPersistentEntries;
1041     u16         MinDevHandle;
1042     u8          CurrentHostPageSize;
1043 };
1044 
1045 struct mpt3sas_port_facts {
1046     u8          PortNumber;
1047     u8          VP_ID;
1048     u8          VF_ID;
1049     u8          PortType;
1050     u16         MaxPostedCmdBuffers;
1051 };
1052 
1053 struct reply_post_struct {
1054     Mpi2ReplyDescriptorsUnion_t *reply_post_free;
1055     dma_addr_t          reply_post_free_dma;
1056 };
1057 
1058 /**
1059  * struct virtual_phy - vSES phy structure
1060  * sas_address: SAS Address of vSES device
1061  * phy_mask: vSES device's phy number
1062  * flags: flags used to manage this structure
1063  */
1064 struct virtual_phy {
1065     struct  list_head list;
1066     u64 sas_address;
1067     u32 phy_mask;
1068     u8  flags;
1069 };
1070 
1071 #define MPT_VPHY_FLAG_DIRTY_PHY 0x01
1072 
1073 /**
1074  * struct hba_port - Saves each HBA's Wide/Narrow port info
1075  * @sas_address: sas address of this wide/narrow port's attached device
1076  * @phy_mask: HBA PHY's belonging to this port
1077  * @port_id: port number
1078  * @flags: hba port flags
1079  * @vphys_mask : mask of vSES devices Phy number
1080  * @vphys_list : list containing vSES device structures
1081  */
1082 struct hba_port {
1083     struct list_head list;
1084     u64 sas_address;
1085     u32 phy_mask;
1086     u8      port_id;
1087     u8  flags;
1088     u32 vphys_mask;
1089     struct list_head vphys_list;
1090 };
1091 
1092 /* hba port flags */
1093 #define HBA_PORT_FLAG_DIRTY_PORT       0x01
1094 #define HBA_PORT_FLAG_NEW_PORT         0x02
1095 
1096 #define MULTIPATH_DISABLED_PORT_ID     0xFF
1097 
1098 /**
1099  * struct htb_rel_query - diagnostic buffer release reason
1100  * @unique_id - unique id associated with this buffer.
1101  * @buffer_rel_condition - Release condition ioctl/sysfs/reset
1102  * @reserved
1103  * @trigger_type - Master/Event/scsi/MPI
1104  * @trigger_info_dwords - Data Correspondig to trigger type
1105  */
1106 struct htb_rel_query {
1107     u16 buffer_rel_condition;
1108     u16 reserved;
1109     u32 trigger_type;
1110     u32 trigger_info_dwords[2];
1111 };
1112 
1113 /* Buffer_rel_condition bit fields */
1114 
1115 /* Bit 0 - Diag Buffer not Released */
1116 #define MPT3_DIAG_BUFFER_NOT_RELEASED   (0x00)
1117 /* Bit 0 - Diag Buffer Released */
1118 #define MPT3_DIAG_BUFFER_RELEASED   (0x01)
1119 
1120 /*
1121  * Bit 1 - Diag Buffer Released by IOCTL,
1122  * This bit is valid only if Bit 0 is one
1123  */
1124 #define MPT3_DIAG_BUFFER_REL_IOCTL  (0x02 | MPT3_DIAG_BUFFER_RELEASED)
1125 
1126 /*
1127  * Bit 2 - Diag Buffer Released by Trigger,
1128  * This bit is valid only if Bit 0 is one
1129  */
1130 #define MPT3_DIAG_BUFFER_REL_TRIGGER    (0x04 | MPT3_DIAG_BUFFER_RELEASED)
1131 
1132 /*
1133  * Bit 3 - Diag Buffer Released by SysFs,
1134  * This bit is valid only if Bit 0 is one
1135  */
1136 #define MPT3_DIAG_BUFFER_REL_SYSFS  (0x08 | MPT3_DIAG_BUFFER_RELEASED)
1137 
1138 /* DIAG RESET Master trigger flags */
1139 #define MPT_DIAG_RESET_ISSUED_BY_DRIVER 0x00000000
1140 #define MPT_DIAG_RESET_ISSUED_BY_USER   0x00000001
1141 
1142 typedef void (*MPT3SAS_FLUSH_RUNNING_CMDS)(struct MPT3SAS_ADAPTER *ioc);
1143 /**
1144  * struct MPT3SAS_ADAPTER - per adapter struct
1145  * @list: ioc_list
1146  * @shost: shost object
1147  * @id: unique adapter id
1148  * @cpu_count: number online cpus
1149  * @name: generic ioc string
1150  * @tmp_string: tmp string used for logging
1151  * @pdev: pci pdev object
1152  * @pio_chip: physical io register space
1153  * @chip: memory mapped register space
1154  * @chip_phys: physical addrss prior to mapping
1155  * @logging_level: see mpt3sas_debug.h
1156  * @fwfault_debug: debuging FW timeouts
1157  * @ir_firmware: IR firmware present
1158  * @bars: bitmask of BAR's that must be configured
1159  * @mask_interrupts: ignore interrupt
1160  * @pci_access_mutex: Mutex to synchronize ioctl, sysfs show path and
1161  *          pci resource handling
1162  * @fault_reset_work_q_name: fw fault work queue
1163  * @fault_reset_work_q: ""
1164  * @fault_reset_work: ""
1165  * @firmware_event_name: fw event work queue
1166  * @firmware_event_thread: ""
1167  * @fw_event_lock:
1168  * @fw_event_list: list of fw events
1169  * @current_evet: current processing firmware event
1170  * @fw_event_cleanup: set to one while cleaning up the fw events
1171  * @aen_event_read_flag: event log was read
1172  * @broadcast_aen_busy: broadcast aen waiting to be serviced
1173  * @shost_recovery: host reset in progress
1174  * @ioc_reset_in_progress_lock:
1175  * @ioc_link_reset_in_progress: phy/hard reset in progress
1176  * @ignore_loginfos: ignore loginfos during task management
1177  * @remove_host: flag for when driver unloads, to avoid sending dev resets
1178  * @pci_error_recovery: flag to prevent ioc access until slot reset completes
1179  * @wait_for_discovery_to_complete: flag set at driver load time when
1180  *                                               waiting on reporting devices
1181  * @is_driver_loading: flag set at driver load time
1182  * @port_enable_failed: flag set when port enable has failed
1183  * @start_scan: flag set from scan_start callback, cleared from _mpt3sas_fw_work
1184  * @start_scan_failed: means port enable failed, return's the ioc_status
1185  * @msix_enable: flag indicating msix is enabled
1186  * @msix_vector_count: number msix vectors
1187  * @cpu_msix_table: table for mapping cpus to msix index
1188  * @cpu_msix_table_sz: table size
1189  * @total_io_cnt: Gives total IO count, used to load balance the interrupts
1190  * @ioc_coredump_loop: will have non-zero value when FW is in CoreDump state
1191  * @timestamp_update_count: Counter to fire timeSync command
1192  * time_sync_interval: Time sync interval read from man page 11
1193  * @high_iops_outstanding: used to load balance the interrupts
1194  *              within high iops reply queues
1195  * @msix_load_balance: Enables load balancing of interrupts across
1196  * the multiple MSIXs
1197  * @schedule_dead_ioc_flush_running_cmds: callback to flush pending commands
1198  * @thresh_hold: Max number of reply descriptors processed
1199  *              before updating Host Index
1200  * @iopoll_q_start_index: starting index of io uring poll queues
1201  *              in reply queue list
1202  * @drv_internal_flags: Bit map internal to driver
1203  * @drv_support_bitmap: driver's supported feature bit map
1204  * @use_32bit_dma: Flag to use 32 bit consistent dma mask
1205  * @scsi_io_cb_idx: shost generated commands
1206  * @tm_cb_idx: task management commands
1207  * @scsih_cb_idx: scsih internal commands
1208  * @transport_cb_idx: transport internal commands
1209  * @ctl_cb_idx: clt internal commands
1210  * @base_cb_idx: base internal commands
1211  * @config_cb_idx: base internal commands
1212  * @tm_tr_cb_idx : device removal target reset handshake
1213  * @tm_tr_volume_cb_idx : volume removal target reset
1214  * @base_cmds:
1215  * @transport_cmds:
1216  * @scsih_cmds:
1217  * @tm_cmds:
1218  * @ctl_cmds:
1219  * @config_cmds:
1220  * @base_add_sg_single: handler for either 32/64 bit sgl's
1221  * @event_type: bits indicating which events to log
1222  * @event_context: unique id for each logged event
1223  * @event_log: event log pointer
1224  * @event_masks: events that are masked
1225  * @max_shutdown_latency: timeout value for NVMe shutdown operation,
1226  *          which is equal that NVMe drive's RTD3 Entry Latency
1227  *          which has reported maximum RTD3 Entry Latency value
1228  *          among attached NVMe drives.
1229  * @facts: static facts data
1230  * @prev_fw_facts: previous fw facts data
1231  * @pfacts: static port facts data
1232  * @manu_pg0: static manufacturing page 0
1233  * @manu_pg10: static manufacturing page 10
1234  * @manu_pg11: static manufacturing page 11
1235  * @bios_pg2: static bios page 2
1236  * @bios_pg3: static bios page 3
1237  * @ioc_pg8: static ioc page 8
1238  * @iounit_pg0: static iounit page 0
1239  * @iounit_pg1: static iounit page 1
1240  * @iounit_pg8: static iounit page 8
1241  * @sas_hba: sas host object
1242  * @sas_expander_list: expander object list
1243  * @enclosure_list: enclosure object list
1244  * @sas_node_lock:
1245  * @sas_device_list: sas device object list
1246  * @sas_device_init_list: sas device object list (used only at init time)
1247  * @sas_device_lock:
1248  * @pcie_device_list: pcie device object list
1249  * @pcie_device_init_list: pcie device object list (used only at init time)
1250  * @pcie_device_lock:
1251  * @io_missing_delay: time for IO completed by fw when PDR enabled
1252  * @device_missing_delay: time for device missing by fw when PDR enabled
1253  * @sas_id : used for setting volume target IDs
1254  * @pcie_target_id: used for setting pcie target IDs
1255  * @blocking_handles: bitmask used to identify which devices need blocking
1256  * @pd_handles : bitmask for PD handles
1257  * @pd_handles_sz : size of pd_handle bitmask
1258  * @config_page_sz: config page size
1259  * @config_page: reserve memory for config page payload
1260  * @config_page_dma:
1261  * @hba_queue_depth: hba request queue depth
1262  * @sge_size: sg element size for either 32/64 bit
1263  * @scsiio_depth: SCSI_IO queue depth
1264  * @request_sz: per request frame size
1265  * @request: pool of request frames
1266  * @request_dma:
1267  * @request_dma_sz:
1268  * @scsi_lookup: firmware request tracker list
1269  * @scsi_lookup_lock:
1270  * @free_list: free list of request
1271  * @pending_io_count:
1272  * @reset_wq:
1273  * @chain: pool of chains
1274  * @chain_dma:
1275  * @max_sges_in_main_message: number sg elements in main message
1276  * @max_sges_in_chain_message: number sg elements per chain
1277  * @chains_needed_per_io: max chains per io
1278  * @chain_depth: total chains allocated
1279  * @chain_segment_sz: gives the max number of
1280  *          SGEs accommodate on single chain buffer
1281  * @hi_priority_smid:
1282  * @hi_priority:
1283  * @hi_priority_dma:
1284  * @hi_priority_depth:
1285  * @hpr_lookup:
1286  * @hpr_free_list:
1287  * @internal_smid:
1288  * @internal:
1289  * @internal_dma:
1290  * @internal_depth:
1291  * @internal_lookup:
1292  * @internal_free_list:
1293  * @sense: pool of sense
1294  * @sense_dma:
1295  * @sense_dma_pool:
1296  * @reply_depth: hba reply queue depth:
1297  * @reply_sz: per reply frame size:
1298  * @reply: pool of replys:
1299  * @reply_dma:
1300  * @reply_dma_pool:
1301  * @reply_free_queue_depth: reply free depth
1302  * @reply_free: pool for reply free queue (32 bit addr)
1303  * @reply_free_dma:
1304  * @reply_free_dma_pool:
1305  * @reply_free_host_index: tail index in pool to insert free replys
1306  * @reply_post_queue_depth: reply post queue depth
1307  * @reply_post_struct: struct for reply_post_free physical & virt address
1308  * @rdpq_array_capable: FW supports multiple reply queue addresses in ioc_init
1309  * @rdpq_array_enable: rdpq_array support is enabled in the driver
1310  * @rdpq_array_enable_assigned: this ensures that rdpq_array_enable flag
1311  *              is assigned only ones
1312  * @reply_queue_count: number of reply queue's
1313  * @reply_queue_list: link list contaning the reply queue info
1314  * @msix96_vector: 96 MSI-X vector support
1315  * @replyPostRegisterIndex: index of next position in Reply Desc Post Queue
1316  * @delayed_tr_list: target reset link list
1317  * @delayed_tr_volume_list: volume target reset link list
1318  * @delayed_sc_list:
1319  * @delayed_event_ack_list:
1320  * @temp_sensors_count: flag to carry the number of temperature sensors
1321  * @pci_access_mutex: Mutex to synchronize ioctl,sysfs show path and
1322  *  pci resource handling. PCI resource freeing will lead to free
1323  *  vital hardware/memory resource, which might be in use by cli/sysfs
1324  *  path functions resulting in Null pointer reference followed by kernel
1325  *  crash. To avoid the above race condition we use mutex syncrhonization
1326  *  which ensures the syncrhonization between cli/sysfs_show path.
1327  * @atomic_desc_capable: Atomic Request Descriptor support.
1328  * @GET_MSIX_INDEX: Get the msix index of high iops queues.
1329  * @multipath_on_hba: flag to determine multipath on hba is enabled or not
1330  * @port_table_list: list containing HBA's wide/narrow port's info
1331  */
1332 struct MPT3SAS_ADAPTER {
1333     struct list_head list;
1334     struct Scsi_Host *shost;
1335     u8      id;
1336     int     cpu_count;
1337     char        name[MPT_NAME_LENGTH];
1338     char        driver_name[MPT_NAME_LENGTH - 8];
1339     char        tmp_string[MPT_STRING_LENGTH];
1340     struct pci_dev  *pdev;
1341     Mpi2SystemInterfaceRegs_t __iomem *chip;
1342     phys_addr_t chip_phys;
1343     int     logging_level;
1344     int     fwfault_debug;
1345     u8      ir_firmware;
1346     int     bars;
1347     u8      mask_interrupts;
1348 
1349     /* fw fault handler */
1350     char        fault_reset_work_q_name[20];
1351     struct workqueue_struct *fault_reset_work_q;
1352     struct delayed_work fault_reset_work;
1353 
1354     /* fw event handler */
1355     char        firmware_event_name[20];
1356     struct workqueue_struct *firmware_event_thread;
1357     spinlock_t  fw_event_lock;
1358     struct list_head fw_event_list;
1359     struct fw_event_work    *current_event;
1360     u8      fw_events_cleanup;
1361 
1362      /* misc flags */
1363     int     aen_event_read_flag;
1364     u8      broadcast_aen_busy;
1365     u16     broadcast_aen_pending;
1366     u8      shost_recovery;
1367     u8      got_task_abort_from_ioctl;
1368 
1369     struct mutex    reset_in_progress_mutex;
1370     spinlock_t  ioc_reset_in_progress_lock;
1371     u8      ioc_link_reset_in_progress;
1372 
1373     u8      ignore_loginfos;
1374     u8      remove_host;
1375     u8      pci_error_recovery;
1376     u8      wait_for_discovery_to_complete;
1377     u8      is_driver_loading;
1378     u8      port_enable_failed;
1379     u8      start_scan;
1380     u16     start_scan_failed;
1381 
1382     u8      msix_enable;
1383     u16     msix_vector_count;
1384     u8      *cpu_msix_table;
1385     u16     cpu_msix_table_sz;
1386     resource_size_t __iomem **reply_post_host_index;
1387     u32     ioc_reset_count;
1388     MPT3SAS_FLUSH_RUNNING_CMDS schedule_dead_ioc_flush_running_cmds;
1389     u32             non_operational_loop;
1390     u8              ioc_coredump_loop;
1391     u32     timestamp_update_count;
1392     u32     time_sync_interval;
1393     atomic64_t      total_io_cnt;
1394     atomic64_t  high_iops_outstanding;
1395     bool            msix_load_balance;
1396     u16     thresh_hold;
1397     u8      high_iops_queues;
1398     u8      iopoll_q_start_index;
1399     u32             drv_internal_flags;
1400     u32     drv_support_bitmap;
1401     u32             dma_mask;
1402     bool        enable_sdev_max_qd;
1403     bool        use_32bit_dma;
1404     struct io_uring_poll_queue *io_uring_poll_queues;
1405 
1406     /* internal commands, callback index */
1407     u8      scsi_io_cb_idx;
1408     u8      tm_cb_idx;
1409     u8      transport_cb_idx;
1410     u8      scsih_cb_idx;
1411     u8      ctl_cb_idx;
1412     u8      base_cb_idx;
1413     u8      port_enable_cb_idx;
1414     u8      config_cb_idx;
1415     u8      tm_tr_cb_idx;
1416     u8      tm_tr_volume_cb_idx;
1417     u8      tm_sas_control_cb_idx;
1418     struct _internal_cmd base_cmds;
1419     struct _internal_cmd port_enable_cmds;
1420     struct _internal_cmd transport_cmds;
1421     struct _internal_cmd scsih_cmds;
1422     struct _internal_cmd tm_cmds;
1423     struct _internal_cmd ctl_cmds;
1424     struct _internal_cmd config_cmds;
1425 
1426     MPT_ADD_SGE base_add_sg_single;
1427 
1428     /* function ptr for either IEEE or MPI sg elements */
1429     MPT_BUILD_SG_SCMD build_sg_scmd;
1430     MPT_BUILD_SG    build_sg;
1431     MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge;
1432     u16             sge_size_ieee;
1433     u16     hba_mpi_version_belonged;
1434 
1435     /* function ptr for MPI sg elements only */
1436     MPT_BUILD_SG    build_sg_mpi;
1437     MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge_mpi;
1438 
1439     /* function ptr for NVMe PRP elements only */
1440     NVME_BUILD_PRP  build_nvme_prp;
1441 
1442     /* event log */
1443     u32     event_type[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
1444     u32     event_context;
1445     void        *event_log;
1446     u32     event_masks[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
1447 
1448     u8      tm_custom_handling;
1449     u8      nvme_abort_timeout;
1450     u16     max_shutdown_latency;
1451     u16     max_wideport_qd;
1452     u16     max_narrowport_qd;
1453     u16     max_nvme_qd;
1454     u8      max_sata_qd;
1455 
1456     /* static config pages */
1457     struct mpt3sas_facts facts;
1458     struct mpt3sas_facts prev_fw_facts;
1459     struct mpt3sas_port_facts *pfacts;
1460     Mpi2ManufacturingPage0_t manu_pg0;
1461     struct Mpi2ManufacturingPage10_t manu_pg10;
1462     struct Mpi2ManufacturingPage11_t manu_pg11;
1463     Mpi2BiosPage2_t bios_pg2;
1464     Mpi2BiosPage3_t bios_pg3;
1465     Mpi2IOCPage8_t ioc_pg8;
1466     Mpi2IOUnitPage0_t iounit_pg0;
1467     Mpi2IOUnitPage1_t iounit_pg1;
1468     Mpi2IOUnitPage8_t iounit_pg8;
1469     Mpi2IOCPage1_t  ioc_pg1_copy;
1470 
1471     struct _boot_device req_boot_device;
1472     struct _boot_device req_alt_boot_device;
1473     struct _boot_device current_boot_device;
1474 
1475     /* sas hba, expander, and device list */
1476     struct _sas_node sas_hba;
1477     struct list_head sas_expander_list;
1478     struct list_head enclosure_list;
1479     spinlock_t  sas_node_lock;
1480     struct list_head sas_device_list;
1481     struct list_head sas_device_init_list;
1482     spinlock_t  sas_device_lock;
1483     struct list_head pcie_device_list;
1484     struct list_head pcie_device_init_list;
1485     spinlock_t      pcie_device_lock;
1486 
1487     struct list_head raid_device_list;
1488     spinlock_t  raid_device_lock;
1489     u8      io_missing_delay;
1490     u16     device_missing_delay;
1491     int     sas_id;
1492     int     pcie_target_id;
1493 
1494     void        *blocking_handles;
1495     void        *pd_handles;
1496     u16     pd_handles_sz;
1497 
1498     void        *pend_os_device_add;
1499     u16     pend_os_device_add_sz;
1500 
1501     /* config page */
1502     u16     config_page_sz;
1503     void        *config_page;
1504     dma_addr_t  config_page_dma;
1505     void        *config_vaddr;
1506 
1507     /* scsiio request */
1508     u16     hba_queue_depth;
1509     u16     sge_size;
1510     u16     scsiio_depth;
1511     u16     request_sz;
1512     u8      *request;
1513     dma_addr_t  request_dma;
1514     u32     request_dma_sz;
1515     struct pcie_sg_list *pcie_sg_lookup;
1516     spinlock_t  scsi_lookup_lock;
1517     int     pending_io_count;
1518     wait_queue_head_t reset_wq;
1519     u16     *io_queue_num;
1520 
1521     /* PCIe SGL */
1522     struct dma_pool *pcie_sgl_dma_pool;
1523     /* Host Page Size */
1524     u32     page_size;
1525 
1526     /* chain */
1527     struct chain_lookup *chain_lookup;
1528     struct list_head free_chain_list;
1529     struct dma_pool *chain_dma_pool;
1530     ulong       chain_pages;
1531     u16     max_sges_in_main_message;
1532     u16     max_sges_in_chain_message;
1533     u16     chains_needed_per_io;
1534     u32     chain_depth;
1535     u16     chain_segment_sz;
1536     u16     chains_per_prp_buffer;
1537 
1538     /* hi-priority queue */
1539     u16     hi_priority_smid;
1540     u8      *hi_priority;
1541     dma_addr_t  hi_priority_dma;
1542     u16     hi_priority_depth;
1543     struct request_tracker *hpr_lookup;
1544     struct list_head hpr_free_list;
1545 
1546     /* internal queue */
1547     u16     internal_smid;
1548     u8      *internal;
1549     dma_addr_t  internal_dma;
1550     u16     internal_depth;
1551     struct request_tracker *internal_lookup;
1552     struct list_head internal_free_list;
1553 
1554     /* sense */
1555     u8      *sense;
1556     dma_addr_t  sense_dma;
1557     struct dma_pool *sense_dma_pool;
1558 
1559     /* reply */
1560     u16     reply_sz;
1561     u8      *reply;
1562     dma_addr_t  reply_dma;
1563     u32     reply_dma_max_address;
1564     u32     reply_dma_min_address;
1565     struct dma_pool *reply_dma_pool;
1566 
1567     /* reply free queue */
1568     u16     reply_free_queue_depth;
1569     __le32      *reply_free;
1570     dma_addr_t  reply_free_dma;
1571     struct dma_pool *reply_free_dma_pool;
1572     u32     reply_free_host_index;
1573 
1574     /* reply post queue */
1575     u16     reply_post_queue_depth;
1576     struct reply_post_struct *reply_post;
1577     u8      rdpq_array_capable;
1578     u8      rdpq_array_enable;
1579     u8      rdpq_array_enable_assigned;
1580     struct dma_pool *reply_post_free_dma_pool;
1581     struct dma_pool *reply_post_free_array_dma_pool;
1582     Mpi2IOCInitRDPQArrayEntry *reply_post_free_array;
1583     dma_addr_t reply_post_free_array_dma;
1584     u8      reply_queue_count;
1585     struct list_head reply_queue_list;
1586 
1587     u8      combined_reply_queue;
1588     u8      combined_reply_index_count;
1589     u8      smp_affinity_enable;
1590     /* reply post register index */
1591     resource_size_t __iomem **replyPostRegisterIndex;
1592 
1593     struct list_head delayed_tr_list;
1594     struct list_head delayed_tr_volume_list;
1595     struct list_head delayed_sc_list;
1596     struct list_head delayed_event_ack_list;
1597     u8      temp_sensors_count;
1598     struct mutex pci_access_mutex;
1599 
1600     /* diag buffer support */
1601     u8      *diag_buffer[MPI2_DIAG_BUF_TYPE_COUNT];
1602     u32     diag_buffer_sz[MPI2_DIAG_BUF_TYPE_COUNT];
1603     dma_addr_t  diag_buffer_dma[MPI2_DIAG_BUF_TYPE_COUNT];
1604     u8      diag_buffer_status[MPI2_DIAG_BUF_TYPE_COUNT];
1605     u32     unique_id[MPI2_DIAG_BUF_TYPE_COUNT];
1606     u32     product_specific[MPI2_DIAG_BUF_TYPE_COUNT][23];
1607     u32     diagnostic_flags[MPI2_DIAG_BUF_TYPE_COUNT];
1608     u32     ring_buffer_offset;
1609     u32     ring_buffer_sz;
1610     struct htb_rel_query htb_rel;
1611     u8 reset_from_user;
1612     u8      is_warpdrive;
1613     u8      is_mcpu_endpoint;
1614     u8      hide_ir_msg;
1615     u8      mfg_pg10_hide_flag;
1616     u8      hide_drives;
1617     spinlock_t  diag_trigger_lock;
1618     u8      diag_trigger_active;
1619     u8      atomic_desc_capable;
1620     BASE_READ_REG   base_readl;
1621     struct SL_WH_MASTER_TRIGGER_T diag_trigger_master;
1622     struct SL_WH_EVENT_TRIGGERS_T diag_trigger_event;
1623     struct SL_WH_SCSI_TRIGGERS_T diag_trigger_scsi;
1624     struct SL_WH_MPI_TRIGGERS_T diag_trigger_mpi;
1625     u8      supports_trigger_pages;
1626     void        *device_remove_in_progress;
1627     u16     device_remove_in_progress_sz;
1628     u8      is_gen35_ioc;
1629     u8      is_aero_ioc;
1630     struct dentry   *debugfs_root;
1631     struct dentry   *ioc_dump;
1632     PUT_SMID_IO_FP_HIP put_smid_scsi_io;
1633     PUT_SMID_IO_FP_HIP put_smid_fast_path;
1634     PUT_SMID_IO_FP_HIP put_smid_hi_priority;
1635     PUT_SMID_DEFAULT put_smid_default;
1636     GET_MSIX_INDEX get_msix_index_for_smlio;
1637 
1638     u8      multipath_on_hba;
1639     struct list_head port_table_list;
1640 };
1641 
1642 struct mpt3sas_debugfs_buffer {
1643     void    *buf;
1644     u32 len;
1645 };
1646 
1647 #define MPT_DRV_SUPPORT_BITMAP_MEMMOVE 0x00000001
1648 #define MPT_DRV_SUPPORT_BITMAP_ADDNLQUERY   0x00000002
1649 
1650 #define MPT_DRV_INTERNAL_FIRST_PE_ISSUED        0x00000001
1651 
1652 typedef u8 (*MPT_CALLBACK)(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1653     u32 reply);
1654 
1655 
1656 /* base shared API */
1657 extern struct list_head mpt3sas_ioc_list;
1658 extern char    driver_name[MPT_NAME_LENGTH];
1659 /* spinlock on list operations over IOCs
1660  * Case: when multiple warpdrive cards(IOCs) are in use
1661  * Each IOC will added to the ioc list structure on initialization.
1662  * Watchdog threads run at regular intervals to check IOC for any
1663  * fault conditions which will trigger the dead_ioc thread to
1664  * deallocate pci resource, resulting deleting the IOC netry from list,
1665  * this deletion need to protected by spinlock to enusre that
1666  * ioc removal is syncrhonized, if not synchronized it might lead to
1667  * list_del corruption as the ioc list is traversed in cli path.
1668  */
1669 extern spinlock_t gioc_lock;
1670 
1671 void mpt3sas_base_start_watchdog(struct MPT3SAS_ADAPTER *ioc);
1672 void mpt3sas_base_stop_watchdog(struct MPT3SAS_ADAPTER *ioc);
1673 
1674 int mpt3sas_base_attach(struct MPT3SAS_ADAPTER *ioc);
1675 void mpt3sas_base_detach(struct MPT3SAS_ADAPTER *ioc);
1676 int mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER *ioc);
1677 void mpt3sas_base_free_resources(struct MPT3SAS_ADAPTER *ioc);
1678 void mpt3sas_free_enclosure_list(struct MPT3SAS_ADAPTER *ioc);
1679 int mpt3sas_base_hard_reset_handler(struct MPT3SAS_ADAPTER *ioc,
1680     enum reset_type type);
1681 
1682 void *mpt3sas_base_get_msg_frame(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1683 void *mpt3sas_base_get_sense_buffer(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1684 __le32 mpt3sas_base_get_sense_buffer_dma(struct MPT3SAS_ADAPTER *ioc,
1685     u16 smid);
1686 void *mpt3sas_base_get_pcie_sgl(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1687 dma_addr_t mpt3sas_base_get_pcie_sgl_dma(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1688 void mpt3sas_base_sync_reply_irqs(struct MPT3SAS_ADAPTER *ioc, u8 poll);
1689 void mpt3sas_base_mask_interrupts(struct MPT3SAS_ADAPTER *ioc);
1690 void mpt3sas_base_unmask_interrupts(struct MPT3SAS_ADAPTER *ioc);
1691 
1692 void mpt3sas_base_put_smid_fast_path(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1693     u16 handle);
1694 void mpt3sas_base_put_smid_hi_priority(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1695     u16 msix_task);
1696 void mpt3sas_base_put_smid_nvme_encap(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1697 void mpt3sas_base_put_smid_default(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1698 /* hi-priority queue */
1699 u16 mpt3sas_base_get_smid_hpr(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx);
1700 u16 mpt3sas_base_get_smid_scsiio(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx,
1701         struct scsi_cmnd *scmd);
1702 void mpt3sas_base_clear_st(struct MPT3SAS_ADAPTER *ioc,
1703         struct scsiio_tracker *st);
1704 
1705 u16 mpt3sas_base_get_smid(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx);
1706 void mpt3sas_base_free_smid(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1707 void mpt3sas_base_initialize_callback_handler(void);
1708 u8 mpt3sas_base_register_callback_handler(MPT_CALLBACK cb_func);
1709 void mpt3sas_base_release_callback_handler(u8 cb_idx);
1710 
1711 u8 mpt3sas_base_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1712     u32 reply);
1713 u8 mpt3sas_port_enable_done(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1714     u8 msix_index, u32 reply);
1715 void *mpt3sas_base_get_reply_virt_addr(struct MPT3SAS_ADAPTER *ioc,
1716     u32 phys_addr);
1717 
1718 u32 mpt3sas_base_get_iocstate(struct MPT3SAS_ADAPTER *ioc, int cooked);
1719 
1720 void mpt3sas_base_fault_info(struct MPT3SAS_ADAPTER *ioc , u16 fault_code);
1721 #define mpt3sas_print_fault_code(ioc, fault_code) \
1722 do { pr_err("%s fault info from func: %s\n", ioc->name, __func__); \
1723     mpt3sas_base_fault_info(ioc, fault_code); } while (0)
1724 
1725 void mpt3sas_base_coredump_info(struct MPT3SAS_ADAPTER *ioc, u16 fault_code);
1726 #define mpt3sas_print_coredump_info(ioc, fault_code) \
1727 do { pr_err("%s fault info from func: %s\n", ioc->name, __func__); \
1728     mpt3sas_base_coredump_info(ioc, fault_code); } while (0)
1729 
1730 int mpt3sas_base_wait_for_coredump_completion(struct MPT3SAS_ADAPTER *ioc,
1731         const char *caller);
1732 int mpt3sas_base_sas_iounit_control(struct MPT3SAS_ADAPTER *ioc,
1733     Mpi2SasIoUnitControlReply_t *mpi_reply,
1734     Mpi2SasIoUnitControlRequest_t *mpi_request);
1735 int mpt3sas_base_scsi_enclosure_processor(struct MPT3SAS_ADAPTER *ioc,
1736     Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request);
1737 
1738 void mpt3sas_base_validate_event_type(struct MPT3SAS_ADAPTER *ioc,
1739     u32 *event_type);
1740 
1741 void mpt3sas_halt_firmware(struct MPT3SAS_ADAPTER *ioc);
1742 
1743 void mpt3sas_base_update_missing_delay(struct MPT3SAS_ADAPTER *ioc,
1744     u16 device_missing_delay, u8 io_missing_delay);
1745 
1746 int mpt3sas_base_check_for_fault_and_issue_reset(
1747     struct MPT3SAS_ADAPTER *ioc);
1748 
1749 int mpt3sas_port_enable(struct MPT3SAS_ADAPTER *ioc);
1750 
1751 void
1752 mpt3sas_wait_for_commands_to_complete(struct MPT3SAS_ADAPTER *ioc);
1753 
1754 u8 mpt3sas_base_check_cmd_timeout(struct MPT3SAS_ADAPTER *ioc,
1755     u8 status, void *mpi_request, int sz);
1756 #define mpt3sas_check_cmd_timeout(ioc, status, mpi_request, sz, issue_reset) \
1757 do {    ioc_err(ioc, "In func: %s\n", __func__); \
1758     issue_reset = mpt3sas_base_check_cmd_timeout(ioc, \
1759     status, mpi_request, sz); } while (0)
1760 
1761 int mpt3sas_wait_for_ioc(struct MPT3SAS_ADAPTER *ioc, int wait_count);
1762 int mpt3sas_base_make_ioc_ready(struct MPT3SAS_ADAPTER *ioc, enum reset_type type);
1763 void mpt3sas_base_free_irq(struct MPT3SAS_ADAPTER *ioc);
1764 void mpt3sas_base_disable_msix(struct MPT3SAS_ADAPTER *ioc);
1765 int mpt3sas_blk_mq_poll(struct Scsi_Host *shost, unsigned int queue_num);
1766 void mpt3sas_base_pause_mq_polling(struct MPT3SAS_ADAPTER *ioc);
1767 void mpt3sas_base_resume_mq_polling(struct MPT3SAS_ADAPTER *ioc);
1768 
1769 /* scsih shared API */
1770 struct scsi_cmnd *mpt3sas_scsih_scsi_lookup_get(struct MPT3SAS_ADAPTER *ioc,
1771     u16 smid);
1772 u8 mpt3sas_scsih_event_callback(struct MPT3SAS_ADAPTER *ioc, u8 msix_index,
1773     u32 reply);
1774 void mpt3sas_scsih_pre_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1775 void mpt3sas_scsih_clear_outstanding_scsi_tm_commands(
1776     struct MPT3SAS_ADAPTER *ioc);
1777 void mpt3sas_scsih_reset_done_handler(struct MPT3SAS_ADAPTER *ioc);
1778 
1779 int mpt3sas_scsih_issue_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle,
1780     uint channel, uint id, u64 lun, u8 type, u16 smid_task,
1781     u16 msix_task, u8 timeout, u8 tr_method);
1782 int mpt3sas_scsih_issue_locked_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle,
1783     uint channel, uint id, u64 lun, u8 type, u16 smid_task,
1784     u16 msix_task, u8 timeout, u8 tr_method);
1785 
1786 void mpt3sas_scsih_set_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1787 void mpt3sas_scsih_clear_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1788 void mpt3sas_expander_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address,
1789     struct hba_port *port);
1790 void mpt3sas_device_remove_by_sas_address(struct MPT3SAS_ADAPTER *ioc,
1791     u64 sas_address, struct hba_port *port);
1792 u8 mpt3sas_check_for_pending_internal_cmds(struct MPT3SAS_ADAPTER *ioc,
1793     u16 smid);
1794 struct hba_port *
1795 mpt3sas_get_port_by_id(struct MPT3SAS_ADAPTER *ioc, u8 port,
1796     u8 bypass_dirty_port_flag);
1797 
1798 struct _sas_node *mpt3sas_scsih_expander_find_by_handle(
1799     struct MPT3SAS_ADAPTER *ioc, u16 handle);
1800 struct _sas_node *mpt3sas_scsih_expander_find_by_sas_address(
1801     struct MPT3SAS_ADAPTER *ioc, u64 sas_address,
1802     struct hba_port *port);
1803 struct _sas_device *mpt3sas_get_sdev_by_addr(
1804      struct MPT3SAS_ADAPTER *ioc, u64 sas_address,
1805      struct hba_port *port);
1806 struct _sas_device *__mpt3sas_get_sdev_by_addr(
1807      struct MPT3SAS_ADAPTER *ioc, u64 sas_address,
1808      struct hba_port *port);
1809 struct _sas_device *mpt3sas_get_sdev_by_handle(struct MPT3SAS_ADAPTER *ioc,
1810     u16 handle);
1811 struct _pcie_device *mpt3sas_get_pdev_by_handle(struct MPT3SAS_ADAPTER *ioc,
1812     u16 handle);
1813 
1814 void mpt3sas_port_enable_complete(struct MPT3SAS_ADAPTER *ioc);
1815 struct _raid_device *
1816 mpt3sas_raid_device_find_by_handle(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1817 void mpt3sas_scsih_change_queue_depth(struct scsi_device *sdev, int qdepth);
1818 struct _sas_device *
1819 __mpt3sas_get_sdev_by_rphy(struct MPT3SAS_ADAPTER *ioc, struct sas_rphy *rphy);
1820 struct virtual_phy *
1821 mpt3sas_get_vphy_by_phy(struct MPT3SAS_ADAPTER *ioc,
1822     struct hba_port *port, u32 phy);
1823 
1824 /* config shared API */
1825 u8 mpt3sas_config_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1826     u32 reply);
1827 int mpt3sas_config_get_number_hba_phys(struct MPT3SAS_ADAPTER *ioc,
1828     u8 *num_phys);
1829 int mpt3sas_config_get_manufacturing_pg0(struct MPT3SAS_ADAPTER *ioc,
1830     Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage0_t *config_page);
1831 int mpt3sas_config_get_manufacturing_pg7(struct MPT3SAS_ADAPTER *ioc,
1832     Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage7_t *config_page,
1833     u16 sz);
1834 int mpt3sas_config_get_manufacturing_pg10(struct MPT3SAS_ADAPTER *ioc,
1835     Mpi2ConfigReply_t *mpi_reply,
1836     struct Mpi2ManufacturingPage10_t *config_page);
1837 
1838 int mpt3sas_config_get_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc,
1839     Mpi2ConfigReply_t *mpi_reply,
1840     struct Mpi2ManufacturingPage11_t  *config_page);
1841 int mpt3sas_config_set_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc,
1842     Mpi2ConfigReply_t *mpi_reply,
1843     struct Mpi2ManufacturingPage11_t *config_page);
1844 
1845 int mpt3sas_config_get_bios_pg2(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1846     *mpi_reply, Mpi2BiosPage2_t *config_page);
1847 int mpt3sas_config_get_bios_pg3(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1848     *mpi_reply, Mpi2BiosPage3_t *config_page);
1849 int mpt3sas_config_get_iounit_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1850     *mpi_reply, Mpi2IOUnitPage0_t *config_page);
1851 int mpt3sas_config_get_sas_device_pg0(struct MPT3SAS_ADAPTER *ioc,
1852     Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage0_t *config_page,
1853     u32 form, u32 handle);
1854 int mpt3sas_config_get_sas_device_pg1(struct MPT3SAS_ADAPTER *ioc,
1855     Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage1_t *config_page,
1856     u32 form, u32 handle);
1857 int mpt3sas_config_get_pcie_device_pg0(struct MPT3SAS_ADAPTER *ioc,
1858     Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage0_t *config_page,
1859     u32 form, u32 handle);
1860 int mpt3sas_config_get_pcie_device_pg2(struct MPT3SAS_ADAPTER *ioc,
1861     Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage2_t *config_page,
1862     u32 form, u32 handle);
1863 int mpt3sas_config_get_pcie_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
1864     Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeIOUnitPage1_t *config_page,
1865     u16 sz);
1866 int mpt3sas_config_get_sas_iounit_pg0(struct MPT3SAS_ADAPTER *ioc,
1867     Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage0_t *config_page,
1868     u16 sz);
1869 int mpt3sas_config_get_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1870     *mpi_reply, Mpi2IOUnitPage1_t *config_page);
1871 int mpt3sas_config_get_iounit_pg3(struct MPT3SAS_ADAPTER *ioc,
1872     Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage3_t *config_page, u16 sz);
1873 int mpt3sas_config_set_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1874     *mpi_reply, Mpi2IOUnitPage1_t *config_page);
1875 int mpt3sas_config_get_iounit_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1876     *mpi_reply, Mpi2IOUnitPage8_t *config_page);
1877 int mpt3sas_config_get_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
1878     Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page,
1879     u16 sz);
1880 int mpt3sas_config_set_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
1881     Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page,
1882     u16 sz);
1883 int mpt3sas_config_get_ioc_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1884     *mpi_reply, Mpi2IOCPage1_t *config_page);
1885 int mpt3sas_config_set_ioc_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1886     *mpi_reply, Mpi2IOCPage1_t *config_page);
1887 int mpt3sas_config_get_ioc_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1888     *mpi_reply, Mpi2IOCPage8_t *config_page);
1889 int mpt3sas_config_get_expander_pg0(struct MPT3SAS_ADAPTER *ioc,
1890     Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage0_t *config_page,
1891     u32 form, u32 handle);
1892 int mpt3sas_config_get_expander_pg1(struct MPT3SAS_ADAPTER *ioc,
1893     Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage1_t *config_page,
1894     u32 phy_number, u16 handle);
1895 int mpt3sas_config_get_enclosure_pg0(struct MPT3SAS_ADAPTER *ioc,
1896     Mpi2ConfigReply_t *mpi_reply, Mpi2SasEnclosurePage0_t *config_page,
1897     u32 form, u32 handle);
1898 int mpt3sas_config_get_phy_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1899     *mpi_reply, Mpi2SasPhyPage0_t *config_page, u32 phy_number);
1900 int mpt3sas_config_get_phy_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1901     *mpi_reply, Mpi2SasPhyPage1_t *config_page, u32 phy_number);
1902 int mpt3sas_config_get_raid_volume_pg1(struct MPT3SAS_ADAPTER *ioc,
1903     Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form,
1904     u32 handle);
1905 int mpt3sas_config_get_number_pds(struct MPT3SAS_ADAPTER *ioc, u16 handle,
1906     u8 *num_pds);
1907 int mpt3sas_config_get_raid_volume_pg0(struct MPT3SAS_ADAPTER *ioc,
1908     Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 form,
1909     u32 handle, u16 sz);
1910 int mpt3sas_config_get_phys_disk_pg0(struct MPT3SAS_ADAPTER *ioc,
1911     Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page,
1912     u32 form, u32 form_specific);
1913 int mpt3sas_config_get_volume_handle(struct MPT3SAS_ADAPTER *ioc, u16 pd_handle,
1914     u16 *volume_handle);
1915 int mpt3sas_config_get_volume_wwid(struct MPT3SAS_ADAPTER *ioc,
1916     u16 volume_handle, u64 *wwid);
1917 int
1918 mpt3sas_config_get_driver_trigger_pg0(struct MPT3SAS_ADAPTER *ioc,
1919     Mpi2ConfigReply_t *mpi_reply, Mpi26DriverTriggerPage0_t *config_page);
1920 int
1921 mpt3sas_config_get_driver_trigger_pg1(struct MPT3SAS_ADAPTER *ioc,
1922     Mpi2ConfigReply_t *mpi_reply, Mpi26DriverTriggerPage1_t *config_page);
1923 int
1924 mpt3sas_config_get_driver_trigger_pg2(struct MPT3SAS_ADAPTER *ioc,
1925     Mpi2ConfigReply_t *mpi_reply, Mpi26DriverTriggerPage2_t *config_page);
1926 int
1927 mpt3sas_config_get_driver_trigger_pg3(struct MPT3SAS_ADAPTER *ioc,
1928     Mpi2ConfigReply_t *mpi_reply, Mpi26DriverTriggerPage3_t *config_page);
1929 int
1930 mpt3sas_config_get_driver_trigger_pg4(struct MPT3SAS_ADAPTER *ioc,
1931     Mpi2ConfigReply_t *mpi_reply, Mpi26DriverTriggerPage4_t *config_page);
1932 int
1933 mpt3sas_config_update_driver_trigger_pg1(struct MPT3SAS_ADAPTER *ioc,
1934     struct SL_WH_MASTER_TRIGGER_T *master_tg, bool set);
1935 int
1936 mpt3sas_config_update_driver_trigger_pg2(struct MPT3SAS_ADAPTER *ioc,
1937     struct SL_WH_EVENT_TRIGGERS_T *event_tg, bool set);
1938 int
1939 mpt3sas_config_update_driver_trigger_pg3(struct MPT3SAS_ADAPTER *ioc,
1940     struct SL_WH_SCSI_TRIGGERS_T *scsi_tg, bool set);
1941 int
1942 mpt3sas_config_update_driver_trigger_pg4(struct MPT3SAS_ADAPTER *ioc,
1943     struct SL_WH_MPI_TRIGGERS_T *mpi_tg, bool set);
1944 
1945 /* ctl shared API */
1946 extern const struct attribute_group *mpt3sas_host_groups[];
1947 extern const struct attribute_group *mpt3sas_dev_groups[];
1948 void mpt3sas_ctl_init(ushort hbas_to_enumerate);
1949 void mpt3sas_ctl_exit(ushort hbas_to_enumerate);
1950 u8 mpt3sas_ctl_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1951     u32 reply);
1952 void mpt3sas_ctl_pre_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1953 void mpt3sas_ctl_clear_outstanding_ioctls(struct MPT3SAS_ADAPTER *ioc);
1954 void mpt3sas_ctl_reset_done_handler(struct MPT3SAS_ADAPTER *ioc);
1955 u8 mpt3sas_ctl_event_callback(struct MPT3SAS_ADAPTER *ioc,
1956     u8 msix_index, u32 reply);
1957 void mpt3sas_ctl_add_to_event_log(struct MPT3SAS_ADAPTER *ioc,
1958     Mpi2EventNotificationReply_t *mpi_reply);
1959 
1960 void mpt3sas_enable_diag_buffer(struct MPT3SAS_ADAPTER *ioc,
1961     u8 bits_to_register);
1962 int mpt3sas_send_diag_release(struct MPT3SAS_ADAPTER *ioc, u8 buffer_type,
1963     u8 *issue_reset);
1964 
1965 /* transport shared API */
1966 extern struct scsi_transport_template *mpt3sas_transport_template;
1967 u8 mpt3sas_transport_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1968     u32 reply);
1969 struct _sas_port *mpt3sas_transport_port_add(struct MPT3SAS_ADAPTER *ioc,
1970     u16 handle, u64 sas_address, struct hba_port *port);
1971 void mpt3sas_transport_port_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address,
1972     u64 sas_address_parent, struct hba_port *port);
1973 int mpt3sas_transport_add_host_phy(struct MPT3SAS_ADAPTER *ioc, struct _sas_phy
1974     *mpt3sas_phy, Mpi2SasPhyPage0_t phy_pg0, struct device *parent_dev);
1975 int mpt3sas_transport_add_expander_phy(struct MPT3SAS_ADAPTER *ioc,
1976     struct _sas_phy *mpt3sas_phy, Mpi2ExpanderPage1_t expander_pg1,
1977     struct device *parent_dev);
1978 void mpt3sas_transport_update_links(struct MPT3SAS_ADAPTER *ioc,
1979     u64 sas_address, u16 handle, u8 phy_number, u8 link_rate,
1980     struct hba_port *port);
1981 extern struct sas_function_template mpt3sas_transport_functions;
1982 extern struct scsi_transport_template *mpt3sas_transport_template;
1983 void
1984 mpt3sas_transport_del_phy_from_an_existing_port(struct MPT3SAS_ADAPTER *ioc,
1985     struct _sas_node *sas_node, struct _sas_phy *mpt3sas_phy);
1986 void
1987 mpt3sas_transport_add_phy_to_an_existing_port(struct MPT3SAS_ADAPTER *ioc,
1988     struct _sas_node *sas_node, struct _sas_phy *mpt3sas_phy,
1989     u64 sas_address, struct hba_port *port);
1990 /* trigger data externs */
1991 void mpt3sas_send_trigger_data_event(struct MPT3SAS_ADAPTER *ioc,
1992     struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data);
1993 void mpt3sas_process_trigger_data(struct MPT3SAS_ADAPTER *ioc,
1994     struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data);
1995 void mpt3sas_trigger_master(struct MPT3SAS_ADAPTER *ioc,
1996     u32 trigger_bitmask);
1997 void mpt3sas_trigger_event(struct MPT3SAS_ADAPTER *ioc, u16 event,
1998     u16 log_entry_qualifier);
1999 void mpt3sas_trigger_scsi(struct MPT3SAS_ADAPTER *ioc, u8 sense_key,
2000     u8 asc, u8 ascq);
2001 void mpt3sas_trigger_mpi(struct MPT3SAS_ADAPTER *ioc, u16 ioc_status,
2002     u32 loginfo);
2003 
2004 /* warpdrive APIs */
2005 u8 mpt3sas_get_num_volumes(struct MPT3SAS_ADAPTER *ioc);
2006 void mpt3sas_init_warpdrive_properties(struct MPT3SAS_ADAPTER *ioc,
2007     struct _raid_device *raid_device);
2008 void
2009 mpt3sas_setup_direct_io(struct MPT3SAS_ADAPTER *ioc, struct scsi_cmnd *scmd,
2010     struct _raid_device *raid_device, Mpi25SCSIIORequest_t *mpi_request);
2011 
2012 /* NCQ Prio Handling Check */
2013 bool scsih_ncq_prio_supp(struct scsi_device *sdev);
2014 
2015 void mpt3sas_setup_debugfs(struct MPT3SAS_ADAPTER *ioc);
2016 void mpt3sas_destroy_debugfs(struct MPT3SAS_ADAPTER *ioc);
2017 void mpt3sas_init_debugfs(void);
2018 void mpt3sas_exit_debugfs(void);
2019 
2020 /**
2021  * _scsih_is_pcie_scsi_device - determines if device is an pcie scsi device
2022  * @device_info: bitfield providing information about the device.
2023  * Context: none
2024  *
2025  * Returns 1 if scsi device.
2026  */
2027 static inline int
2028 mpt3sas_scsih_is_pcie_scsi_device(u32 device_info)
2029 {
2030     if ((device_info &
2031         MPI26_PCIE_DEVINFO_MASK_DEVICE_TYPE) == MPI26_PCIE_DEVINFO_SCSI)
2032         return 1;
2033     else
2034         return 0;
2035 }
2036 #endif /* MPT3SAS_BASE_H_INCLUDED */
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