mpt3sas/mpi/mpi2_pci.h

0001 /*
0002  * Copyright 2000-2020 Broadcom Inc. All rights reserved.
0003  *
0004  *
0005  *          Name:  mpi2_pci.h
0006  *         Title:  MPI PCIe Attached Devices structures and definitions.
0007  * Creation Date:  October 9, 2012
0008  *
0009  * mpi2_pci.h Version:  02.00.04
0010  *
0011  * NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
0012  *       prefix are for use only on MPI v2.5 products, and must not be used
0013  *       with MPI v2.0 products. Unless otherwise noted, names beginning with
0014  *       MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products.
0015  *
0016  * Version History
0017  * ---------------
0018  *
0019  * Date      Version   Description
0020  * --------  --------  ------------------------------------------------------
0021  * 03-16-15  02.00.00  Initial version.
0022  * 02-17-16  02.00.01  Removed AHCI support.
0023  *                     Removed SOP support.
0024  * 07-01-16  02.00.02  Added MPI26_NVME_FLAGS_FORCE_ADMIN_ERR_RESP to
0025  *                     NVME Encapsulated Request.
0026  * 07-22-18  02.00.03  Updted flags field for NVME Encapsulated req
0027  * 12-17-18  02.00.04  Added MPI26_PCIE_DEVINFO_SCSI
0028  *          Shortten some defines to be compatible with DOS
0029  * --------------------------------------------------------------------------
0030  */
0031
0032 #ifndef MPI2_PCI_H
0033 #define MPI2_PCI_H
0034
0035
0036 /*
0037  *Values for the PCIe DeviceInfo field used in PCIe Device Status Change Event
0038  *data and PCIe Configuration pages.
0039  */
0040 #define MPI26_PCIE_DEVINFO_DIRECT_ATTACH        (0x00000010)
0041
0042 #define MPI26_PCIE_DEVINFO_MASK_DEVICE_TYPE     (0x0000000F)
0043 #define MPI26_PCIE_DEVINFO_NO_DEVICE            (0x00000000)
0044 #define MPI26_PCIE_DEVINFO_PCI_SWITCH           (0x00000001)
0045 #define MPI26_PCIE_DEVINFO_NVME                 (0x00000003)
0046 #define MPI26_PCIE_DEVINFO_SCSI                 (0x00000004)
0047
0048 /****************************************************************************
0049 *  NVMe Encapsulated message
0050 ****************************************************************************/
0051
0052 /*NVME Encapsulated Request Message */
0053 typedef struct _MPI26_NVME_ENCAPSULATED_REQUEST {
0054     U16 DevHandle;                      /*0x00 */
0055     U8  ChainOffset;                    /*0x02 */
0056     U8  Function;                       /*0x03 */
0057     U16 EncapsulatedCommandLength;      /*0x04 */
0058     U8  Reserved1;                      /*0x06 */
0059     U8  MsgFlags;                       /*0x07 */
0060     U8  VP_ID;                          /*0x08 */
0061     U8  VF_ID;                          /*0x09 */
0062     U16 Reserved2;                      /*0x0A */
0063     U32 Reserved3;                      /*0x0C */
0064     U64 ErrorResponseBaseAddress;       /*0x10 */
0065     U16 ErrorResponseAllocationLength;  /*0x18 */
0066     U16 Flags;                          /*0x1A */
0067     U32 DataLength;                     /*0x1C */
0068     U8  NVMe_Command[4];                /*0x20 */
0069
0070 } MPI26_NVME_ENCAPSULATED_REQUEST, *PTR_MPI26_NVME_ENCAPSULATED_REQUEST,
0071     Mpi26NVMeEncapsulatedRequest_t, *pMpi26NVMeEncapsulatedRequest_t;
0072
0073 /*defines for the Flags field */
0074 #define MPI26_NVME_FLAGS_FORCE_ADMIN_ERR_RESP       (0x0020)
0075 /*Submission Queue Type*/
0076 #define MPI26_NVME_FLAGS_SUBMISSIONQ_MASK           (0x0010)
0077 #define MPI26_NVME_FLAGS_SUBMISSIONQ_IO             (0x0000)
0078 #define MPI26_NVME_FLAGS_SUBMISSIONQ_ADMIN          (0x0010)
0079 /*Error Response Address Space */
0080 #define MPI26_NVME_FLAGS_ERR_RSP_ADDR_MASK          (0x000C)
0081 #define MPI26_NVME_FLAGS_ERR_RSP_ADDR_SYSTEM        (0x0000)
0082 #define MPI26_NVME_FLAGS_ERR_RSP_ADDR_IOCTL         (0x0008)
0083 /* Data Direction*/
0084 #define MPI26_NVME_FLAGS_DATADIRECTION_MASK         (0x0003)
0085 #define MPI26_NVME_FLAGS_NODATATRANSFER             (0x0000)
0086 #define MPI26_NVME_FLAGS_WRITE                      (0x0001)
0087 #define MPI26_NVME_FLAGS_READ                       (0x0002)
0088 #define MPI26_NVME_FLAGS_BIDIRECTIONAL              (0x0003)
0089
0090
0091 /*NVMe Encapuslated Reply Message */
0092 typedef struct _MPI26_NVME_ENCAPSULATED_ERROR_REPLY {
0093     U16 DevHandle;                      /*0x00 */
0094     U8  MsgLength;                      /*0x02 */
0095     U8  Function;                       /*0x03 */
0096     U16 EncapsulatedCommandLength;      /*0x04 */
0097     U8  Reserved1;                      /*0x06 */
0098     U8  MsgFlags;                       /*0x07 */
0099     U8  VP_ID;                          /*0x08 */
0100     U8  VF_ID;                          /*0x09 */
0101     U16 Reserved2;                      /*0x0A */
0102     U16 Reserved3;                      /*0x0C */
0103     U16 IOCStatus;                      /*0x0E */
0104     U32 IOCLogInfo;                     /*0x10 */
0105     U16 ErrorResponseCount;             /*0x14 */
0106     U16 Reserved4;                      /*0x16 */
0107 } MPI26_NVME_ENCAPSULATED_ERROR_REPLY,
0108     *PTR_MPI26_NVME_ENCAPSULATED_ERROR_REPLY,
0109     Mpi26NVMeEncapsulatedErrorReply_t,
0110     *pMpi26NVMeEncapsulatedErrorReply_t;
0111
0112
0113 #endif