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0063 #ifndef MPI2_INIT_H
0064 #define MPI2_INIT_H
0065
0066
0067
0068
0069
0070
0071
0072
0073
0074
0075
0076 typedef struct _MPI2_SCSI_IO_CDB_EEDP32 {
0077 U8 CDB[20];
0078 __be32 PrimaryReferenceTag;
0079 U16 PrimaryApplicationTag;
0080 U16 PrimaryApplicationTagMask;
0081 U32 TransferLength;
0082 } MPI2_SCSI_IO_CDB_EEDP32, *PTR_MPI2_SCSI_IO_CDB_EEDP32,
0083 Mpi2ScsiIoCdbEedp32_t, *pMpi2ScsiIoCdbEedp32_t;
0084
0085
0086 typedef union _MPI2_SCSI_IO_CDB_UNION {
0087 U8 CDB32[32];
0088 MPI2_SCSI_IO_CDB_EEDP32 EEDP32;
0089 MPI2_SGE_SIMPLE_UNION SGE;
0090 } MPI2_SCSI_IO_CDB_UNION, *PTR_MPI2_SCSI_IO_CDB_UNION,
0091 Mpi2ScsiIoCdb_t, *pMpi2ScsiIoCdb_t;
0092
0093
0094 typedef struct _MPI2_SCSI_IO_REQUEST {
0095 U16 DevHandle;
0096 U8 ChainOffset;
0097 U8 Function;
0098 U16 Reserved1;
0099 U8 Reserved2;
0100 U8 MsgFlags;
0101 U8 VP_ID;
0102 U8 VF_ID;
0103 U16 Reserved3;
0104 U32 SenseBufferLowAddress;
0105 U16 SGLFlags;
0106 U8 SenseBufferLength;
0107 U8 Reserved4;
0108 U8 SGLOffset0;
0109 U8 SGLOffset1;
0110 U8 SGLOffset2;
0111 U8 SGLOffset3;
0112 U32 SkipCount;
0113 U32 DataLength;
0114 U32 BidirectionalDataLength;
0115 U16 IoFlags;
0116 U16 EEDPFlags;
0117 U32 EEDPBlockSize;
0118 U32 SecondaryReferenceTag;
0119 U16 SecondaryApplicationTag;
0120 U16 ApplicationTagTranslationMask;
0121 U8 LUN[8];
0122 U32 Control;
0123 MPI2_SCSI_IO_CDB_UNION CDB;
0124
0125 #ifdef MPI2_SCSI_IO_VENDOR_UNIQUE_REGION
0126 MPI2_SCSI_IO_VENDOR_UNIQUE VendorRegion;
0127 #endif
0128
0129 MPI2_SGE_IO_UNION SGL;
0130
0131 } MPI2_SCSI_IO_REQUEST, *PTR_MPI2_SCSI_IO_REQUEST,
0132 Mpi2SCSIIORequest_t, *pMpi2SCSIIORequest_t;
0133
0134
0135
0136
0137 #define MPI2_SCSIIO_MSGFLAGS_MASK_SENSE_ADDR (0x0C)
0138 #define MPI2_SCSIIO_MSGFLAGS_SYSTEM_SENSE_ADDR (0x00)
0139 #define MPI2_SCSIIO_MSGFLAGS_IOCDDR_SENSE_ADDR (0x04)
0140 #define MPI2_SCSIIO_MSGFLAGS_IOCPLB_SENSE_ADDR (0x08)
0141 #define MPI2_SCSIIO_MSGFLAGS_IOCPLBNTA_SENSE_ADDR (0x0C)
0142 #define MPI26_SCSIIO_MSGFLAGS_IOCCTL_SENSE_ADDR (0x08)
0143
0144
0145
0146
0147 #define MPI2_SCSIIO_SGLFLAGS_ADDR_MASK (0x0C)
0148 #define MPI2_SCSIIO_SGLFLAGS_SYSTEM_ADDR (0x00)
0149 #define MPI2_SCSIIO_SGLFLAGS_IOCDDR_ADDR (0x04)
0150 #define MPI2_SCSIIO_SGLFLAGS_IOCPLB_ADDR (0x08)
0151 #define MPI2_SCSIIO_SGLFLAGS_IOCPLBNTA_ADDR (0x0C)
0152
0153
0154 #define MPI2_SCSIIO_SGLFLAGS_TYPE_MASK (0x03)
0155 #define MPI2_SCSIIO_SGLFLAGS_TYPE_MPI (0x00)
0156 #define MPI2_SCSIIO_SGLFLAGS_TYPE_IEEE32 (0x01)
0157 #define MPI2_SCSIIO_SGLFLAGS_TYPE_IEEE64 (0x02)
0158
0159
0160 #define MPI2_SCSIIO_SGLFLAGS_SGL3_SHIFT (12)
0161 #define MPI2_SCSIIO_SGLFLAGS_SGL2_SHIFT (8)
0162 #define MPI2_SCSIIO_SGLFLAGS_SGL1_SHIFT (4)
0163 #define MPI2_SCSIIO_SGLFLAGS_SGL0_SHIFT (0)
0164
0165
0166 #define MPI2_SCSIIO_NUM_SGLOFFSETS (4)
0167
0168
0169
0170
0171 #define MPI2_SCSIIO_CDB_ADDR_MASK (0x6000)
0172 #define MPI2_SCSIIO_CDB_ADDR_SYSTEM (0x0000)
0173 #define MPI2_SCSIIO_CDB_ADDR_IOCDDR (0x2000)
0174 #define MPI2_SCSIIO_CDB_ADDR_IOCPLB (0x4000)
0175 #define MPI2_SCSIIO_CDB_ADDR_IOCPLBNTA (0x6000)
0176
0177 #define MPI2_SCSIIO_IOFLAGS_LARGE_CDB (0x1000)
0178 #define MPI2_SCSIIO_IOFLAGS_BIDIRECTIONAL (0x0800)
0179 #define MPI2_SCSIIO_IOFLAGS_MULTICAST (0x0400)
0180 #define MPI2_SCSIIO_IOFLAGS_CMD_DETERMINES_DATA_DIR (0x0200)
0181 #define MPI2_SCSIIO_IOFLAGS_CDBLENGTH_MASK (0x01FF)
0182
0183
0184
0185 #define MPI2_SCSIIO_EEDPFLAGS_INC_PRI_REFTAG (0x8000)
0186 #define MPI2_SCSIIO_EEDPFLAGS_INC_SEC_REFTAG (0x4000)
0187 #define MPI2_SCSIIO_EEDPFLAGS_INC_PRI_APPTAG (0x2000)
0188 #define MPI2_SCSIIO_EEDPFLAGS_INC_SEC_APPTAG (0x1000)
0189
0190 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_REFTAG (0x0400)
0191 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_APPTAG (0x0200)
0192 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_GUARD (0x0100)
0193
0194 #define MPI2_SCSIIO_EEDPFLAGS_PASSTHRU_REFTAG (0x0008)
0195
0196 #define MPI2_SCSIIO_EEDPFLAGS_MASK_OP (0x0007)
0197 #define MPI2_SCSIIO_EEDPFLAGS_NOOP_OP (0x0000)
0198 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_OP (0x0001)
0199 #define MPI2_SCSIIO_EEDPFLAGS_STRIP_OP (0x0002)
0200 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_REMOVE_OP (0x0003)
0201 #define MPI2_SCSIIO_EEDPFLAGS_INSERT_OP (0x0004)
0202 #define MPI2_SCSIIO_EEDPFLAGS_REPLACE_OP (0x0006)
0203 #define MPI2_SCSIIO_EEDPFLAGS_CHECK_REGEN_OP (0x0007)
0204
0205
0206
0207
0208 #define MPI2_SCSIIO_CONTROL_ADDCDBLEN_MASK (0xFC000000)
0209 #define MPI2_SCSIIO_CONTROL_ADDCDBLEN_SHIFT (26)
0210
0211 #define MPI2_SCSIIO_CONTROL_DATADIRECTION_MASK (0x03000000)
0212 #define MPI2_SCSIIO_CONTROL_SHIFT_DATADIRECTION (24)
0213 #define MPI2_SCSIIO_CONTROL_NODATATRANSFER (0x00000000)
0214 #define MPI2_SCSIIO_CONTROL_WRITE (0x01000000)
0215 #define MPI2_SCSIIO_CONTROL_READ (0x02000000)
0216 #define MPI2_SCSIIO_CONTROL_BIDIRECTIONAL (0x03000000)
0217
0218 #define MPI2_SCSIIO_CONTROL_TASKPRI_MASK (0x00007800)
0219 #define MPI2_SCSIIO_CONTROL_TASKPRI_SHIFT (11)
0220
0221 #define MPI2_SCSIIO_CONTROL_CMDPRI_MASK (0x00007800)
0222 #define MPI2_SCSIIO_CONTROL_CMDPRI_SHIFT (11)
0223
0224 #define MPI2_SCSIIO_CONTROL_TASKATTRIBUTE_MASK (0x00000700)
0225 #define MPI2_SCSIIO_CONTROL_SIMPLEQ (0x00000000)
0226 #define MPI2_SCSIIO_CONTROL_HEADOFQ (0x00000100)
0227 #define MPI2_SCSIIO_CONTROL_ORDEREDQ (0x00000200)
0228 #define MPI2_SCSIIO_CONTROL_ACAQ (0x00000400)
0229
0230 #define MPI2_SCSIIO_CONTROL_TLR_MASK (0x000000C0)
0231 #define MPI2_SCSIIO_CONTROL_NO_TLR (0x00000000)
0232 #define MPI2_SCSIIO_CONTROL_TLR_ON (0x00000040)
0233 #define MPI2_SCSIIO_CONTROL_TLR_OFF (0x00000080)
0234
0235
0236 typedef union _MPI25_SCSI_IO_CDB_UNION {
0237 U8 CDB32[32];
0238 MPI2_SCSI_IO_CDB_EEDP32 EEDP32;
0239 MPI2_IEEE_SGE_SIMPLE64 SGE;
0240 } MPI25_SCSI_IO_CDB_UNION, *PTR_MPI25_SCSI_IO_CDB_UNION,
0241 Mpi25ScsiIoCdb_t, *pMpi25ScsiIoCdb_t;
0242
0243
0244 typedef struct _MPI25_SCSI_IO_REQUEST {
0245 U16 DevHandle;
0246 U8 ChainOffset;
0247 U8 Function;
0248 U16 Reserved1;
0249 U8 Reserved2;
0250 U8 MsgFlags;
0251 U8 VP_ID;
0252 U8 VF_ID;
0253 U16 Reserved3;
0254 U32 SenseBufferLowAddress;
0255 U8 DMAFlags;
0256 U8 Reserved5;
0257 U8 SenseBufferLength;
0258 U8 Reserved4;
0259 U8 SGLOffset0;
0260 U8 SGLOffset1;
0261 U8 SGLOffset2;
0262 U8 SGLOffset3;
0263 U32 SkipCount;
0264 U32 DataLength;
0265 U32 BidirectionalDataLength;
0266 U16 IoFlags;
0267 U16 EEDPFlags;
0268 U16 EEDPBlockSize;
0269 U16 Reserved6;
0270 U32 SecondaryReferenceTag;
0271 U16 SecondaryApplicationTag;
0272 U16 ApplicationTagTranslationMask;
0273 U8 LUN[8];
0274 U32 Control;
0275 MPI25_SCSI_IO_CDB_UNION CDB;
0276
0277 #ifdef MPI25_SCSI_IO_VENDOR_UNIQUE_REGION
0278 MPI25_SCSI_IO_VENDOR_UNIQUE VendorRegion;
0279 #endif
0280
0281 MPI25_SGE_IO_UNION SGL;
0282
0283 } MPI25_SCSI_IO_REQUEST, *PTR_MPI25_SCSI_IO_REQUEST,
0284 Mpi25SCSIIORequest_t, *pMpi25SCSIIORequest_t;
0285
0286
0287
0288
0289
0290
0291
0292
0293
0294
0295 #define MPI25_SCSIIO_DMAFLAGS_OP_MASK (0x0F)
0296 #define MPI25_SCSIIO_DMAFLAGS_OP_D_D_D_D (0x00)
0297 #define MPI25_SCSIIO_DMAFLAGS_OP_D_D_D_C (0x01)
0298 #define MPI25_SCSIIO_DMAFLAGS_OP_D_D_D_I (0x02)
0299 #define MPI25_SCSIIO_DMAFLAGS_OP_D_D_C_C (0x03)
0300 #define MPI25_SCSIIO_DMAFLAGS_OP_D_D_C_I (0x04)
0301 #define MPI25_SCSIIO_DMAFLAGS_OP_D_D_I_I (0x05)
0302 #define MPI25_SCSIIO_DMAFLAGS_OP_D_C_C_C (0x06)
0303 #define MPI25_SCSIIO_DMAFLAGS_OP_D_C_C_I (0x07)
0304 #define MPI25_SCSIIO_DMAFLAGS_OP_D_C_I_I (0x08)
0305 #define MPI25_SCSIIO_DMAFLAGS_OP_D_I_I_I (0x09)
0306 #define MPI25_SCSIIO_DMAFLAGS_OP_D_H_D_D (0x0A)
0307 #define MPI25_SCSIIO_DMAFLAGS_OP_D_H_D_C (0x0B)
0308 #define MPI25_SCSIIO_DMAFLAGS_OP_D_H_D_I (0x0C)
0309 #define MPI25_SCSIIO_DMAFLAGS_OP_D_H_C_C (0x0D)
0310 #define MPI25_SCSIIO_DMAFLAGS_OP_D_H_C_I (0x0E)
0311 #define MPI25_SCSIIO_DMAFLAGS_OP_D_H_I_I (0x0F)
0312
0313
0314 #define MPI25_SCSIIO_NUM_SGLOFFSETS (4)
0315
0316
0317 #define MPI25_SCSIIO_IOFLAGS_IO_PATH_MASK (0xC000)
0318 #define MPI25_SCSIIO_IOFLAGS_NORMAL_PATH (0x0000)
0319 #define MPI25_SCSIIO_IOFLAGS_FAST_PATH (0x4000)
0320
0321 #define MPI26_SCSIIO_IOFLAGS_ESCAPE_PASSTHROUGH (0x2000)
0322 #define MPI25_SCSIIO_IOFLAGS_LARGE_CDB (0x1000)
0323 #define MPI25_SCSIIO_IOFLAGS_BIDIRECTIONAL (0x0800)
0324 #define MPI26_SCSIIO_IOFLAGS_PORT_REQUEST (0x0400)
0325 #define MPI25_SCSIIO_IOFLAGS_CDBLENGTH_MASK (0x01FF)
0326
0327
0328
0329 #define MPI25_SCSIIO_EEDPFLAGS_ESCAPE_MODE_MASK (0x00C0)
0330 #define MPI25_SCSIIO_EEDPFLAGS_COMPATIBLE_MODE (0x0000)
0331 #define MPI25_SCSIIO_EEDPFLAGS_DO_NOT_DISABLE_MODE (0x0040)
0332 #define MPI25_SCSIIO_EEDPFLAGS_APPTAG_DISABLE_MODE (0x0080)
0333 #define MPI25_SCSIIO_EEDPFLAGS_APPTAG_REFTAG_DISABLE_MODE (0x00C0)
0334
0335 #define MPI25_SCSIIO_EEDPFLAGS_HOST_GUARD_METHOD_MASK (0x0030)
0336 #define MPI25_SCSIIO_EEDPFLAGS_T10_CRC_HOST_GUARD (0x0000)
0337 #define MPI25_SCSIIO_EEDPFLAGS_IP_CHKSUM_HOST_GUARD (0x0010)
0338
0339
0340
0341
0342
0343
0344
0345
0346
0347
0348 typedef struct _MPI2_SCSI_IO_REPLY {
0349 U16 DevHandle;
0350 U8 MsgLength;
0351 U8 Function;
0352 U16 Reserved1;
0353 U8 Reserved2;
0354 U8 MsgFlags;
0355 U8 VP_ID;
0356 U8 VF_ID;
0357 U16 Reserved3;
0358 U8 SCSIStatus;
0359 U8 SCSIState;
0360 U16 IOCStatus;
0361 U32 IOCLogInfo;
0362 U32 TransferCount;
0363 U32 SenseCount;
0364 U32 ResponseInfo;
0365 U16 TaskTag;
0366 U16 SCSIStatusQualifier;
0367 U32 BidirectionalTransferCount;
0368
0369 U32 EEDPErrorOffset;
0370
0371 U16 EEDPObservedAppTag;
0372
0373 U16 EEDPObservedGuard;
0374
0375 U32 EEDPObservedRefTag;
0376 } MPI2_SCSI_IO_REPLY, *PTR_MPI2_SCSI_IO_REPLY,
0377 Mpi2SCSIIOReply_t, *pMpi2SCSIIOReply_t;
0378
0379
0380 #define MPI26_SCSIIO_REPLY_MSGFLAGS_REFTAG_OBSERVED_VALID (0x01)
0381 #define MPI26_SCSIIO_REPLY_MSGFLAGS_GUARD_OBSERVED_VALID (0x02)
0382 #define MPI26_SCSIIO_REPLY_MSGFLAGS_APPTAG_OBSERVED_VALID (0x04)
0383
0384
0385
0386 #define MPI2_SCSI_STATUS_GOOD (0x00)
0387 #define MPI2_SCSI_STATUS_CHECK_CONDITION (0x02)
0388 #define MPI2_SCSI_STATUS_CONDITION_MET (0x04)
0389 #define MPI2_SCSI_STATUS_BUSY (0x08)
0390 #define MPI2_SCSI_STATUS_INTERMEDIATE (0x10)
0391 #define MPI2_SCSI_STATUS_INTERMEDIATE_CONDMET (0x14)
0392 #define MPI2_SCSI_STATUS_RESERVATION_CONFLICT (0x18)
0393 #define MPI2_SCSI_STATUS_COMMAND_TERMINATED (0x22)
0394 #define MPI2_SCSI_STATUS_TASK_SET_FULL (0x28)
0395 #define MPI2_SCSI_STATUS_ACA_ACTIVE (0x30)
0396 #define MPI2_SCSI_STATUS_TASK_ABORTED (0x40)
0397
0398
0399
0400 #define MPI2_SCSI_STATE_RESPONSE_INFO_VALID (0x10)
0401 #define MPI2_SCSI_STATE_TERMINATED (0x08)
0402 #define MPI2_SCSI_STATE_NO_SCSI_STATUS (0x04)
0403 #define MPI2_SCSI_STATE_AUTOSENSE_FAILED (0x02)
0404 #define MPI2_SCSI_STATE_AUTOSENSE_VALID (0x01)
0405
0406
0407
0408 #define MPI2_SCSI_RI_MASK_REASONCODE (0x000000FF)
0409 #define MPI2_SCSI_RI_SHIFT_REASONCODE (0)
0410
0411 #define MPI2_SCSI_TASKTAG_UNKNOWN (0xFFFF)
0412
0413
0414
0415
0416
0417
0418 typedef struct _MPI2_SCSI_TASK_MANAGE_REQUEST {
0419 U16 DevHandle;
0420 U8 ChainOffset;
0421 U8 Function;
0422 U8 Reserved1;
0423 U8 TaskType;
0424 U8 Reserved2;
0425 U8 MsgFlags;
0426 U8 VP_ID;
0427 U8 VF_ID;
0428 U16 Reserved3;
0429 U8 LUN[8];
0430 U32 Reserved4[7];
0431 U16 TaskMID;
0432 U16 Reserved5;
0433 } MPI2_SCSI_TASK_MANAGE_REQUEST,
0434 *PTR_MPI2_SCSI_TASK_MANAGE_REQUEST,
0435 Mpi2SCSITaskManagementRequest_t,
0436 *pMpi2SCSITaskManagementRequest_t;
0437
0438
0439
0440 #define MPI2_SCSITASKMGMT_TASKTYPE_ABORT_TASK (0x01)
0441 #define MPI2_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET (0x02)
0442 #define MPI2_SCSITASKMGMT_TASKTYPE_TARGET_RESET (0x03)
0443 #define MPI2_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET (0x05)
0444 #define MPI2_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET (0x06)
0445 #define MPI2_SCSITASKMGMT_TASKTYPE_QUERY_TASK (0x07)
0446 #define MPI2_SCSITASKMGMT_TASKTYPE_CLR_ACA (0x08)
0447 #define MPI2_SCSITASKMGMT_TASKTYPE_QRY_TASK_SET (0x09)
0448 #define MPI2_SCSITASKMGMT_TASKTYPE_QRY_ASYNC_EVENT (0x0A)
0449
0450
0451 #define MPI2_SCSITASKMGMT_TASKTYPE_QRY_UNIT_ATTENTION \
0452 (MPI2_SCSITASKMGMT_TASKTYPE_QRY_ASYNC_EVENT)
0453
0454
0455
0456 #define MPI2_SCSITASKMGMT_MSGFLAGS_MASK_TARGET_RESET (0x18)
0457 #define MPI26_SCSITASKMGMT_MSGFLAGS_HOT_RESET_PCIE (0x00)
0458 #define MPI2_SCSITASKMGMT_MSGFLAGS_LINK_RESET (0x00)
0459 #define MPI2_SCSITASKMGMT_MSGFLAGS_NEXUS_RESET_SRST (0x08)
0460 #define MPI2_SCSITASKMGMT_MSGFLAGS_SAS_HARD_LINK_RESET (0x10)
0461
0462 #define MPI2_SCSITASKMGMT_MSGFLAGS_DO_NOT_SEND_TASK_IU (0x01)
0463 #define MPI26_SCSITASKMGMT_MSGFLAGS_PROTOCOL_LVL_RST_PCIE (0x18)
0464
0465
0466 typedef struct _MPI2_SCSI_TASK_MANAGE_REPLY {
0467 U16 DevHandle;
0468 U8 MsgLength;
0469 U8 Function;
0470 U8 ResponseCode;
0471 U8 TaskType;
0472 U8 Reserved1;
0473 U8 MsgFlags;
0474 U8 VP_ID;
0475 U8 VF_ID;
0476 U16 Reserved2;
0477 U16 Reserved3;
0478 U16 IOCStatus;
0479 U32 IOCLogInfo;
0480 U32 TerminationCount;
0481 U32 ResponseInfo;
0482 } MPI2_SCSI_TASK_MANAGE_REPLY,
0483 *PTR_MPI2_SCSI_TASK_MANAGE_REPLY,
0484 Mpi2SCSITaskManagementReply_t, *pMpi2SCSIManagementReply_t;
0485
0486
0487
0488 #define MPI2_SCSITASKMGMT_RSP_TM_COMPLETE (0x00)
0489 #define MPI2_SCSITASKMGMT_RSP_INVALID_FRAME (0x02)
0490 #define MPI2_SCSITASKMGMT_RSP_TM_NOT_SUPPORTED (0x04)
0491 #define MPI2_SCSITASKMGMT_RSP_TM_FAILED (0x05)
0492 #define MPI2_SCSITASKMGMT_RSP_TM_SUCCEEDED (0x08)
0493 #define MPI2_SCSITASKMGMT_RSP_TM_INVALID_LUN (0x09)
0494 #define MPI2_SCSITASKMGMT_RSP_TM_OVERLAPPED_TAG (0x0A)
0495 #define MPI2_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC (0x80)
0496
0497
0498
0499 #define MPI2_SCSITASKMGMT_RI_MASK_REASONCODE (0x000000FF)
0500 #define MPI2_SCSITASKMGMT_RI_SHIFT_REASONCODE (0)
0501 #define MPI2_SCSITASKMGMT_RI_MASK_ARI2 (0x0000FF00)
0502 #define MPI2_SCSITASKMGMT_RI_SHIFT_ARI2 (8)
0503 #define MPI2_SCSITASKMGMT_RI_MASK_ARI1 (0x00FF0000)
0504 #define MPI2_SCSITASKMGMT_RI_SHIFT_ARI1 (16)
0505 #define MPI2_SCSITASKMGMT_RI_MASK_ARI0 (0xFF000000)
0506 #define MPI2_SCSITASKMGMT_RI_SHIFT_ARI0 (24)
0507
0508
0509
0510
0511
0512
0513 typedef struct _MPI2_SEP_REQUEST {
0514 U16 DevHandle;
0515 U8 ChainOffset;
0516 U8 Function;
0517 U8 Action;
0518 U8 Flags;
0519 U8 Reserved1;
0520 U8 MsgFlags;
0521 U8 VP_ID;
0522 U8 VF_ID;
0523 U16 Reserved2;
0524 U32 SlotStatus;
0525 U32 Reserved3;
0526 U32 Reserved4;
0527 U32 Reserved5;
0528 U16 Slot;
0529 U16 EnclosureHandle;
0530 } MPI2_SEP_REQUEST, *PTR_MPI2_SEP_REQUEST,
0531 Mpi2SepRequest_t, *pMpi2SepRequest_t;
0532
0533
0534 #define MPI2_SEP_REQ_ACTION_WRITE_STATUS (0x00)
0535 #define MPI2_SEP_REQ_ACTION_READ_STATUS (0x01)
0536
0537
0538 #define MPI2_SEP_REQ_FLAGS_DEVHANDLE_ADDRESS (0x00)
0539 #define MPI2_SEP_REQ_FLAGS_ENCLOSURE_SLOT_ADDRESS (0x01)
0540
0541
0542 #define MPI2_SEP_REQ_SLOTSTATUS_DEV_OFF (0x00080000)
0543 #define MPI2_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE (0x00040000)
0544 #define MPI2_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
0545 #define MPI2_SEP_REQ_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
0546 #define MPI2_SEP_REQ_SLOTSTATUS_HOT_SPARE (0x00000100)
0547 #define MPI2_SEP_REQ_SLOTSTATUS_UNCONFIGURED (0x00000080)
0548 #define MPI2_SEP_REQ_SLOTSTATUS_PREDICTED_FAULT (0x00000040)
0549 #define MPI2_SEP_REQ_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010)
0550 #define MPI2_SEP_REQ_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008)
0551 #define MPI2_SEP_REQ_SLOTSTATUS_DEV_REBUILDING (0x00000004)
0552 #define MPI2_SEP_REQ_SLOTSTATUS_DEV_FAULTY (0x00000002)
0553 #define MPI2_SEP_REQ_SLOTSTATUS_NO_ERROR (0x00000001)
0554
0555
0556 typedef struct _MPI2_SEP_REPLY {
0557 U16 DevHandle;
0558 U8 MsgLength;
0559 U8 Function;
0560 U8 Action;
0561 U8 Flags;
0562 U8 Reserved1;
0563 U8 MsgFlags;
0564 U8 VP_ID;
0565 U8 VF_ID;
0566 U16 Reserved2;
0567 U16 Reserved3;
0568 U16 IOCStatus;
0569 U32 IOCLogInfo;
0570 U32 SlotStatus;
0571 U32 Reserved4;
0572 U16 Slot;
0573 U16 EnclosureHandle;
0574 } MPI2_SEP_REPLY, *PTR_MPI2_SEP_REPLY,
0575 Mpi2SepReply_t, *pMpi2SepReply_t;
0576
0577
0578 #define MPI2_SEP_REPLY_SLOTSTATUS_DEV_OFF (0x00080000)
0579 #define MPI2_SEP_REPLY_SLOTSTATUS_REMOVE_READY (0x00040000)
0580 #define MPI2_SEP_REPLY_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
0581 #define MPI2_SEP_REPLY_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
0582 #define MPI2_SEP_REPLY_SLOTSTATUS_HOT_SPARE (0x00000100)
0583 #define MPI2_SEP_REPLY_SLOTSTATUS_UNCONFIGURED (0x00000080)
0584 #define MPI2_SEP_REPLY_SLOTSTATUS_PREDICTED_FAULT (0x00000040)
0585 #define MPI2_SEP_REPLY_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010)
0586 #define MPI2_SEP_REPLY_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008)
0587 #define MPI2_SEP_REPLY_SLOTSTATUS_DEV_REBUILDING (0x00000004)
0588 #define MPI2_SEP_REPLY_SLOTSTATUS_DEV_FAULTY (0x00000002)
0589 #define MPI2_SEP_REPLY_SLOTSTATUS_NO_ERROR (0x00000001)
0590
0591 #endif