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0006 #ifndef MPI30_IMAGE_H
0007 #define MPI30_IMAGE_H 1
0008 struct mpi3_comp_image_version {
0009 __le16 build_num;
0010 __le16 customer_id;
0011 u8 phase_minor;
0012 u8 phase_major;
0013 u8 gen_minor;
0014 u8 gen_major;
0015 };
0016
0017 struct mpi3_hash_exclusion_format {
0018 __le32 offset;
0019 __le32 size;
0020 };
0021
0022 #define MPI3_IMAGE_HASH_EXCUSION_NUM (4)
0023 struct mpi3_component_image_header {
0024 __le32 signature0;
0025 __le32 load_address;
0026 __le32 data_size;
0027 __le32 start_offset;
0028 __le32 signature1;
0029 __le32 flash_offset;
0030 __le32 image_size;
0031 __le32 version_string_offset;
0032 __le32 build_date_string_offset;
0033 __le32 build_time_string_offset;
0034 __le32 environment_variable_offset;
0035 __le32 application_specific;
0036 __le32 signature2;
0037 __le32 header_size;
0038 __le32 crc;
0039 __le32 flags;
0040 __le32 secondary_flash_offset;
0041 __le32 etp_offset;
0042 __le32 etp_size;
0043 union mpi3_version_union rmc_interface_version;
0044 union mpi3_version_union etp_interface_version;
0045 struct mpi3_comp_image_version component_image_version;
0046 struct mpi3_hash_exclusion_format hash_exclusion[MPI3_IMAGE_HASH_EXCUSION_NUM];
0047 __le32 next_image_header_offset;
0048 union mpi3_version_union security_version;
0049 __le32 reserved84[31];
0050 };
0051
0052 #define MPI3_IMAGE_HEADER_SIGNATURE0_MPI3 (0xeb00003e)
0053 #define MPI3_IMAGE_HEADER_LOAD_ADDRESS_INVALID (0x00000000)
0054 #define MPI3_IMAGE_HEADER_SIGNATURE1_APPLICATION (0x20505041)
0055 #define MPI3_IMAGE_HEADER_SIGNATURE1_FIRST_MUTABLE (0x20434d46)
0056 #define MPI3_IMAGE_HEADER_SIGNATURE1_BSP (0x20505342)
0057 #define MPI3_IMAGE_HEADER_SIGNATURE1_ROM_BIOS (0x534f4942)
0058 #define MPI3_IMAGE_HEADER_SIGNATURE1_HII_X64 (0x4d494948)
0059 #define MPI3_IMAGE_HEADER_SIGNATURE1_HII_ARM (0x41494948)
0060 #define MPI3_IMAGE_HEADER_SIGNATURE1_CPLD (0x444c5043)
0061 #define MPI3_IMAGE_HEADER_SIGNATURE1_SPD (0x20445053)
0062 #define MPI3_IMAGE_HEADER_SIGNATURE1_GAS_GAUGE (0x20534147)
0063 #define MPI3_IMAGE_HEADER_SIGNATURE1_PBLP (0x504c4250)
0064 #define MPI3_IMAGE_HEADER_SIGNATURE1_MANIFEST (0x464e414d)
0065 #define MPI3_IMAGE_HEADER_SIGNATURE1_OEM (0x204d454f)
0066 #define MPI3_IMAGE_HEADER_SIGNATURE2_VALUE (0x50584546)
0067 #define MPI3_IMAGE_HEADER_FLAGS_DEVICE_KEY_BASIS_MASK (0x00000030)
0068 #define MPI3_IMAGE_HEADER_FLAGS_DEVICE_KEY_BASIS_CDI (0x00000000)
0069 #define MPI3_IMAGE_HEADER_FLAGS_DEVICE_KEY_BASIS_DI (0x00000010)
0070 #define MPI3_IMAGE_HEADER_FLAGS_SIGNED_NVDATA (0x00000008)
0071 #define MPI3_IMAGE_HEADER_FLAGS_REQUIRES_ACTIVATION (0x00000004)
0072 #define MPI3_IMAGE_HEADER_FLAGS_COMPRESSED (0x00000002)
0073 #define MPI3_IMAGE_HEADER_FLAGS_FLASH (0x00000001)
0074 #define MPI3_IMAGE_HEADER_SIGNATURE0_OFFSET (0x00)
0075 #define MPI3_IMAGE_HEADER_LOAD_ADDRESS_OFFSET (0x04)
0076 #define MPI3_IMAGE_HEADER_DATA_SIZE_OFFSET (0x08)
0077 #define MPI3_IMAGE_HEADER_START_OFFSET_OFFSET (0x0c)
0078 #define MPI3_IMAGE_HEADER_SIGNATURE1_OFFSET (0x10)
0079 #define MPI3_IMAGE_HEADER_FLASH_OFFSET_OFFSET (0x14)
0080 #define MPI3_IMAGE_HEADER_FLASH_SIZE_OFFSET (0x18)
0081 #define MPI3_IMAGE_HEADER_VERSION_STRING_OFFSET_OFFSET (0x1c)
0082 #define MPI3_IMAGE_HEADER_BUILD_DATE_STRING_OFFSET_OFFSET (0x20)
0083 #define MPI3_IMAGE_HEADER_BUILD_TIME_OFFSET_OFFSET (0x24)
0084 #define MPI3_IMAGE_HEADER_ENVIROMENT_VAR_OFFSET_OFFSET (0x28)
0085 #define MPI3_IMAGE_HEADER_APPLICATION_SPECIFIC_OFFSET (0x2c)
0086 #define MPI3_IMAGE_HEADER_SIGNATURE2_OFFSET (0x30)
0087 #define MPI3_IMAGE_HEADER_HEADER_SIZE_OFFSET (0x34)
0088 #define MPI3_IMAGE_HEADER_CRC_OFFSET (0x38)
0089 #define MPI3_IMAGE_HEADER_FLAGS_OFFSET (0x3c)
0090 #define MPI3_IMAGE_HEADER_SECONDARY_FLASH_OFFSET_OFFSET (0x40)
0091 #define MPI3_IMAGE_HEADER_ETP_OFFSET_OFFSET (0x44)
0092 #define MPI3_IMAGE_HEADER_ETP_SIZE_OFFSET (0x48)
0093 #define MPI3_IMAGE_HEADER_RMC_INTERFACE_VER_OFFSET (0x4c)
0094 #define MPI3_IMAGE_HEADER_ETP_INTERFACE_VER_OFFSET (0x50)
0095 #define MPI3_IMAGE_HEADER_COMPONENT_IMAGE_VER_OFFSET (0x54)
0096 #define MPI3_IMAGE_HEADER_HASH_EXCLUSION_OFFSET (0x5c)
0097 #define MPI3_IMAGE_HEADER_NEXT_IMAGE_HEADER_OFFSET_OFFSET (0x7c)
0098 #define MPI3_IMAGE_HEADER_SIZE (0x100)
0099 #ifndef MPI3_CI_MANIFEST_MPI_MAX
0100 #define MPI3_CI_MANIFEST_MPI_MAX (1)
0101 #endif
0102 struct mpi3_ci_manifest_mpi_comp_image_ref {
0103 __le32 signature1;
0104 __le32 reserved04[3];
0105 struct mpi3_comp_image_version component_image_version;
0106 __le32 component_image_version_string_offset;
0107 __le32 crc;
0108 };
0109
0110 struct mpi3_ci_manifest_mpi {
0111 u8 manifest_type;
0112 u8 reserved01[3];
0113 __le32 reserved04[3];
0114 u8 num_image_references;
0115 u8 release_level;
0116 __le16 reserved12;
0117 __le16 reserved14;
0118 __le16 flags;
0119 __le32 reserved18[2];
0120 __le16 vendor_id;
0121 __le16 device_id;
0122 __le16 subsystem_vendor_id;
0123 __le16 subsystem_id;
0124 __le32 reserved28[2];
0125 union mpi3_version_union package_security_version;
0126 __le32 reserved34;
0127 struct mpi3_comp_image_version package_version;
0128 __le32 package_version_string_offset;
0129 __le32 package_build_date_string_offset;
0130 __le32 package_build_time_string_offset;
0131 __le32 reserved4c;
0132 __le32 diag_authorization_identifier[16];
0133 struct mpi3_ci_manifest_mpi_comp_image_ref component_image_ref[MPI3_CI_MANIFEST_MPI_MAX];
0134 };
0135
0136 #define MPI3_CI_MANIFEST_MPI_RELEASE_LEVEL_DEV (0x00)
0137 #define MPI3_CI_MANIFEST_MPI_RELEASE_LEVEL_PREALPHA (0x10)
0138 #define MPI3_CI_MANIFEST_MPI_RELEASE_LEVEL_ALPHA (0x20)
0139 #define MPI3_CI_MANIFEST_MPI_RELEASE_LEVEL_BETA (0x30)
0140 #define MPI3_CI_MANIFEST_MPI_RELEASE_LEVEL_RC (0x40)
0141 #define MPI3_CI_MANIFEST_MPI_RELEASE_LEVEL_GCA (0x50)
0142 #define MPI3_CI_MANIFEST_MPI_RELEASE_LEVEL_POINT (0x60)
0143 #define MPI3_CI_MANIFEST_MPI_FLAGS_DIAG_AUTHORIZATION (0x01)
0144 #define MPI3_CI_MANIFEST_MPI_SUBSYSTEMID_IGNORED (0xffff)
0145 #define MPI3_CI_MANIFEST_MPI_PKG_VER_STR_OFF_UNSPECIFIED (0x00000000)
0146 #define MPI3_CI_MANIFEST_MPI_PKG_BUILD_DATE_STR_OFF_UNSPECIFIED (0x00000000)
0147 #define MPI3_CI_MANIFEST_MPI_PKG_BUILD_TIME_STR_OFF_UNSPECIFIED (0x00000000)
0148 union mpi3_ci_manifest {
0149 struct mpi3_ci_manifest_mpi mpi;
0150 __le32 dword[1];
0151 };
0152
0153 #define MPI3_CI_MANIFEST_TYPE_MPI (0x00)
0154 struct mpi3_extended_image_header {
0155 u8 image_type;
0156 u8 reserved01[3];
0157 __le32 checksum;
0158 __le32 image_size;
0159 __le32 next_image_header_offset;
0160 __le32 reserved10[4];
0161 __le32 identify_string[8];
0162 };
0163
0164 #define MPI3_EXT_IMAGE_IMAGETYPE_OFFSET (0x00)
0165 #define MPI3_EXT_IMAGE_IMAGESIZE_OFFSET (0x08)
0166 #define MPI3_EXT_IMAGE_NEXTIMAGE_OFFSET (0x0c)
0167 #define MPI3_EXT_IMAGE_HEADER_SIZE (0x40)
0168 #define MPI3_EXT_IMAGE_TYPE_UNSPECIFIED (0x00)
0169 #define MPI3_EXT_IMAGE_TYPE_NVDATA (0x03)
0170 #define MPI3_EXT_IMAGE_TYPE_SUPPORTED_DEVICES (0x07)
0171 #define MPI3_EXT_IMAGE_TYPE_ENCRYPTED_HASH (0x09)
0172 #define MPI3_EXT_IMAGE_TYPE_RDE (0x0a)
0173 #define MPI3_EXT_IMAGE_TYPE_AUXILIARY_PROCESSOR (0x0b)
0174 #define MPI3_EXT_IMAGE_TYPE_MIN_PRODUCT_SPECIFIC (0x80)
0175 #define MPI3_EXT_IMAGE_TYPE_MAX_PRODUCT_SPECIFIC (0xff)
0176 struct mpi3_supported_device {
0177 __le16 device_id;
0178 __le16 vendor_id;
0179 __le16 device_id_mask;
0180 __le16 reserved06;
0181 u8 low_pci_rev;
0182 u8 high_pci_rev;
0183 __le16 reserved0a;
0184 __le32 reserved0c;
0185 };
0186
0187 #ifndef MPI3_SUPPORTED_DEVICE_MAX
0188 #define MPI3_SUPPORTED_DEVICE_MAX (1)
0189 #endif
0190 struct mpi3_supported_devices_data {
0191 u8 image_version;
0192 u8 reserved01;
0193 u8 num_devices;
0194 u8 reserved03;
0195 __le32 reserved04;
0196 struct mpi3_supported_device supported_device[MPI3_SUPPORTED_DEVICE_MAX];
0197 };
0198
0199 #ifndef MPI3_ENCRYPTED_HASH_MAX
0200 #define MPI3_ENCRYPTED_HASH_MAX (1)
0201 #endif
0202 struct mpi3_encrypted_hash_entry {
0203 u8 hash_image_type;
0204 u8 hash_algorithm;
0205 u8 encryption_algorithm;
0206 u8 reserved03;
0207 __le32 reserved04;
0208 __le32 encrypted_hash[MPI3_ENCRYPTED_HASH_MAX];
0209 };
0210
0211 #define MPI3_HASH_IMAGE_TYPE_KEY_WITH_SIGNATURE (0x03)
0212 #define MPI3_HASH_ALGORITHM_VERSION_MASK (0xe0)
0213 #define MPI3_HASH_ALGORITHM_VERSION_NONE (0x00)
0214 #define MPI3_HASH_ALGORITHM_VERSION_SHA1 (0x20)
0215 #define MPI3_HASH_ALGORITHM_VERSION_SHA2 (0x40)
0216 #define MPI3_HASH_ALGORITHM_VERSION_SHA3 (0x60)
0217 #define MPI3_HASH_ALGORITHM_SIZE_MASK (0x1f)
0218 #define MPI3_HASH_ALGORITHM_SIZE_UNUSED (0x00)
0219 #define MPI3_HASH_ALGORITHM_SIZE_SHA256 (0x01)
0220 #define MPI3_HASH_ALGORITHM_SIZE_SHA512 (0x02)
0221 #define MPI3_HASH_ALGORITHM_SIZE_SHA384 (0x03)
0222 #define MPI3_ENCRYPTION_ALGORITHM_UNUSED (0x00)
0223 #define MPI3_ENCRYPTION_ALGORITHM_RSA256 (0x01)
0224 #define MPI3_ENCRYPTION_ALGORITHM_RSA512 (0x02)
0225 #define MPI3_ENCRYPTION_ALGORITHM_RSA1024 (0x03)
0226 #define MPI3_ENCRYPTION_ALGORITHM_RSA2048 (0x04)
0227 #define MPI3_ENCRYPTION_ALGORITHM_RSA4096 (0x05)
0228 #define MPI3_ENCRYPTION_ALGORITHM_RSA3072 (0x06)
0229 #ifndef MPI3_PUBLIC_KEY_MAX
0230 #define MPI3_PUBLIC_KEY_MAX (1)
0231 #endif
0232 struct mpi3_encrypted_key_with_hash_entry {
0233 u8 hash_image_type;
0234 u8 hash_algorithm;
0235 u8 encryption_algorithm;
0236 u8 reserved03;
0237 __le32 reserved04;
0238 __le32 public_key[MPI3_PUBLIC_KEY_MAX];
0239 };
0240
0241 #ifndef MPI3_ENCRYPTED_HASH_ENTRY_MAX
0242 #define MPI3_ENCRYPTED_HASH_ENTRY_MAX (1)
0243 #endif
0244 struct mpi3_encrypted_hash_data {
0245 u8 image_version;
0246 u8 num_hash;
0247 __le16 reserved02;
0248 __le32 reserved04;
0249 struct mpi3_encrypted_hash_entry encrypted_hash_entry[MPI3_ENCRYPTED_HASH_ENTRY_MAX];
0250 };
0251
0252 #ifndef MPI3_AUX_PROC_DATA_MAX
0253 #define MPI3_AUX_PROC_DATA_MAX (1)
0254 #endif
0255 struct mpi3_aux_processor_data {
0256 u8 boot_method;
0257 u8 num_load_addr;
0258 u8 reserved02;
0259 u8 type;
0260 __le32 version;
0261 __le32 load_address[8];
0262 __le32 reserved28[22];
0263 __le32 aux_processor_data[MPI3_AUX_PROC_DATA_MAX];
0264 };
0265
0266 #define MPI3_AUX_PROC_DATA_OFFSET (0x80)
0267 #define MPI3_AUXPROCESSOR_BOOT_METHOD_MO_MSG (0x00)
0268 #define MPI3_AUXPROCESSOR_BOOT_METHOD_MO_DOORBELL (0x01)
0269 #define MPI3_AUXPROCESSOR_BOOT_METHOD_COMPONENT (0x02)
0270 #define MPI3_AUXPROCESSOR_TYPE_ARM_A15 (0x00)
0271 #define MPI3_AUXPROCESSOR_TYPE_ARM_M0 (0x01)
0272 #define MPI3_AUXPROCESSOR_TYPE_ARM_R4 (0x02)
0273 #endif
