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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * SCSI low-level driver for the 53c94 SCSI bus adaptor found
0004  * on Power Macintosh computers, controlling the external SCSI chain.
0005  * We assume the 53c94 is connected to a DBDMA (descriptor-based DMA)
0006  * controller.
0007  *
0008  * Paul Mackerras, August 1996.
0009  * Copyright (C) 1996 Paul Mackerras.
0010  */
0011 #include <linux/kernel.h>
0012 #include <linux/delay.h>
0013 #include <linux/types.h>
0014 #include <linux/string.h>
0015 #include <linux/slab.h>
0016 #include <linux/blkdev.h>
0017 #include <linux/proc_fs.h>
0018 #include <linux/stat.h>
0019 #include <linux/spinlock.h>
0020 #include <linux/interrupt.h>
0021 #include <linux/module.h>
0022 #include <linux/pci.h>
0023 #include <linux/pgtable.h>
0024 #include <asm/dbdma.h>
0025 #include <asm/io.h>
0026 #include <asm/prom.h>
0027 #include <asm/macio.h>
0028 
0029 #include <scsi/scsi.h>
0030 #include <scsi/scsi_cmnd.h>
0031 #include <scsi/scsi_device.h>
0032 #include <scsi/scsi_host.h>
0033 
0034 #include "mac53c94.h"
0035 
0036 enum fsc_phase {
0037     idle,
0038     selecting,
0039     dataing,
0040     completing,
0041     busfreeing,
0042 };
0043 
0044 struct fsc_state {
0045     struct  mac53c94_regs __iomem *regs;
0046     int intr;
0047     struct  dbdma_regs __iomem *dma;
0048     int dmaintr;
0049     int clk_freq;
0050     struct  Scsi_Host *host;
0051     struct scsi_cmnd *request_q;
0052     struct scsi_cmnd *request_qtail;
0053     struct scsi_cmnd *current_req;      /* req we're currently working on */
0054     enum fsc_phase phase;       /* what we're currently trying to do */
0055     struct dbdma_cmd *dma_cmds; /* space for dbdma commands, aligned */
0056     void    *dma_cmd_space;
0057     struct  pci_dev *pdev;
0058     dma_addr_t dma_addr;
0059     struct macio_dev *mdev;
0060 };
0061 
0062 static void mac53c94_init(struct fsc_state *);
0063 static void mac53c94_start(struct fsc_state *);
0064 static void mac53c94_interrupt(int, void *);
0065 static irqreturn_t do_mac53c94_interrupt(int, void *);
0066 static void cmd_done(struct fsc_state *, int result);
0067 static void set_dma_cmds(struct fsc_state *, struct scsi_cmnd *);
0068 
0069 static int mac53c94_queue_lck(struct scsi_cmnd *cmd)
0070 {
0071     struct fsc_state *state;
0072 
0073 #if 0
0074     if (cmd->sc_data_direction == DMA_TO_DEVICE) {
0075         int i;
0076         printk(KERN_DEBUG "mac53c94_queue %p: command is", cmd);
0077         for (i = 0; i < cmd->cmd_len; ++i)
0078             printk(KERN_CONT " %.2x", cmd->cmnd[i]);
0079         printk(KERN_CONT "\n");
0080         printk(KERN_DEBUG "use_sg=%d request_bufflen=%d request_buffer=%p\n",
0081                scsi_sg_count(cmd), scsi_bufflen(cmd), scsi_sglist(cmd));
0082     }
0083 #endif
0084 
0085     cmd->host_scribble = NULL;
0086 
0087     state = (struct fsc_state *) cmd->device->host->hostdata;
0088 
0089     if (state->request_q == NULL)
0090         state->request_q = cmd;
0091     else
0092         state->request_qtail->host_scribble = (void *) cmd;
0093     state->request_qtail = cmd;
0094 
0095     if (state->phase == idle)
0096         mac53c94_start(state);
0097 
0098     return 0;
0099 }
0100 
0101 static DEF_SCSI_QCMD(mac53c94_queue)
0102 
0103 static int mac53c94_host_reset(struct scsi_cmnd *cmd)
0104 {
0105     struct fsc_state *state = (struct fsc_state *) cmd->device->host->hostdata;
0106     struct mac53c94_regs __iomem *regs = state->regs;
0107     struct dbdma_regs __iomem *dma = state->dma;
0108     unsigned long flags;
0109 
0110     spin_lock_irqsave(cmd->device->host->host_lock, flags);
0111 
0112     writel((RUN|PAUSE|FLUSH|WAKE) << 16, &dma->control);
0113     writeb(CMD_SCSI_RESET, &regs->command); /* assert RST */
0114     udelay(100);            /* leave it on for a while (>= 25us) */
0115     writeb(CMD_RESET, &regs->command);
0116     udelay(20);
0117     mac53c94_init(state);
0118     writeb(CMD_NOP, &regs->command);
0119 
0120     spin_unlock_irqrestore(cmd->device->host->host_lock, flags);
0121     return SUCCESS;
0122 }
0123 
0124 static void mac53c94_init(struct fsc_state *state)
0125 {
0126     struct mac53c94_regs __iomem *regs = state->regs;
0127     struct dbdma_regs __iomem *dma = state->dma;
0128 
0129     writeb(state->host->this_id | CF1_PAR_ENABLE, &regs->config1);
0130     writeb(TIMO_VAL(250), &regs->sel_timeout);  /* 250ms */
0131     writeb(CLKF_VAL(state->clk_freq), &regs->clk_factor);
0132     writeb(CF2_FEATURE_EN, &regs->config2);
0133     writeb(0, &regs->config3);
0134     writeb(0, &regs->sync_period);
0135     writeb(0, &regs->sync_offset);
0136     (void)readb(&regs->interrupt);
0137     writel((RUN|PAUSE|FLUSH|WAKE) << 16, &dma->control);
0138 }
0139 
0140 /*
0141  * Start the next command for a 53C94.
0142  * Should be called with interrupts disabled.
0143  */
0144 static void mac53c94_start(struct fsc_state *state)
0145 {
0146     struct scsi_cmnd *cmd;
0147     struct mac53c94_regs __iomem *regs = state->regs;
0148     int i;
0149 
0150     if (state->phase != idle || state->current_req != NULL)
0151         panic("inappropriate mac53c94_start (state=%p)", state);
0152     if (state->request_q == NULL)
0153         return;
0154     state->current_req = cmd = state->request_q;
0155     state->request_q = (struct scsi_cmnd *) cmd->host_scribble;
0156 
0157     /* Off we go */
0158     writeb(0, &regs->count_lo);
0159     writeb(0, &regs->count_mid);
0160     writeb(0, &regs->count_hi);
0161     writeb(CMD_NOP + CMD_DMA_MODE, &regs->command);
0162     udelay(1);
0163     writeb(CMD_FLUSH, &regs->command);
0164     udelay(1);
0165     writeb(cmd->device->id, &regs->dest_id);
0166     writeb(0, &regs->sync_period);
0167     writeb(0, &regs->sync_offset);
0168 
0169     /* load the command into the FIFO */
0170     for (i = 0; i < cmd->cmd_len; ++i)
0171         writeb(cmd->cmnd[i], &regs->fifo);
0172 
0173     /* do select without ATN XXX */
0174     writeb(CMD_SELECT, &regs->command);
0175     state->phase = selecting;
0176 
0177     set_dma_cmds(state, cmd);
0178 }
0179 
0180 static irqreturn_t do_mac53c94_interrupt(int irq, void *dev_id)
0181 {
0182     unsigned long flags;
0183     struct Scsi_Host *dev = ((struct fsc_state *) dev_id)->current_req->device->host;
0184     
0185     spin_lock_irqsave(dev->host_lock, flags);
0186     mac53c94_interrupt(irq, dev_id);
0187     spin_unlock_irqrestore(dev->host_lock, flags);
0188     return IRQ_HANDLED;
0189 }
0190 
0191 static void mac53c94_interrupt(int irq, void *dev_id)
0192 {
0193     struct fsc_state *state = (struct fsc_state *) dev_id;
0194     struct mac53c94_regs __iomem *regs = state->regs;
0195     struct dbdma_regs __iomem *dma = state->dma;
0196     struct scsi_cmnd *const cmd = state->current_req;
0197     struct mac53c94_cmd_priv *const mcmd = mac53c94_priv(cmd);
0198     int nb, stat, seq, intr;
0199     static int mac53c94_errors;
0200 
0201     /*
0202      * Apparently, reading the interrupt register unlatches
0203      * the status and sequence step registers.
0204      */
0205     seq = readb(&regs->seqstep);
0206     stat = readb(&regs->status);
0207     intr = readb(&regs->interrupt);
0208 
0209 #if 0
0210     printk(KERN_DEBUG "mac53c94_intr, intr=%x stat=%x seq=%x phase=%d\n",
0211            intr, stat, seq, state->phase);
0212 #endif
0213 
0214     if (intr & INTR_RESET) {
0215         /* SCSI bus was reset */
0216         printk(KERN_INFO "external SCSI bus reset detected\n");
0217         writeb(CMD_NOP, &regs->command);
0218         writel(RUN << 16, &dma->control);   /* stop dma */
0219         cmd_done(state, DID_RESET << 16);
0220         return;
0221     }
0222     if (intr & INTR_ILL_CMD) {
0223         printk(KERN_ERR "53c94: invalid cmd, intr=%x stat=%x seq=%x phase=%d\n",
0224                intr, stat, seq, state->phase);
0225         cmd_done(state, DID_ERROR << 16);
0226         return;
0227     }
0228     if (stat & STAT_ERROR) {
0229 #if 0
0230         /* XXX these seem to be harmless? */
0231         printk("53c94: bad error, intr=%x stat=%x seq=%x phase=%d\n",
0232                intr, stat, seq, state->phase);
0233 #endif
0234         ++mac53c94_errors;
0235         writeb(CMD_NOP + CMD_DMA_MODE, &regs->command);
0236     }
0237     if (!cmd) {
0238         printk(KERN_DEBUG "53c94: interrupt with no command active?\n");
0239         return;
0240     }
0241     if (stat & STAT_PARITY) {
0242         printk(KERN_ERR "mac53c94: parity error\n");
0243         cmd_done(state, DID_PARITY << 16);
0244         return;
0245     }
0246     switch (state->phase) {
0247     case selecting:
0248         if (intr & INTR_DISCONNECT) {
0249             /* selection timed out */
0250             cmd_done(state, DID_BAD_TARGET << 16);
0251             return;
0252         }
0253         if (intr != INTR_BUS_SERV + INTR_DONE) {
0254             printk(KERN_DEBUG "got intr %x during selection\n", intr);
0255             cmd_done(state, DID_ERROR << 16);
0256             return;
0257         }
0258         if ((seq & SS_MASK) != SS_DONE) {
0259             printk(KERN_DEBUG "seq step %x after command\n", seq);
0260             cmd_done(state, DID_ERROR << 16);
0261             return;
0262         }
0263         writeb(CMD_NOP, &regs->command);
0264         /* set DMA controller going if any data to transfer */
0265         if ((stat & (STAT_MSG|STAT_CD)) == 0
0266             && (scsi_sg_count(cmd) > 0 || scsi_bufflen(cmd))) {
0267             nb = mcmd->this_residual;
0268             if (nb > 0xfff0)
0269                 nb = 0xfff0;
0270             mcmd->this_residual -= nb;
0271             writeb(nb, &regs->count_lo);
0272             writeb(nb >> 8, &regs->count_mid);
0273             writeb(CMD_DMA_MODE + CMD_NOP, &regs->command);
0274             writel(virt_to_phys(state->dma_cmds), &dma->cmdptr);
0275             writel((RUN << 16) | RUN, &dma->control);
0276             writeb(CMD_DMA_MODE + CMD_XFER_DATA, &regs->command);
0277             state->phase = dataing;
0278             break;
0279         } else if ((stat & STAT_PHASE) == STAT_CD + STAT_IO) {
0280             /* up to status phase already */
0281             writeb(CMD_I_COMPLETE, &regs->command);
0282             state->phase = completing;
0283         } else {
0284             printk(KERN_DEBUG "in unexpected phase %x after cmd\n",
0285                    stat & STAT_PHASE);
0286             cmd_done(state, DID_ERROR << 16);
0287             return;
0288         }
0289         break;
0290 
0291     case dataing:
0292         if (intr != INTR_BUS_SERV) {
0293             printk(KERN_DEBUG "got intr %x before status\n", intr);
0294             cmd_done(state, DID_ERROR << 16);
0295             return;
0296         }
0297         if (mcmd->this_residual != 0
0298             && (stat & (STAT_MSG|STAT_CD)) == 0) {
0299             /* Set up the count regs to transfer more */
0300             nb = mcmd->this_residual;
0301             if (nb > 0xfff0)
0302                 nb = 0xfff0;
0303             mcmd->this_residual -= nb;
0304             writeb(nb, &regs->count_lo);
0305             writeb(nb >> 8, &regs->count_mid);
0306             writeb(CMD_DMA_MODE + CMD_NOP, &regs->command);
0307             writeb(CMD_DMA_MODE + CMD_XFER_DATA, &regs->command);
0308             break;
0309         }
0310         if ((stat & STAT_PHASE) != STAT_CD + STAT_IO) {
0311             printk(KERN_DEBUG "intr %x before data xfer complete\n", intr);
0312         }
0313         writel(RUN << 16, &dma->control);   /* stop dma */
0314         scsi_dma_unmap(cmd);
0315         /* should check dma status */
0316         writeb(CMD_I_COMPLETE, &regs->command);
0317         state->phase = completing;
0318         break;
0319     case completing:
0320         if (intr != INTR_DONE) {
0321             printk(KERN_DEBUG "got intr %x on completion\n", intr);
0322             cmd_done(state, DID_ERROR << 16);
0323             return;
0324         }
0325         mcmd->status = readb(&regs->fifo);
0326         mcmd->message = readb(&regs->fifo);
0327         writeb(CMD_ACCEPT_MSG, &regs->command);
0328         state->phase = busfreeing;
0329         break;
0330     case busfreeing:
0331         if (intr != INTR_DISCONNECT) {
0332             printk(KERN_DEBUG "got intr %x when expected disconnect\n", intr);
0333         }
0334         cmd_done(state, (DID_OK << 16) + (mcmd->message << 8) + mcmd->status);
0335         break;
0336     default:
0337         printk(KERN_DEBUG "don't know about phase %d\n", state->phase);
0338     }
0339 }
0340 
0341 static void cmd_done(struct fsc_state *state, int result)
0342 {
0343     struct scsi_cmnd *cmd;
0344 
0345     cmd = state->current_req;
0346     if (cmd) {
0347         cmd->result = result;
0348         scsi_done(cmd);
0349         state->current_req = NULL;
0350     }
0351     state->phase = idle;
0352     mac53c94_start(state);
0353 }
0354 
0355 /*
0356  * Set up DMA commands for transferring data.
0357  */
0358 static void set_dma_cmds(struct fsc_state *state, struct scsi_cmnd *cmd)
0359 {
0360     int i, dma_cmd, total, nseg;
0361     struct scatterlist *scl;
0362     struct dbdma_cmd *dcmds;
0363     dma_addr_t dma_addr;
0364     u32 dma_len;
0365 
0366     nseg = scsi_dma_map(cmd);
0367     BUG_ON(nseg < 0);
0368     if (!nseg)
0369         return;
0370 
0371     dma_cmd = cmd->sc_data_direction == DMA_TO_DEVICE ?
0372             OUTPUT_MORE : INPUT_MORE;
0373     dcmds = state->dma_cmds;
0374     total = 0;
0375 
0376     scsi_for_each_sg(cmd, scl, nseg, i) {
0377         dma_addr = sg_dma_address(scl);
0378         dma_len = sg_dma_len(scl);
0379         if (dma_len > 0xffff)
0380             panic("mac53c94: scatterlist element >= 64k");
0381         total += dma_len;
0382         dcmds->req_count = cpu_to_le16(dma_len);
0383         dcmds->command = cpu_to_le16(dma_cmd);
0384         dcmds->phy_addr = cpu_to_le32(dma_addr);
0385         dcmds->xfer_status = 0;
0386         ++dcmds;
0387     }
0388 
0389     dma_cmd += OUTPUT_LAST - OUTPUT_MORE;
0390     dcmds[-1].command = cpu_to_le16(dma_cmd);
0391     dcmds->command = cpu_to_le16(DBDMA_STOP);
0392     mac53c94_priv(cmd)->this_residual = total;
0393 }
0394 
0395 static struct scsi_host_template mac53c94_template = {
0396     .proc_name  = "53c94",
0397     .name       = "53C94",
0398     .queuecommand   = mac53c94_queue,
0399     .eh_host_reset_handler = mac53c94_host_reset,
0400     .can_queue  = 1,
0401     .this_id    = 7,
0402     .sg_tablesize   = SG_ALL,
0403     .max_segment_size = 65535,
0404     .cmd_size   = sizeof(struct mac53c94_cmd_priv),
0405 };
0406 
0407 static int mac53c94_probe(struct macio_dev *mdev, const struct of_device_id *match)
0408 {
0409     struct device_node *node = macio_get_of_node(mdev);
0410     struct pci_dev *pdev = macio_get_pci_dev(mdev);
0411     struct fsc_state *state;
0412     struct Scsi_Host *host;
0413     void *dma_cmd_space;
0414     const unsigned char *clkprop;
0415     int proplen, rc = -ENODEV;
0416 
0417     if (macio_resource_count(mdev) != 2 || macio_irq_count(mdev) != 2) {
0418         printk(KERN_ERR "mac53c94: expected 2 addrs and intrs"
0419                " (got %d/%d)\n",
0420                macio_resource_count(mdev), macio_irq_count(mdev));
0421         return -ENODEV;
0422     }
0423 
0424     if (macio_request_resources(mdev, "mac53c94") != 0) {
0425             printk(KERN_ERR "mac53c94: unable to request memory resources");
0426         return -EBUSY;
0427     }
0428 
0429         host = scsi_host_alloc(&mac53c94_template, sizeof(struct fsc_state));
0430     if (host == NULL) {
0431         printk(KERN_ERR "mac53c94: couldn't register host");
0432         rc = -ENOMEM;
0433         goto out_release;
0434     }
0435 
0436     state = (struct fsc_state *) host->hostdata;
0437     macio_set_drvdata(mdev, state);
0438     state->host = host;
0439     state->pdev = pdev;
0440     state->mdev = mdev;
0441 
0442     state->regs = (struct mac53c94_regs __iomem *)
0443         ioremap(macio_resource_start(mdev, 0), 0x1000);
0444     state->intr = macio_irq(mdev, 0);
0445     state->dma = (struct dbdma_regs __iomem *)
0446         ioremap(macio_resource_start(mdev, 1), 0x1000);
0447     state->dmaintr = macio_irq(mdev, 1);
0448     if (state->regs == NULL || state->dma == NULL) {
0449         printk(KERN_ERR "mac53c94: ioremap failed for %pOF\n", node);
0450         goto out_free;
0451     }
0452 
0453     clkprop = of_get_property(node, "clock-frequency", &proplen);
0454         if (clkprop == NULL || proplen != sizeof(int)) {
0455             printk(KERN_ERR "%pOF: can't get clock frequency, "
0456                    "assuming 25MHz\n", node);
0457             state->clk_freq = 25000000;
0458         } else
0459             state->clk_freq = *(int *)clkprop;
0460 
0461         /* Space for dma command list: +1 for stop command,
0462          * +1 to allow for aligning.
0463      * XXX FIXME: Use DMA consistent routines
0464      */
0465         dma_cmd_space = kmalloc_array(host->sg_tablesize + 2,
0466                          sizeof(struct dbdma_cmd),
0467                          GFP_KERNEL);
0468     if (!dma_cmd_space) {
0469         printk(KERN_ERR "mac53c94: couldn't allocate dma "
0470                "command space for %pOF\n", node);
0471         rc = -ENOMEM;
0472         goto out_free;
0473     }
0474 
0475     state->dma_cmds = (struct dbdma_cmd *)DBDMA_ALIGN(dma_cmd_space);
0476     memset(state->dma_cmds, 0, (host->sg_tablesize + 1)
0477            * sizeof(struct dbdma_cmd));
0478     state->dma_cmd_space = dma_cmd_space;
0479 
0480     mac53c94_init(state);
0481 
0482     if (request_irq(state->intr, do_mac53c94_interrupt, 0, "53C94",state)) {
0483         printk(KERN_ERR "mac53C94: can't get irq %d for %pOF\n",
0484                state->intr, node);
0485         goto out_free_dma;
0486     }
0487 
0488     rc = scsi_add_host(host, &mdev->ofdev.dev);
0489     if (rc != 0)
0490         goto out_release_irq;
0491 
0492     scsi_scan_host(host);
0493     return 0;
0494 
0495  out_release_irq:
0496     free_irq(state->intr, state);
0497  out_free_dma:
0498     kfree(state->dma_cmd_space);
0499  out_free:
0500     if (state->dma != NULL)
0501         iounmap(state->dma);
0502     if (state->regs != NULL)
0503         iounmap(state->regs);
0504     scsi_host_put(host);
0505  out_release:
0506     macio_release_resources(mdev);
0507 
0508     return rc;
0509 }
0510 
0511 static int mac53c94_remove(struct macio_dev *mdev)
0512 {
0513     struct fsc_state *fp = (struct fsc_state *)macio_get_drvdata(mdev);
0514     struct Scsi_Host *host = fp->host;
0515 
0516     scsi_remove_host(host);
0517 
0518     free_irq(fp->intr, fp);
0519 
0520     if (fp->regs)
0521         iounmap(fp->regs);
0522     if (fp->dma)
0523         iounmap(fp->dma);
0524     kfree(fp->dma_cmd_space);
0525 
0526     scsi_host_put(host);
0527 
0528     macio_release_resources(mdev);
0529 
0530     return 0;
0531 }
0532 
0533 
0534 static struct of_device_id mac53c94_match[] = 
0535 {
0536     {
0537     .name       = "53c94",
0538     },
0539     {},
0540 };
0541 MODULE_DEVICE_TABLE (of, mac53c94_match);
0542 
0543 static struct macio_driver mac53c94_driver = 
0544 {
0545     .driver = {
0546         .name       = "mac53c94",
0547         .owner      = THIS_MODULE,
0548         .of_match_table = mac53c94_match,
0549     },
0550     .probe      = mac53c94_probe,
0551     .remove     = mac53c94_remove,
0552 };
0553 
0554 
0555 static int __init init_mac53c94(void)
0556 {
0557     return macio_register_driver(&mac53c94_driver);
0558 }
0559 
0560 static void __exit exit_mac53c94(void)
0561 {
0562     return macio_unregister_driver(&mac53c94_driver);
0563 }
0564 
0565 module_init(init_mac53c94);
0566 module_exit(exit_mac53c94);
0567 
0568 MODULE_DESCRIPTION("PowerMac 53c94 SCSI driver");
0569 MODULE_AUTHOR("Paul Mackerras <paulus@samba.org>");
0570 MODULE_LICENSE("GPL");
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