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0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 
0003 /*  Driver for the Iomega MatchMaker parallel port SCSI HBA embedded in 
0004  * the Iomega ZIP Plus drive
0005  * 
0006  * (c) 1998     David Campbell
0007  *
0008  * Please note that I live in Perth, Western Australia. GMT+0800
0009  */
0010 
0011 #ifndef _IMM_H
0012 #define _IMM_H
0013 
0014 #define   IMM_VERSION   "2.05 (for Linux 2.4.0)"
0015 
0016 /* 
0017  * 10 Apr 1998 (Good Friday) - Received EN144302 by email from Iomega.
0018  * Scarry thing is the level of support from one of their managers.
0019  * The onus is now on us (the developers) to shut up and start coding.
0020  *                                              11Apr98 [ 0.10 ]
0021  *
0022  * --- SNIP ---
0023  *
0024  * It manages to find the drive which is a good start. Writing data during
0025  * data phase is known to be broken (due to requirements of two byte writes).
0026  * Removing "Phase" debug messages.
0027  *
0028  * PS: Took four hours of coding after I bought a drive.
0029  *      ANZAC Day (Aus "War Veterans Holiday")  25Apr98 [ 0.14 ]
0030  *
0031  * Ten minutes later after a few fixes.... (LITERALLY!!!)
0032  * Have mounted disk, copied file, dismounted disk, remount disk, diff file
0033  *                    -----  It actually works!!! -----
0034  *                                              25Apr98 [ 0.15 ]
0035  *
0036  * Twenty minutes of mucking around, rearanged the IEEE negotiate mechanism.
0037  * Now have byte mode working (only EPP and ECP to go now... :=)
0038  *                                              26Apr98 [ 0.16 ]
0039  *
0040  * Thirty minutes of further coding results in EPP working on my machine.
0041  *                                              27Apr98 [ 0.17 ]
0042  *
0043  * Due to work commitments and inability to get a "true" ECP mode functioning
0044  * I have decided to code the parport support into imm.
0045  *                                              09Jun98 [ 0.18 ]
0046  *
0047  * Driver is now out of beta testing.
0048  * Support for parport has been added.
0049  * Now distributed with the ppa driver.
0050  *                                              12Jun98 [ 2.00 ]
0051  *
0052  * Err.. It appears that imm-2.00 was broken....
0053  *                                              18Jun98 [ 2.01 ]
0054  *
0055  * Patch applied to sync this against the Linux 2.1.x kernel code
0056  * Included qboot_zip.sh
0057  *                                              21Jun98 [ 2.02 ]
0058  *
0059  * Other clean ups include the follow changes:
0060  *    CONFIG_SCSI_PPA_HAVE_PEDANTIC => CONFIG_SCSI_IZIP_EPP16
0061  *    added CONFIG_SCSI_IZIP_SLOW_CTR option
0062  *                                                      [2.03]
0063  *  Fix kernel panic on scsi timeout.       20Aug00 [2.04]
0064  *
0065  *  Avoid io_request_lock problems.
0066  *  John Cavan <johncavan@home.com>     16Nov00 [2.05]
0067  */
0068 /* ------ END OF USER CONFIGURABLE PARAMETERS ----- */
0069 
0070 #include  <linux/stddef.h>
0071 #include  <linux/module.h>
0072 #include  <linux/kernel.h>
0073 #include  <linux/ioport.h>
0074 #include  <linux/delay.h>
0075 #include  <linux/proc_fs.h>
0076 #include  <linux/stat.h>
0077 #include  <linux/blkdev.h>
0078 #include  <linux/sched.h>
0079 #include  <linux/interrupt.h>
0080 
0081 #include  <asm/io.h>
0082 #include  <scsi/scsi_host.h>
0083 /* batteries not included :-) */
0084 
0085 /*
0086  * modes in which the driver can operate 
0087  */
0088 #define   IMM_AUTODETECT        0   /* Autodetect mode                */
0089 #define   IMM_NIBBLE            1   /* work in standard 4 bit mode    */
0090 #define   IMM_PS2               2   /* PS/2 byte mode         */
0091 #define   IMM_EPP_8             3   /* EPP mode, 8 bit                */
0092 #define   IMM_EPP_16            4   /* EPP mode, 16 bit               */
0093 #define   IMM_EPP_32            5   /* EPP mode, 32 bit               */
0094 #define   IMM_UNKNOWN           6   /* Just in case...                */
0095 
0096 static char *IMM_MODE_STRING[] =
0097 {
0098     [IMM_AUTODETECT] = "Autodetect",
0099     [IMM_NIBBLE]     = "SPP",
0100     [IMM_PS2]    = "PS/2",
0101     [IMM_EPP_8]  = "EPP 8 bit",
0102     [IMM_EPP_16]     = "EPP 16 bit",
0103 #ifdef CONFIG_SCSI_IZIP_EPP16
0104     [IMM_EPP_32]     = "EPP 16 bit",
0105 #else
0106     [IMM_EPP_32]     = "EPP 32 bit",
0107 #endif
0108     [IMM_UNKNOWN]    = "Unknown",
0109 };
0110 
0111 /* other options */
0112 #define IMM_BURST_SIZE  512 /* data burst size */
0113 #define IMM_SELECT_TMO  500 /* 500 how long to wait for target ? */
0114 #define IMM_SPIN_TMO    5000    /* 50000 imm_wait loop limiter */
0115 #define IMM_DEBUG   0   /* debugging option */
0116 #define IN_EPP_MODE(x) (x == IMM_EPP_8 || x == IMM_EPP_16 || x == IMM_EPP_32)
0117 
0118 /* args to imm_connect */
0119 #define CONNECT_EPP_MAYBE 1
0120 #define CONNECT_NORMAL  0
0121 
0122 #define r_dtr(x)        (unsigned char)inb((x))
0123 #define r_str(x)        (unsigned char)inb((x)+1)
0124 #define r_ctr(x)        (unsigned char)inb((x)+2)
0125 #define r_epp(x)        (unsigned char)inb((x)+4)
0126 #define r_fifo(x)       (unsigned char)inb((x))   /* x must be base_hi */
0127                     /* On PCI is: base+0x400 != base_hi */
0128 #define r_ecr(x)        (unsigned char)inb((x)+2) /* x must be base_hi */
0129 
0130 #define w_dtr(x,y)      outb(y, (x))
0131 #define w_str(x,y)      outb(y, (x)+1)
0132 #define w_epp(x,y)      outb(y, (x)+4)
0133 #define w_fifo(x,y)     outb(y, (x))     /* x must be base_hi */
0134 #define w_ecr(x,y)      outb(y, (x)+0x2) /* x must be base_hi */
0135 
0136 #ifdef CONFIG_SCSI_IZIP_SLOW_CTR
0137 #define w_ctr(x,y)      outb_p(y, (x)+2)
0138 #else
0139 #define w_ctr(x,y)      outb(y, (x)+2)
0140 #endif
0141 
0142 static inline struct scsi_pointer *imm_scsi_pointer(struct scsi_cmnd *cmd)
0143 {
0144     return scsi_cmd_priv(cmd);
0145 }
0146 
0147 static int imm_engine(imm_struct *, struct scsi_cmnd *);
0148 
0149 #endif              /* _IMM_H */