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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright 2008 Cisco Systems, Inc.  All rights reserved.
0004  * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
0005  */
0006 
0007 #include <linux/kernel.h>
0008 #include <linux/errno.h>
0009 #include <linux/types.h>
0010 #include <linux/pci.h>
0011 #include <linux/delay.h>
0012 #include <linux/if_ether.h>
0013 #include <linux/slab.h>
0014 #include "vnic_resource.h"
0015 #include "vnic_devcmd.h"
0016 #include "vnic_dev.h"
0017 #include "vnic_stats.h"
0018 #include "vnic_wq.h"
0019 
0020 struct devcmd2_controller {
0021     struct vnic_wq_ctrl *wq_ctrl;
0022     struct vnic_dev_ring results_ring;
0023     struct vnic_wq wq;
0024     struct vnic_devcmd2 *cmd_ring;
0025     struct devcmd2_result *result;
0026     u16 next_result;
0027     u16 result_size;
0028     int color;
0029 };
0030 
0031 enum vnic_proxy_type {
0032     PROXY_NONE,
0033     PROXY_BY_BDF,
0034     PROXY_BY_INDEX,
0035 };
0036 
0037 struct vnic_res {
0038     void __iomem *vaddr;
0039     unsigned int count;
0040 };
0041 
0042 struct vnic_dev {
0043     void *priv;
0044     struct pci_dev *pdev;
0045     struct vnic_res res[RES_TYPE_MAX];
0046     enum vnic_dev_intr_mode intr_mode;
0047     struct vnic_devcmd __iomem *devcmd;
0048     struct vnic_devcmd_notify *notify;
0049     struct vnic_devcmd_notify notify_copy;
0050     dma_addr_t notify_pa;
0051     u32 *linkstatus;
0052     dma_addr_t linkstatus_pa;
0053     struct vnic_stats *stats;
0054     dma_addr_t stats_pa;
0055     struct vnic_devcmd_fw_info *fw_info;
0056     dma_addr_t fw_info_pa;
0057     enum vnic_proxy_type proxy;
0058     u32 proxy_index;
0059     u64 args[VNIC_DEVCMD_NARGS];
0060     struct devcmd2_controller *devcmd2;
0061     int (*devcmd_rtn)(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
0062             int wait);
0063 };
0064 
0065 #define VNIC_MAX_RES_HDR_SIZE \
0066     (sizeof(struct vnic_resource_header) + \
0067     sizeof(struct vnic_resource) * RES_TYPE_MAX)
0068 #define VNIC_RES_STRIDE 128
0069 
0070 void *vnic_dev_priv(struct vnic_dev *vdev)
0071 {
0072     return vdev->priv;
0073 }
0074 
0075 static int vnic_dev_discover_res(struct vnic_dev *vdev,
0076     struct vnic_dev_bar *bar)
0077 {
0078     struct vnic_resource_header __iomem *rh;
0079     struct vnic_resource __iomem *r;
0080     u8 type;
0081 
0082     if (bar->len < VNIC_MAX_RES_HDR_SIZE) {
0083         printk(KERN_ERR "vNIC BAR0 res hdr length error\n");
0084         return -EINVAL;
0085     }
0086 
0087     rh = bar->vaddr;
0088     if (!rh) {
0089         printk(KERN_ERR "vNIC BAR0 res hdr not mem-mapped\n");
0090         return -EINVAL;
0091     }
0092 
0093     if (ioread32(&rh->magic) != VNIC_RES_MAGIC ||
0094         ioread32(&rh->version) != VNIC_RES_VERSION) {
0095         printk(KERN_ERR "vNIC BAR0 res magic/version error "
0096             "exp (%lx/%lx) curr (%x/%x)\n",
0097             VNIC_RES_MAGIC, VNIC_RES_VERSION,
0098             ioread32(&rh->magic), ioread32(&rh->version));
0099         return -EINVAL;
0100     }
0101 
0102     r = (struct vnic_resource __iomem *)(rh + 1);
0103 
0104     while ((type = ioread8(&r->type)) != RES_TYPE_EOL) {
0105 
0106         u8 bar_num = ioread8(&r->bar);
0107         u32 bar_offset = ioread32(&r->bar_offset);
0108         u32 count = ioread32(&r->count);
0109         u32 len;
0110 
0111         r++;
0112 
0113         if (bar_num != 0)  /* only mapping in BAR0 resources */
0114             continue;
0115 
0116         switch (type) {
0117         case RES_TYPE_WQ:
0118         case RES_TYPE_RQ:
0119         case RES_TYPE_CQ:
0120         case RES_TYPE_INTR_CTRL:
0121             /* each count is stride bytes long */
0122             len = count * VNIC_RES_STRIDE;
0123             if (len + bar_offset > bar->len) {
0124                 printk(KERN_ERR "vNIC BAR0 resource %d "
0125                     "out-of-bounds, offset 0x%x + "
0126                     "size 0x%x > bar len 0x%lx\n",
0127                     type, bar_offset,
0128                     len,
0129                     bar->len);
0130                 return -EINVAL;
0131             }
0132             break;
0133         case RES_TYPE_INTR_PBA_LEGACY:
0134         case RES_TYPE_DEVCMD2:
0135         case RES_TYPE_DEVCMD:
0136             len = count;
0137             break;
0138         default:
0139             continue;
0140         }
0141 
0142         vdev->res[type].count = count;
0143         vdev->res[type].vaddr = (char __iomem *)bar->vaddr + bar_offset;
0144     }
0145 
0146     return 0;
0147 }
0148 
0149 unsigned int vnic_dev_get_res_count(struct vnic_dev *vdev,
0150     enum vnic_res_type type)
0151 {
0152     return vdev->res[type].count;
0153 }
0154 
0155 void __iomem *vnic_dev_get_res(struct vnic_dev *vdev, enum vnic_res_type type,
0156     unsigned int index)
0157 {
0158     if (!vdev->res[type].vaddr)
0159         return NULL;
0160 
0161     switch (type) {
0162     case RES_TYPE_WQ:
0163     case RES_TYPE_RQ:
0164     case RES_TYPE_CQ:
0165     case RES_TYPE_INTR_CTRL:
0166         return (char __iomem *)vdev->res[type].vaddr +
0167                     index * VNIC_RES_STRIDE;
0168     default:
0169         return (char __iomem *)vdev->res[type].vaddr;
0170     }
0171 }
0172 
0173 unsigned int vnic_dev_desc_ring_size(struct vnic_dev_ring *ring,
0174                      unsigned int desc_count,
0175                      unsigned int desc_size)
0176 {
0177     /* The base address of the desc rings must be 512 byte aligned.
0178      * Descriptor count is aligned to groups of 32 descriptors.  A
0179      * count of 0 means the maximum 4096 descriptors.  Descriptor
0180      * size is aligned to 16 bytes.
0181      */
0182 
0183     unsigned int count_align = 32;
0184     unsigned int desc_align = 16;
0185 
0186     ring->base_align = 512;
0187 
0188     if (desc_count == 0)
0189         desc_count = 4096;
0190 
0191     ring->desc_count = ALIGN(desc_count, count_align);
0192 
0193     ring->desc_size = ALIGN(desc_size, desc_align);
0194 
0195     ring->size = ring->desc_count * ring->desc_size;
0196     ring->size_unaligned = ring->size + ring->base_align;
0197 
0198     return ring->size_unaligned;
0199 }
0200 
0201 void vnic_dev_clear_desc_ring(struct vnic_dev_ring *ring)
0202 {
0203     memset(ring->descs, 0, ring->size);
0204 }
0205 
0206 int vnic_dev_alloc_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring,
0207     unsigned int desc_count, unsigned int desc_size)
0208 {
0209     vnic_dev_desc_ring_size(ring, desc_count, desc_size);
0210 
0211     ring->descs_unaligned = dma_alloc_coherent(&vdev->pdev->dev,
0212         ring->size_unaligned,
0213         &ring->base_addr_unaligned, GFP_KERNEL);
0214 
0215     if (!ring->descs_unaligned) {
0216         printk(KERN_ERR
0217           "Failed to allocate ring (size=%d), aborting\n",
0218             (int)ring->size);
0219         return -ENOMEM;
0220     }
0221 
0222     ring->base_addr = ALIGN(ring->base_addr_unaligned,
0223         ring->base_align);
0224     ring->descs = (u8 *)ring->descs_unaligned +
0225         (ring->base_addr - ring->base_addr_unaligned);
0226 
0227     vnic_dev_clear_desc_ring(ring);
0228 
0229     ring->desc_avail = ring->desc_count - 1;
0230 
0231     return 0;
0232 }
0233 
0234 void vnic_dev_free_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring)
0235 {
0236     if (ring->descs) {
0237         dma_free_coherent(&vdev->pdev->dev,
0238             ring->size_unaligned,
0239             ring->descs_unaligned,
0240             ring->base_addr_unaligned);
0241         ring->descs = NULL;
0242     }
0243 }
0244 
0245 static int vnic_dev_cmd1(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd, int wait)
0246 {
0247     struct vnic_devcmd __iomem *devcmd = vdev->devcmd;
0248     int delay;
0249     u32 status;
0250     static const int dev_cmd_err[] = {
0251         /* convert from fw's version of error.h to host's version */
0252         0,  /* ERR_SUCCESS */
0253         EINVAL, /* ERR_EINVAL */
0254         EFAULT, /* ERR_EFAULT */
0255         EPERM,  /* ERR_EPERM */
0256         EBUSY,  /* ERR_EBUSY */
0257     };
0258     int err;
0259     u64 *a0 = &vdev->args[0];
0260     u64 *a1 = &vdev->args[1];
0261 
0262     status = ioread32(&devcmd->status);
0263     if (status & STAT_BUSY) {
0264         printk(KERN_ERR "Busy devcmd %d\n", _CMD_N(cmd));
0265         return -EBUSY;
0266     }
0267 
0268     if (_CMD_DIR(cmd) & _CMD_DIR_WRITE) {
0269         writeq(*a0, &devcmd->args[0]);
0270         writeq(*a1, &devcmd->args[1]);
0271         wmb();
0272     }
0273 
0274     iowrite32(cmd, &devcmd->cmd);
0275 
0276     if ((_CMD_FLAGS(cmd) & _CMD_FLAGS_NOWAIT))
0277             return 0;
0278 
0279     for (delay = 0; delay < wait; delay++) {
0280 
0281         udelay(100);
0282 
0283         status = ioread32(&devcmd->status);
0284         if (!(status & STAT_BUSY)) {
0285 
0286             if (status & STAT_ERROR) {
0287                 err = dev_cmd_err[(int)readq(&devcmd->args[0])];
0288                 printk(KERN_ERR "Error %d devcmd %d\n",
0289                     err, _CMD_N(cmd));
0290                 return -err;
0291             }
0292 
0293             if (_CMD_DIR(cmd) & _CMD_DIR_READ) {
0294                 rmb();
0295                 *a0 = readq(&devcmd->args[0]);
0296                 *a1 = readq(&devcmd->args[1]);
0297             }
0298 
0299             return 0;
0300         }
0301     }
0302 
0303     printk(KERN_ERR "Timedout devcmd %d\n", _CMD_N(cmd));
0304     return -ETIMEDOUT;
0305 }
0306 
0307 static int vnic_dev_cmd2(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
0308         int wait)
0309 {
0310     struct devcmd2_controller *dc2c = vdev->devcmd2;
0311     struct devcmd2_result *result;
0312     u8 color;
0313     unsigned int i;
0314     int delay;
0315     int err;
0316     u32 fetch_index;
0317     u32 posted;
0318     u32 new_posted;
0319 
0320     posted = ioread32(&dc2c->wq_ctrl->posted_index);
0321     fetch_index = ioread32(&dc2c->wq_ctrl->fetch_index);
0322 
0323     if (posted == 0xFFFFFFFF || fetch_index == 0xFFFFFFFF) {
0324         /* Hardware surprise removal: return error */
0325         pr_err("%s: devcmd2 invalid posted or fetch index on cmd %d\n",
0326                 pci_name(vdev->pdev), _CMD_N(cmd));
0327         pr_err("%s: fetch index: %u, posted index: %u\n",
0328                 pci_name(vdev->pdev), fetch_index, posted);
0329 
0330         return -ENODEV;
0331 
0332     }
0333 
0334     new_posted = (posted + 1) % DEVCMD2_RING_SIZE;
0335 
0336     if (new_posted == fetch_index) {
0337         pr_err("%s: devcmd2 wq full while issuing cmd %d\n",
0338                 pci_name(vdev->pdev), _CMD_N(cmd));
0339         pr_err("%s: fetch index: %u, posted index: %u\n",
0340                 pci_name(vdev->pdev), fetch_index, posted);
0341         return -EBUSY;
0342 
0343     }
0344     dc2c->cmd_ring[posted].cmd = cmd;
0345     dc2c->cmd_ring[posted].flags = 0;
0346 
0347     if ((_CMD_FLAGS(cmd) & _CMD_FLAGS_NOWAIT))
0348         dc2c->cmd_ring[posted].flags |= DEVCMD2_FNORESULT;
0349     if (_CMD_DIR(cmd) & _CMD_DIR_WRITE) {
0350         for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
0351             dc2c->cmd_ring[posted].args[i] = vdev->args[i];
0352 
0353     }
0354 
0355     /* Adding write memory barrier prevents compiler and/or CPU
0356      * reordering, thus avoiding descriptor posting before
0357      * descriptor is initialized. Otherwise, hardware can read
0358      * stale descriptor fields.
0359      */
0360     wmb();
0361     iowrite32(new_posted, &dc2c->wq_ctrl->posted_index);
0362 
0363     if (dc2c->cmd_ring[posted].flags & DEVCMD2_FNORESULT)
0364         return 0;
0365 
0366     result = dc2c->result + dc2c->next_result;
0367     color = dc2c->color;
0368 
0369     dc2c->next_result++;
0370     if (dc2c->next_result == dc2c->result_size) {
0371         dc2c->next_result = 0;
0372         dc2c->color = dc2c->color ? 0 : 1;
0373     }
0374 
0375     for (delay = 0; delay < wait; delay++) {
0376         udelay(100);
0377         if (result->color == color) {
0378             if (result->error) {
0379                 err = -(int) result->error;
0380                 if (err != ERR_ECMDUNKNOWN ||
0381                         cmd != CMD_CAPABILITY)
0382                     pr_err("%s:Error %d devcmd %d\n",
0383                         pci_name(vdev->pdev),
0384                         err, _CMD_N(cmd));
0385                 return err;
0386             }
0387             if (_CMD_DIR(cmd) & _CMD_DIR_READ) {
0388                 rmb(); /*prevent reorder while reding result*/
0389                 for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
0390                     vdev->args[i] = result->results[i];
0391             }
0392             return 0;
0393         }
0394     }
0395 
0396     pr_err("%s:Timed out devcmd %d\n", pci_name(vdev->pdev), _CMD_N(cmd));
0397 
0398     return -ETIMEDOUT;
0399 }
0400 
0401 
0402 static int vnic_dev_init_devcmd1(struct vnic_dev *vdev)
0403 {
0404     vdev->devcmd = vnic_dev_get_res(vdev, RES_TYPE_DEVCMD, 0);
0405     if (!vdev->devcmd)
0406         return -ENODEV;
0407 
0408     vdev->devcmd_rtn = &vnic_dev_cmd1;
0409     return 0;
0410 }
0411 
0412 
0413 static int vnic_dev_init_devcmd2(struct vnic_dev *vdev)
0414 {
0415     int err;
0416     unsigned int fetch_index;
0417 
0418     if (vdev->devcmd2)
0419         return 0;
0420 
0421     vdev->devcmd2 = kzalloc(sizeof(*vdev->devcmd2), GFP_ATOMIC);
0422     if (!vdev->devcmd2)
0423         return -ENOMEM;
0424 
0425     vdev->devcmd2->color = 1;
0426     vdev->devcmd2->result_size = DEVCMD2_RING_SIZE;
0427     err = vnic_wq_devcmd2_alloc(vdev, &vdev->devcmd2->wq,
0428                 DEVCMD2_RING_SIZE, DEVCMD2_DESC_SIZE);
0429     if (err)
0430         goto err_free_devcmd2;
0431 
0432     fetch_index = ioread32(&vdev->devcmd2->wq.ctrl->fetch_index);
0433     if (fetch_index == 0xFFFFFFFF) { /* check for hardware gone  */
0434         pr_err("error in devcmd2 init");
0435         err = -ENODEV;
0436         goto err_free_wq;
0437     }
0438 
0439     /*
0440      * Don't change fetch_index ever and
0441      * set posted_index same as fetch_index
0442      * when setting up the WQ for devcmd2.
0443      */
0444     vnic_wq_init_start(&vdev->devcmd2->wq, 0, fetch_index,
0445             fetch_index, 0, 0);
0446 
0447     vnic_wq_enable(&vdev->devcmd2->wq);
0448 
0449     err = vnic_dev_alloc_desc_ring(vdev, &vdev->devcmd2->results_ring,
0450             DEVCMD2_RING_SIZE, DEVCMD2_DESC_SIZE);
0451     if (err)
0452         goto err_disable_wq;
0453 
0454     vdev->devcmd2->result =
0455         (struct devcmd2_result *) vdev->devcmd2->results_ring.descs;
0456     vdev->devcmd2->cmd_ring =
0457         (struct vnic_devcmd2 *) vdev->devcmd2->wq.ring.descs;
0458     vdev->devcmd2->wq_ctrl = vdev->devcmd2->wq.ctrl;
0459     vdev->args[0] = (u64) vdev->devcmd2->results_ring.base_addr |
0460                 VNIC_PADDR_TARGET;
0461     vdev->args[1] = DEVCMD2_RING_SIZE;
0462 
0463     err = vnic_dev_cmd2(vdev, CMD_INITIALIZE_DEVCMD2, 1000);
0464     if (err)
0465         goto err_free_desc_ring;
0466 
0467     vdev->devcmd_rtn = &vnic_dev_cmd2;
0468 
0469     return 0;
0470 
0471 err_free_desc_ring:
0472     vnic_dev_free_desc_ring(vdev, &vdev->devcmd2->results_ring);
0473 err_disable_wq:
0474     vnic_wq_disable(&vdev->devcmd2->wq);
0475 err_free_wq:
0476     vnic_wq_free(&vdev->devcmd2->wq);
0477 err_free_devcmd2:
0478     kfree(vdev->devcmd2);
0479     vdev->devcmd2 = NULL;
0480 
0481     return err;
0482 }
0483 
0484 
0485 static void vnic_dev_deinit_devcmd2(struct vnic_dev *vdev)
0486 {
0487     vnic_dev_free_desc_ring(vdev, &vdev->devcmd2->results_ring);
0488     vnic_wq_disable(&vdev->devcmd2->wq);
0489     vnic_wq_free(&vdev->devcmd2->wq);
0490     kfree(vdev->devcmd2);
0491     vdev->devcmd2 = NULL;
0492     vdev->devcmd_rtn = &vnic_dev_cmd1;
0493 }
0494 
0495 
0496 static int vnic_dev_cmd_no_proxy(struct vnic_dev *vdev,
0497     enum vnic_devcmd_cmd cmd, u64 *a0, u64 *a1, int wait)
0498 {
0499     int err;
0500 
0501     vdev->args[0] = *a0;
0502     vdev->args[1] = *a1;
0503 
0504     err = (*vdev->devcmd_rtn)(vdev, cmd, wait);
0505 
0506     *a0 = vdev->args[0];
0507     *a1 = vdev->args[1];
0508 
0509     return err;
0510 }
0511 
0512 
0513 int vnic_dev_cmd(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
0514     u64 *a0, u64 *a1, int wait)
0515 {
0516     memset(vdev->args, 0, sizeof(vdev->args));
0517 
0518     switch (vdev->proxy) {
0519     case PROXY_NONE:
0520     default:
0521         return vnic_dev_cmd_no_proxy(vdev, cmd, a0, a1, wait);
0522     }
0523 }
0524 
0525 
0526 int vnic_dev_fw_info(struct vnic_dev *vdev,
0527     struct vnic_devcmd_fw_info **fw_info)
0528 {
0529     u64 a0, a1 = 0;
0530     int wait = 1000;
0531     int err = 0;
0532 
0533     if (!vdev->fw_info) {
0534         vdev->fw_info = dma_alloc_coherent(&vdev->pdev->dev,
0535             sizeof(struct vnic_devcmd_fw_info),
0536             &vdev->fw_info_pa, GFP_KERNEL);
0537         if (!vdev->fw_info)
0538             return -ENOMEM;
0539 
0540         a0 = vdev->fw_info_pa;
0541 
0542         /* only get fw_info once and cache it */
0543         err = vnic_dev_cmd(vdev, CMD_MCPU_FW_INFO, &a0, &a1, wait);
0544     }
0545 
0546     *fw_info = vdev->fw_info;
0547 
0548     return err;
0549 }
0550 
0551 int vnic_dev_spec(struct vnic_dev *vdev, unsigned int offset, unsigned int size,
0552     void *value)
0553 {
0554     u64 a0, a1;
0555     int wait = 1000;
0556     int err;
0557 
0558     a0 = offset;
0559     a1 = size;
0560 
0561     err = vnic_dev_cmd(vdev, CMD_DEV_SPEC, &a0, &a1, wait);
0562 
0563     switch (size) {
0564     case 1:
0565         *(u8 *)value = (u8)a0;
0566         break;
0567     case 2:
0568         *(u16 *)value = (u16)a0;
0569         break;
0570     case 4:
0571         *(u32 *)value = (u32)a0;
0572         break;
0573     case 8:
0574         *(u64 *)value = a0;
0575         break;
0576     default:
0577         BUG();
0578         break;
0579     }
0580 
0581     return err;
0582 }
0583 
0584 int vnic_dev_stats_clear(struct vnic_dev *vdev)
0585 {
0586     u64 a0 = 0, a1 = 0;
0587     int wait = 1000;
0588     return vnic_dev_cmd(vdev, CMD_STATS_CLEAR, &a0, &a1, wait);
0589 }
0590 
0591 int vnic_dev_stats_dump(struct vnic_dev *vdev, struct vnic_stats **stats)
0592 {
0593     u64 a0, a1;
0594     int wait = 1000;
0595 
0596     if (!vdev->stats) {
0597         vdev->stats = dma_alloc_coherent(&vdev->pdev->dev,
0598             sizeof(struct vnic_stats), &vdev->stats_pa, GFP_KERNEL);
0599         if (!vdev->stats)
0600             return -ENOMEM;
0601     }
0602 
0603     *stats = vdev->stats;
0604     a0 = vdev->stats_pa;
0605     a1 = sizeof(struct vnic_stats);
0606 
0607     return vnic_dev_cmd(vdev, CMD_STATS_DUMP, &a0, &a1, wait);
0608 }
0609 
0610 int vnic_dev_close(struct vnic_dev *vdev)
0611 {
0612     u64 a0 = 0, a1 = 0;
0613     int wait = 1000;
0614     return vnic_dev_cmd(vdev, CMD_CLOSE, &a0, &a1, wait);
0615 }
0616 
0617 int vnic_dev_enable(struct vnic_dev *vdev)
0618 {
0619     u64 a0 = 0, a1 = 0;
0620     int wait = 1000;
0621     return vnic_dev_cmd(vdev, CMD_ENABLE, &a0, &a1, wait);
0622 }
0623 
0624 int vnic_dev_disable(struct vnic_dev *vdev)
0625 {
0626     u64 a0 = 0, a1 = 0;
0627     int wait = 1000;
0628     return vnic_dev_cmd(vdev, CMD_DISABLE, &a0, &a1, wait);
0629 }
0630 
0631 int vnic_dev_open(struct vnic_dev *vdev, int arg)
0632 {
0633     u64 a0 = (u32)arg, a1 = 0;
0634     int wait = 1000;
0635     return vnic_dev_cmd(vdev, CMD_OPEN, &a0, &a1, wait);
0636 }
0637 
0638 int vnic_dev_open_done(struct vnic_dev *vdev, int *done)
0639 {
0640     u64 a0 = 0, a1 = 0;
0641     int wait = 1000;
0642     int err;
0643 
0644     *done = 0;
0645 
0646     err = vnic_dev_cmd(vdev, CMD_OPEN_STATUS, &a0, &a1, wait);
0647     if (err)
0648         return err;
0649 
0650     *done = (a0 == 0);
0651 
0652     return 0;
0653 }
0654 
0655 int vnic_dev_soft_reset(struct vnic_dev *vdev, int arg)
0656 {
0657     u64 a0 = (u32)arg, a1 = 0;
0658     int wait = 1000;
0659     return vnic_dev_cmd(vdev, CMD_SOFT_RESET, &a0, &a1, wait);
0660 }
0661 
0662 int vnic_dev_soft_reset_done(struct vnic_dev *vdev, int *done)
0663 {
0664     u64 a0 = 0, a1 = 0;
0665     int wait = 1000;
0666     int err;
0667 
0668     *done = 0;
0669 
0670     err = vnic_dev_cmd(vdev, CMD_SOFT_RESET_STATUS, &a0, &a1, wait);
0671     if (err)
0672         return err;
0673 
0674     *done = (a0 == 0);
0675 
0676     return 0;
0677 }
0678 
0679 int vnic_dev_hang_notify(struct vnic_dev *vdev)
0680 {
0681     u64 a0 = 0, a1 = 0;
0682     int wait = 1000;
0683     return vnic_dev_cmd(vdev, CMD_HANG_NOTIFY, &a0, &a1, wait);
0684 }
0685 
0686 int vnic_dev_mac_addr(struct vnic_dev *vdev, u8 *mac_addr)
0687 {
0688     u64 a[2] = {};
0689     int wait = 1000;
0690     int err, i;
0691 
0692     for (i = 0; i < ETH_ALEN; i++)
0693         mac_addr[i] = 0;
0694 
0695     err = vnic_dev_cmd(vdev, CMD_MAC_ADDR, &a[0], &a[1], wait);
0696     if (err)
0697         return err;
0698 
0699     for (i = 0; i < ETH_ALEN; i++)
0700         mac_addr[i] = ((u8 *)&a)[i];
0701 
0702     return 0;
0703 }
0704 
0705 void vnic_dev_packet_filter(struct vnic_dev *vdev, int directed, int multicast,
0706     int broadcast, int promisc, int allmulti)
0707 {
0708     u64 a0, a1 = 0;
0709     int wait = 1000;
0710     int err;
0711 
0712     a0 = (directed ? CMD_PFILTER_DIRECTED : 0) |
0713          (multicast ? CMD_PFILTER_MULTICAST : 0) |
0714          (broadcast ? CMD_PFILTER_BROADCAST : 0) |
0715          (promisc ? CMD_PFILTER_PROMISCUOUS : 0) |
0716          (allmulti ? CMD_PFILTER_ALL_MULTICAST : 0);
0717 
0718     err = vnic_dev_cmd(vdev, CMD_PACKET_FILTER, &a0, &a1, wait);
0719     if (err)
0720         printk(KERN_ERR "Can't set packet filter\n");
0721 }
0722 
0723 void vnic_dev_add_addr(struct vnic_dev *vdev, u8 *addr)
0724 {
0725     u64 a[2] = {};
0726     int wait = 1000;
0727     int err;
0728     int i;
0729 
0730     for (i = 0; i < ETH_ALEN; i++)
0731         ((u8 *)&a)[i] = addr[i];
0732 
0733     err = vnic_dev_cmd(vdev, CMD_ADDR_ADD, &a[0], &a[1], wait);
0734     if (err)
0735         pr_err("Can't add addr [%pM], %d\n", addr, err);
0736 }
0737 
0738 void vnic_dev_del_addr(struct vnic_dev *vdev, u8 *addr)
0739 {
0740     u64 a[2] = {};
0741     int wait = 1000;
0742     int err;
0743     int i;
0744 
0745     for (i = 0; i < ETH_ALEN; i++)
0746         ((u8 *)&a)[i] = addr[i];
0747 
0748     err = vnic_dev_cmd(vdev, CMD_ADDR_DEL, &a[0], &a[1], wait);
0749     if (err)
0750         pr_err("Can't del addr [%pM], %d\n", addr, err);
0751 }
0752 
0753 int vnic_dev_notify_set(struct vnic_dev *vdev, u16 intr)
0754 {
0755     u64 a0, a1;
0756     int wait = 1000;
0757 
0758     if (!vdev->notify) {
0759         vdev->notify = dma_alloc_coherent(&vdev->pdev->dev,
0760             sizeof(struct vnic_devcmd_notify),
0761             &vdev->notify_pa, GFP_KERNEL);
0762         if (!vdev->notify)
0763             return -ENOMEM;
0764     }
0765 
0766     a0 = vdev->notify_pa;
0767     a1 = ((u64)intr << 32) & 0x0000ffff00000000ULL;
0768     a1 += sizeof(struct vnic_devcmd_notify);
0769 
0770     return vnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);
0771 }
0772 
0773 void vnic_dev_notify_unset(struct vnic_dev *vdev)
0774 {
0775     u64 a0, a1;
0776     int wait = 1000;
0777 
0778     a0 = 0;  /* paddr = 0 to unset notify buffer */
0779     a1 = 0x0000ffff00000000ULL; /* intr num = -1 to unreg for intr */
0780     a1 += sizeof(struct vnic_devcmd_notify);
0781 
0782     vnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);
0783 }
0784 
0785 static int vnic_dev_notify_ready(struct vnic_dev *vdev)
0786 {
0787     u32 *words;
0788     unsigned int nwords = sizeof(struct vnic_devcmd_notify) / 4;
0789     unsigned int i;
0790     u32 csum;
0791 
0792     if (!vdev->notify)
0793         return 0;
0794 
0795     do {
0796         csum = 0;
0797         memcpy(&vdev->notify_copy, vdev->notify,
0798             sizeof(struct vnic_devcmd_notify));
0799         words = (u32 *)&vdev->notify_copy;
0800         for (i = 1; i < nwords; i++)
0801             csum += words[i];
0802     } while (csum != words[0]);
0803 
0804     return 1;
0805 }
0806 
0807 int vnic_dev_init(struct vnic_dev *vdev, int arg)
0808 {
0809     u64 a0 = (u32)arg, a1 = 0;
0810     int wait = 1000;
0811     return vnic_dev_cmd(vdev, CMD_INIT, &a0, &a1, wait);
0812 }
0813 
0814 u16 vnic_dev_set_default_vlan(struct vnic_dev *vdev, u16 new_default_vlan)
0815 {
0816     u64 a0 = new_default_vlan, a1 = 0;
0817     int wait = 1000;
0818     int old_vlan = 0;
0819 
0820     old_vlan = vnic_dev_cmd(vdev, CMD_SET_DEFAULT_VLAN, &a0, &a1, wait);
0821     return (u16)old_vlan;
0822 }
0823 
0824 int vnic_dev_link_status(struct vnic_dev *vdev)
0825 {
0826     if (vdev->linkstatus)
0827         return *vdev->linkstatus;
0828 
0829     if (!vnic_dev_notify_ready(vdev))
0830         return 0;
0831 
0832     return vdev->notify_copy.link_state;
0833 }
0834 
0835 u32 vnic_dev_port_speed(struct vnic_dev *vdev)
0836 {
0837     if (!vnic_dev_notify_ready(vdev))
0838         return 0;
0839 
0840     return vdev->notify_copy.port_speed;
0841 }
0842 
0843 u32 vnic_dev_msg_lvl(struct vnic_dev *vdev)
0844 {
0845     if (!vnic_dev_notify_ready(vdev))
0846         return 0;
0847 
0848     return vdev->notify_copy.msglvl;
0849 }
0850 
0851 u32 vnic_dev_mtu(struct vnic_dev *vdev)
0852 {
0853     if (!vnic_dev_notify_ready(vdev))
0854         return 0;
0855 
0856     return vdev->notify_copy.mtu;
0857 }
0858 
0859 u32 vnic_dev_link_down_cnt(struct vnic_dev *vdev)
0860 {
0861     if (!vnic_dev_notify_ready(vdev))
0862         return 0;
0863 
0864     return vdev->notify_copy.link_down_cnt;
0865 }
0866 
0867 void vnic_dev_set_intr_mode(struct vnic_dev *vdev,
0868     enum vnic_dev_intr_mode intr_mode)
0869 {
0870     vdev->intr_mode = intr_mode;
0871 }
0872 
0873 enum vnic_dev_intr_mode vnic_dev_get_intr_mode(
0874     struct vnic_dev *vdev)
0875 {
0876     return vdev->intr_mode;
0877 }
0878 
0879 void vnic_dev_unregister(struct vnic_dev *vdev)
0880 {
0881     if (vdev) {
0882         if (vdev->notify)
0883             dma_free_coherent(&vdev->pdev->dev,
0884                 sizeof(struct vnic_devcmd_notify),
0885                 vdev->notify,
0886                 vdev->notify_pa);
0887         if (vdev->linkstatus)
0888             dma_free_coherent(&vdev->pdev->dev,
0889                 sizeof(u32),
0890                 vdev->linkstatus,
0891                 vdev->linkstatus_pa);
0892         if (vdev->stats)
0893             dma_free_coherent(&vdev->pdev->dev,
0894                 sizeof(struct vnic_stats),
0895                 vdev->stats, vdev->stats_pa);
0896         if (vdev->fw_info)
0897             dma_free_coherent(&vdev->pdev->dev,
0898                 sizeof(struct vnic_devcmd_fw_info),
0899                 vdev->fw_info, vdev->fw_info_pa);
0900         if (vdev->devcmd2)
0901             vnic_dev_deinit_devcmd2(vdev);
0902         kfree(vdev);
0903     }
0904 }
0905 
0906 struct vnic_dev *vnic_dev_register(struct vnic_dev *vdev,
0907     void *priv, struct pci_dev *pdev, struct vnic_dev_bar *bar)
0908 {
0909     if (!vdev) {
0910         vdev = kzalloc(sizeof(struct vnic_dev), GFP_KERNEL);
0911         if (!vdev)
0912             return NULL;
0913     }
0914 
0915     vdev->priv = priv;
0916     vdev->pdev = pdev;
0917 
0918     if (vnic_dev_discover_res(vdev, bar))
0919         goto err_out;
0920 
0921     return vdev;
0922 
0923 err_out:
0924     vnic_dev_unregister(vdev);
0925     return NULL;
0926 }
0927 
0928 int vnic_dev_cmd_init(struct vnic_dev *vdev)
0929 {
0930     int err;
0931     void *p;
0932 
0933     p = vnic_dev_get_res(vdev, RES_TYPE_DEVCMD2, 0);
0934     if (p) {
0935         pr_err("fnic: DEVCMD2 resource found!\n");
0936         err = vnic_dev_init_devcmd2(vdev);
0937     } else {
0938         pr_err("fnic: DEVCMD2 not found, fall back to Devcmd\n");
0939         err = vnic_dev_init_devcmd1(vdev);
0940     }
0941 
0942     return err;
0943 }
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