drivers/scsi/fdomain.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002
0003 #define FDOMAIN_REGION_SIZE 0x10
0004 #define FDOMAIN_BIOS_SIZE   0x2000
0005
0006 enum {
0007     in_arbitration  = 0x02,
0008     in_selection    = 0x04,
0009     in_other    = 0x08,
0010     disconnect  = 0x10,
0011     aborted     = 0x20,
0012     sent_ident  = 0x40,
0013 };
0014
0015 /* (@) = not present on TMC1800, (#) = not present on TMC1800 and TMC18C50 */
0016 #define REG_SCSI_DATA       0   /* R/W: SCSI Data (with ACK) */
0017 #define REG_BSTAT       1   /* R: SCSI Bus Status */
0018 #define     BSTAT_BSY   BIT(0)   /* Busy */
0019 #define     BSTAT_MSG   BIT(1)   /* Message */
0020 #define     BSTAT_IO    BIT(2)   /* Input/Output */
0021 #define     BSTAT_CMD   BIT(3)   /* Command/Data */
0022 #define     BSTAT_REQ   BIT(4)   /* Request and Not Ack */
0023 #define     BSTAT_SEL   BIT(5)   /* Select */
0024 #define     BSTAT_ACK   BIT(6)   /* Acknowledge and Request */
0025 #define     BSTAT_ATN   BIT(7)   /* Attention */
0026 #define REG_BCTL        1   /* W: SCSI Bus Control */
0027 #define     BCTL_RST    BIT(0)   /* Bus Reset */
0028 #define     BCTL_SEL    BIT(1)   /* Select */
0029 #define     BCTL_BSY    BIT(2)   /* Busy */
0030 #define     BCTL_ATN    BIT(3)   /* Attention */
0031 #define     BCTL_IO     BIT(4)   /* Input/Output */
0032 #define     BCTL_CMD    BIT(5)   /* Command/Data */
0033 #define     BCTL_MSG    BIT(6)   /* Message */
0034 #define     BCTL_BUSEN  BIT(7)   /* Enable bus drivers */
0035 #define REG_ASTAT       2   /* R: Adapter Status 1 */
0036 #define     ASTAT_IRQ   BIT(0)   /* Interrupt active */
0037 #define     ASTAT_ARB   BIT(1)   /* Arbitration complete */
0038 #define     ASTAT_PARERR    BIT(2)   /* Parity error */
0039 #define     ASTAT_RST   BIT(3)   /* SCSI reset occurred */
0040 #define     ASTAT_FIFODIR   BIT(4)   /* FIFO direction */
0041 #define     ASTAT_FIFOEN    BIT(5)   /* FIFO enabled */
0042 #define     ASTAT_PAREN BIT(6)   /* Parity enabled */
0043 #define     ASTAT_BUSEN BIT(7)   /* Bus drivers enabled */
0044 #define REG_ICTL        2   /* W: Interrupt Control */
0045 #define     ICTL_FIFO_MASK  0x0f     /* FIFO threshold, 1/16 FIFO size */
0046 #define     ICTL_FIFO   BIT(4)   /* Int. on FIFO count */
0047 #define     ICTL_ARB    BIT(5)   /* Int. on Arbitration complete */
0048 #define     ICTL_SEL    BIT(6)   /* Int. on SCSI Select */
0049 #define     ICTL_REQ    BIT(7)   /* Int. on SCSI Request */
0050 #define REG_FSTAT       3   /* R: Adapter Status 2 (FIFO) - (@) */
0051 #define     FSTAT_ONOTEMPTY BIT(0)   /* Output FIFO not empty */
0052 #define     FSTAT_INOTEMPTY BIT(1)   /* Input FIFO not empty */
0053 #define     FSTAT_NOTEMPTY  BIT(2)   /* Main FIFO not empty */
0054 #define     FSTAT_NOTFULL   BIT(3)   /* Main FIFO not full */
0055 #define REG_MCTL        3   /* W: SCSI Data Mode Control */
0056 #define     MCTL_ACK_MASK   0x0f     /* Acknowledge period */
0057 #define     MCTL_ACTDEASS   BIT(4)   /* Active deassert of REQ and ACK */
0058 #define     MCTL_TARGET BIT(5)   /* Enable target mode */
0059 #define     MCTL_FASTSYNC   BIT(6)   /* Enable Fast Synchronous */
0060 #define     MCTL_SYNC   BIT(7)   /* Enable Synchronous */
0061 #define REG_INTCOND     4   /* R: Interrupt Condition - (@) */
0062 #define     IRQ_FIFO    BIT(1)   /* FIFO interrupt */
0063 #define     IRQ_REQ     BIT(2)   /* SCSI Request interrupt */
0064 #define     IRQ_SEL     BIT(3)   /* SCSI Select interrupt */
0065 #define     IRQ_ARB     BIT(4)   /* SCSI Arbitration interrupt */
0066 #define     IRQ_RST     BIT(5)   /* SCSI Reset interrupt */
0067 #define     IRQ_FORCED  BIT(6)   /* Forced interrupt */
0068 #define     IRQ_TIMEOUT BIT(7)   /* Bus timeout */
0069 #define REG_ACTL        4   /* W: Adapter Control 1 */
0070 #define     ACTL_RESET  BIT(0)   /* Reset FIFO, parity, reset int. */
0071 #define     ACTL_FIRQ   BIT(1)   /* Set Forced interrupt */
0072 #define     ACTL_ARB    BIT(2)   /* Initiate Bus Arbitration */
0073 #define     ACTL_PAREN  BIT(3)   /* Enable SCSI Parity */
0074 #define     ACTL_IRQEN  BIT(4)   /* Enable interrupts */
0075 #define     ACTL_CLRFIRQ    BIT(5)   /* Clear Forced interrupt */
0076 #define     ACTL_FIFOWR BIT(6)   /* FIFO Direction (1=write) */
0077 #define     ACTL_FIFOEN BIT(7)   /* Enable FIFO */
0078 #define REG_ID_LSB      5   /* R: ID Code (LSB) */
0079 #define REG_ACTL2       5   /* Adapter Control 2 - (@) */
0080 #define     ACTL2_RAMOVRLY  BIT(0)   /* Enable RAM overlay */
0081 #define     ACTL2_SLEEP BIT(7)   /* Sleep mode */
0082 #define REG_ID_MSB      6   /* R: ID Code (MSB) */
0083 #define REG_LOOPBACK        7   /* R/W: Loopback */
0084 #define REG_SCSI_DATA_NOACK 8   /* R/W: SCSI Data (no ACK) */
0085 #define REG_ASTAT3      9   /* R: Adapter Status 3 */
0086 #define     ASTAT3_ACTDEASS BIT(0)   /* Active deassert enabled */
0087 #define     ASTAT3_RAMOVRLY BIT(1)   /* RAM overlay enabled */
0088 #define     ASTAT3_TARGERR  BIT(2)   /* Target error */
0089 #define     ASTAT3_IRQEN    BIT(3)   /* Interrupts enabled */
0090 #define     ASTAT3_IRQMASK  0xf0     /* Enabled interrupts mask */
0091 #define REG_CFG1        10  /* R: Configuration Register 1 */
0092 #define     CFG1_BUS    BIT(0)   /* 0 = ISA */
0093 #define     CFG1_IRQ_MASK   0x0e     /* IRQ jumpers */
0094 #define     CFG1_IO_MASK    0x30     /* I/O base jumpers */
0095 #define     CFG1_BIOS_MASK  0xc0     /* BIOS base jumpers */
0096 #define REG_CFG2        11  /* R/W: Configuration Register 2 (@) */
0097 #define     CFG2_ROMDIS BIT(0)   /* ROM disabled */
0098 #define     CFG2_RAMDIS BIT(1)   /* RAM disabled */
0099 #define     CFG2_IRQEDGE    BIT(2)   /* Edge-triggered interrupts */
0100 #define     CFG2_NOWS   BIT(3)   /* No wait states */
0101 #define     CFG2_32BIT  BIT(7)   /* 32-bit mode */
0102 #define REG_FIFO        12  /* R/W: FIFO */
0103 #define REG_FIFO_COUNT      14  /* R: FIFO Data Count */
0104
0105 #ifdef CONFIG_PM_SLEEP
0106 static const struct dev_pm_ops __maybe_unused fdomain_pm_ops;
0107 #define FDOMAIN_PM_OPS  (&fdomain_pm_ops)
0108 #else
0109 #define FDOMAIN_PM_OPS  NULL
0110 #endif /* CONFIG_PM_SLEEP */
0111
0112 struct Scsi_Host *fdomain_create(int base, int irq, int this_id,
0113                  struct device *dev);
0114 int fdomain_destroy(struct Scsi_Host *sh);