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0044 #include "atvda.h"
0045
0046 #ifndef ATIOCTL_H
0047 #define ATIOCTL_H
0048
0049 #define EXPRESS_IOCTL_SIGNATURE "Express"
0050 #define EXPRESS_IOCTL_SIGNATURE_SIZE 8
0051
0052
0053
0054 struct __packed atto_express_ioctl_header {
0055 u8 signature[EXPRESS_IOCTL_SIGNATURE_SIZE];
0056 u8 return_code;
0057
0058 #define IOCTL_SUCCESS 0
0059 #define IOCTL_ERR_INVCMD 101
0060 #define IOCTL_INIT_FAILED 102
0061 #define IOCTL_NOT_IMPLEMENTED 103
0062 #define IOCTL_BAD_CHANNEL 104
0063 #define IOCTL_TARGET_OVERRUN 105
0064 #define IOCTL_TARGET_NOT_ENABLED 106
0065 #define IOCTL_BAD_FLASH_IMGTYPE 107
0066 #define IOCTL_OUT_OF_RESOURCES 108
0067 #define IOCTL_GENERAL_ERROR 109
0068 #define IOCTL_INVALID_PARAM 110
0069
0070 u8 channel;
0071 u8 retries;
0072 u8 pad[5];
0073 };
0074
0075
0076
0077
0078
0079 #define MAX_NODE_NAMES 256
0080
0081 struct __packed atto_firmware_rw_request {
0082 u8 function;
0083 #define FUNC_FW_DOWNLOAD 0x09
0084 #define FUNC_FW_UPLOAD 0x12
0085
0086 u8 img_type;
0087 #define FW_IMG_FW 0x01
0088 #define FW_IMG_BIOS 0x02
0089 #define FW_IMG_NVR 0x03
0090 #define FW_IMG_RAW 0x04
0091 #define FW_IMG_FM_API 0x05
0092 #define FW_IMG_FS_API 0x06
0093
0094 u8 pad[2];
0095 u32 img_offset;
0096 u32 img_size;
0097 u8 image[0x80000];
0098 };
0099
0100 struct __packed atto_param_rw_request {
0101 u16 code;
0102 char data_buffer[512];
0103 };
0104
0105 #define MAX_CHANNEL 256
0106
0107 struct __packed atto_channel_list {
0108 u32 num_channels;
0109 u8 channel[MAX_CHANNEL];
0110 };
0111
0112 struct __packed atto_channel_info {
0113 u8 major_rev;
0114 u8 minor_rev;
0115 u8 IRQ;
0116 u8 revision_id;
0117 u8 pci_bus;
0118 u8 pci_dev_func;
0119 u8 core_rev;
0120 u8 host_no;
0121 u16 device_id;
0122 u16 vendor_id;
0123 u16 ven_dev_id;
0124 u8 pad[3];
0125 u32 hbaapi_rev;
0126 };
0127
0128
0129
0130
0131
0132 #define CSMI_CC_GET_DRVR_INFO 1
0133 #define CSMI_CC_GET_CNTLR_CFG 2
0134 #define CSMI_CC_GET_CNTLR_STS 3
0135 #define CSMI_CC_FW_DOWNLOAD 4
0136
0137
0138 #define CSMI_CC_GET_RAID_INFO 10
0139 #define CSMI_CC_GET_RAID_CFG 11
0140
0141
0142 #define CSMI_CC_GET_PHY_INFO 20
0143 #define CSMI_CC_SET_PHY_INFO 21
0144 #define CSMI_CC_GET_LINK_ERRORS 22
0145 #define CSMI_CC_SMP_PASSTHRU 23
0146 #define CSMI_CC_SSP_PASSTHRU 24
0147 #define CSMI_CC_STP_PASSTHRU 25
0148 #define CSMI_CC_GET_SATA_SIG 26
0149 #define CSMI_CC_GET_SCSI_ADDR 27
0150 #define CSMI_CC_GET_DEV_ADDR 28
0151 #define CSMI_CC_TASK_MGT 29
0152 #define CSMI_CC_GET_CONN_INFO 30
0153
0154
0155 #define CSMI_CC_PHY_CTRL 60
0156
0157
0158
0159
0160
0161 #define CSMI_STS_SUCCESS 0
0162 #define CSMI_STS_FAILED 1
0163 #define CSMI_STS_BAD_CTRL_CODE 2
0164 #define CSMI_STS_INV_PARAM 3
0165 #define CSMI_STS_WRITE_ATTEMPTED 4
0166
0167
0168 #define CSMI_STS_INV_RAID_SET 1000
0169
0170
0171 #define CSMI_STS_PHY_CHANGED CSMI_STS_SUCCESS
0172 #define CSMI_STS_PHY_UNCHANGEABLE 2000
0173 #define CSMI_STS_INV_LINK_RATE 2001
0174 #define CSMI_STS_INV_PHY 2002
0175 #define CSMI_STS_INV_PHY_FOR_PORT 2003
0176 #define CSMI_STS_PHY_UNSELECTABLE 2004
0177 #define CSMI_STS_SELECT_PHY_OR_PORT 2005
0178 #define CSMI_STS_INV_PORT 2006
0179 #define CSMI_STS_PORT_UNSELECTABLE 2007
0180 #define CSMI_STS_CONNECTION_FAILED 2008
0181 #define CSMI_STS_NO_SATA_DEV 2009
0182 #define CSMI_STS_NO_SATA_SIGNATURE 2010
0183 #define CSMI_STS_SCSI_EMULATION 2011
0184 #define CSMI_STS_NOT_AN_END_DEV 2012
0185 #define CSMI_STS_NO_SCSI_ADDR 2013
0186 #define CSMI_STS_NO_DEV_ADDR 2014
0187
0188
0189 struct atto_csmi_get_driver_info {
0190 char name[81];
0191 char description[81];
0192 u16 major_rev;
0193 u16 minor_rev;
0194 u16 build_rev;
0195 u16 release_rev;
0196 u16 csmi_major_rev;
0197 u16 csmi_minor_rev;
0198 #define CSMI_MAJOR_REV_0_81 0
0199 #define CSMI_MINOR_REV_0_81 81
0200
0201 #define CSMI_MAJOR_REV CSMI_MAJOR_REV_0_81
0202 #define CSMI_MINOR_REV CSMI_MINOR_REV_0_81
0203 };
0204
0205 struct atto_csmi_get_pci_bus_addr {
0206 u8 bus_num;
0207 u8 device_num;
0208 u8 function_num;
0209 u8 reserved;
0210 };
0211
0212 struct atto_csmi_get_cntlr_cfg {
0213 u32 base_io_addr;
0214
0215 struct {
0216 u32 base_memaddr_lo;
0217 u32 base_memaddr_hi;
0218 };
0219
0220 u32 board_id;
0221 u16 slot_num;
0222 #define CSMI_SLOT_NUM_UNKNOWN 0xFFFF
0223
0224 u8 cntlr_class;
0225 #define CSMI_CNTLR_CLASS_HBA 5
0226
0227 u8 io_bus_type;
0228 #define CSMI_BUS_TYPE_PCI 3
0229 #define CSMI_BUS_TYPE_PCMCIA 4
0230
0231 union {
0232 struct atto_csmi_get_pci_bus_addr pci_addr;
0233 u8 reserved[32];
0234 };
0235
0236 char serial_num[81];
0237 u16 major_rev;
0238 u16 minor_rev;
0239 u16 build_rev;
0240 u16 release_rev;
0241 u16 bios_major_rev;
0242 u16 bios_minor_rev;
0243 u16 bios_build_rev;
0244 u16 bios_release_rev;
0245 u32 cntlr_flags;
0246 #define CSMI_CNTLRF_SAS_HBA 0x00000001
0247 #define CSMI_CNTLRF_SAS_RAID 0x00000002
0248 #define CSMI_CNTLRF_SATA_HBA 0x00000004
0249 #define CSMI_CNTLRF_SATA_RAID 0x00000008
0250 #define CSMI_CNTLRF_FWD_SUPPORT 0x00010000
0251 #define CSMI_CNTLRF_FWD_ONLINE 0x00020000
0252 #define CSMI_CNTLRF_FWD_SRESET 0x00040000
0253 #define CSMI_CNTLRF_FWD_HRESET 0x00080000
0254 #define CSMI_CNTLRF_FWD_RROM 0x00100000
0255
0256 u16 rrom_major_rev;
0257 u16 rrom_minor_rev;
0258 u16 rrom_build_rev;
0259 u16 rrom_release_rev;
0260 u16 rrom_biosmajor_rev;
0261 u16 rrom_biosminor_rev;
0262 u16 rrom_biosbuild_rev;
0263 u16 rrom_biosrelease_rev;
0264 u8 reserved2[7];
0265 };
0266
0267 struct atto_csmi_get_cntlr_sts {
0268 u32 status;
0269 #define CSMI_CNTLR_STS_GOOD 1
0270 #define CSMI_CNTLR_STS_FAILED 2
0271 #define CSMI_CNTLR_STS_OFFLINE 3
0272 #define CSMI_CNTLR_STS_POWEROFF 4
0273
0274 u32 offline_reason;
0275 #define CSMI_OFFLINE_NO_REASON 0
0276 #define CSMI_OFFLINE_INITIALIZING 1
0277 #define CSMI_OFFLINE_BUS_DEGRADED 2
0278 #define CSMI_OFFLINE_BUS_FAILURE 3
0279
0280 u8 reserved[28];
0281 };
0282
0283 struct atto_csmi_fw_download {
0284 u32 buffer_len;
0285 u32 download_flags;
0286 #define CSMI_FWDF_VALIDATE 0x00000001
0287 #define CSMI_FWDF_SOFT_RESET 0x00000002
0288 #define CSMI_FWDF_HARD_RESET 0x00000004
0289
0290 u8 reserved[32];
0291 u16 status;
0292 #define CSMI_FWD_STS_SUCCESS 0
0293 #define CSMI_FWD_STS_FAILED 1
0294 #define CSMI_FWD_STS_USING_RROM 2
0295 #define CSMI_FWD_STS_REJECT 3
0296 #define CSMI_FWD_STS_DOWNREV 4
0297
0298 u16 severity;
0299 #define CSMI_FWD_SEV_INFO 0
0300 #define CSMI_FWD_SEV_WARNING 1
0301 #define CSMI_FWD_SEV_ERROR 2
0302 #define CSMI_FWD_SEV_FATAL 3
0303
0304 };
0305
0306
0307 struct atto_csmi_get_raid_info {
0308 u32 num_raid_sets;
0309 u32 max_drivesper_set;
0310 u8 reserved[92];
0311 };
0312
0313 struct atto_csmi_raid_drives {
0314 char model[40];
0315 char firmware[8];
0316 char serial_num[40];
0317 u8 sas_addr[8];
0318 u8 lun[8];
0319 u8 drive_sts;
0320 #define CSMI_DRV_STS_OK 0
0321 #define CSMI_DRV_STS_REBUILDING 1
0322 #define CSMI_DRV_STS_FAILED 2
0323 #define CSMI_DRV_STS_DEGRADED 3
0324
0325 u8 drive_usage;
0326 #define CSMI_DRV_USE_NOT_USED 0
0327 #define CSMI_DRV_USE_MEMBER 1
0328 #define CSMI_DRV_USE_SPARE 2
0329
0330 u8 reserved[30];
0331 };
0332
0333 struct atto_csmi_get_raid_cfg {
0334 u32 raid_set_index;
0335 u32 capacity;
0336 u32 stripe_size;
0337 u8 raid_type;
0338 u8 status;
0339 u8 information;
0340 u8 drive_cnt;
0341 u8 reserved[20];
0342
0343 struct atto_csmi_raid_drives drives[1];
0344 };
0345
0346
0347 struct atto_csmi_phy_entity {
0348 u8 ident_frame[0x1C];
0349 u8 port_id;
0350 u8 neg_link_rate;
0351 u8 min_link_rate;
0352 u8 max_link_rate;
0353 u8 phy_change_cnt;
0354 u8 auto_discover;
0355 #define CSMI_DISC_NOT_SUPPORTED 0x00
0356 #define CSMI_DISC_NOT_STARTED 0x01
0357 #define CSMI_DISC_IN_PROGRESS 0x02
0358 #define CSMI_DISC_COMPLETE 0x03
0359 #define CSMI_DISC_ERROR 0x04
0360
0361 u8 reserved[2];
0362 u8 attach_ident_frame[0x1C];
0363 };
0364
0365 struct atto_csmi_get_phy_info {
0366 u8 number_of_phys;
0367 u8 reserved[3];
0368 struct atto_csmi_phy_entity
0369 phy[32];
0370 };
0371
0372 struct atto_csmi_set_phy_info {
0373 u8 phy_id;
0374 u8 neg_link_rate;
0375 #define CSMI_NEG_RATE_NEGOTIATE 0x00
0376 #define CSMI_NEG_RATE_PHY_DIS 0x01
0377
0378 u8 prog_minlink_rate;
0379 u8 prog_maxlink_rate;
0380 u8 signal_class;
0381 #define CSMI_SIG_CLASS_UNKNOWN 0x00
0382 #define CSMI_SIG_CLASS_DIRECT 0x01
0383 #define CSMI_SIG_CLASS_SERVER 0x02
0384 #define CSMI_SIG_CLASS_ENCLOSURE 0x03
0385
0386 u8 reserved[3];
0387 };
0388
0389 struct atto_csmi_get_link_errors {
0390 u8 phy_id;
0391 u8 reset_cnts;
0392 #define CSMI_RESET_CNTS_NO 0x00
0393 #define CSMI_RESET_CNTS_YES 0x01
0394
0395 u8 reserved[2];
0396 u32 inv_dw_cnt;
0397 u32 disp_err_cnt;
0398 u32 loss_ofdw_sync_cnt;
0399 u32 phy_reseterr_cnt;
0400
0401
0402
0403
0404
0405
0406
0407
0408 u32 crc_err_cnt;
0409 };
0410
0411 struct atto_csmi_smp_passthru {
0412 u8 phy_id;
0413 u8 port_id;
0414 u8 conn_rate;
0415 u8 reserved;
0416 u8 dest_sas_addr[8];
0417 u32 req_len;
0418 u8 smp_req[1020];
0419 u8 conn_sts;
0420 u8 reserved2[3];
0421 u32 rsp_len;
0422 u8 smp_rsp[1020];
0423 };
0424
0425 struct atto_csmi_ssp_passthru_sts {
0426 u8 conn_sts;
0427 u8 reserved[3];
0428 u8 data_present;
0429 u8 status;
0430 u16 rsp_length;
0431 u8 rsp[256];
0432 u32 data_bytes;
0433 };
0434
0435 struct atto_csmi_ssp_passthru {
0436 u8 phy_id;
0437 u8 port_id;
0438 u8 conn_rate;
0439 u8 reserved;
0440 u8 dest_sas_addr[8];
0441 u8 lun[8];
0442 u8 cdb_len;
0443 u8 add_cdb_len;
0444 u8 reserved2[2];
0445 u8 cdb[16];
0446 u32 flags;
0447 #define CSMI_SSPF_DD_READ 0x00000001
0448 #define CSMI_SSPF_DD_WRITE 0x00000002
0449 #define CSMI_SSPF_DD_UNSPECIFIED 0x00000004
0450 #define CSMI_SSPF_TA_SIMPLE 0x00000000
0451 #define CSMI_SSPF_TA_HEAD_OF_Q 0x00000010
0452 #define CSMI_SSPF_TA_ORDERED 0x00000020
0453 #define CSMI_SSPF_TA_ACA 0x00000040
0454
0455 u8 add_cdb[24];
0456 u32 data_len;
0457
0458 struct atto_csmi_ssp_passthru_sts sts;
0459 };
0460
0461 struct atto_csmi_stp_passthru_sts {
0462 u8 conn_sts;
0463 u8 reserved[3];
0464 u8 sts_fis[20];
0465 u32 scr[16];
0466 u32 data_bytes;
0467 };
0468
0469 struct atto_csmi_stp_passthru {
0470 u8 phy_id;
0471 u8 port_id;
0472 u8 conn_rate;
0473 u8 reserved;
0474 u8 dest_sas_addr[8];
0475 u8 reserved2[4];
0476 u8 command_fis[20];
0477 u32 flags;
0478 #define CSMI_STPF_DD_READ 0x00000001
0479 #define CSMI_STPF_DD_WRITE 0x00000002
0480 #define CSMI_STPF_DD_UNSPECIFIED 0x00000004
0481 #define CSMI_STPF_PIO 0x00000010
0482 #define CSMI_STPF_DMA 0x00000020
0483 #define CSMI_STPF_PACKET 0x00000040
0484 #define CSMI_STPF_DMA_QUEUED 0x00000080
0485 #define CSMI_STPF_EXECUTE_DIAG 0x00000100
0486 #define CSMI_STPF_RESET_DEVICE 0x00000200
0487
0488 u32 data_len;
0489
0490 struct atto_csmi_stp_passthru_sts sts;
0491 };
0492
0493 struct atto_csmi_get_sata_sig {
0494 u8 phy_id;
0495 u8 reserved[3];
0496 u8 reg_dth_fis[20];
0497 };
0498
0499 struct atto_csmi_get_scsi_addr {
0500 u8 sas_addr[8];
0501 u8 sas_lun[8];
0502 u8 host_index;
0503 u8 path_id;
0504 u8 target_id;
0505 u8 lun;
0506 };
0507
0508 struct atto_csmi_get_dev_addr {
0509 u8 host_index;
0510 u8 path_id;
0511 u8 target_id;
0512 u8 lun;
0513 u8 sas_addr[8];
0514 u8 sas_lun[8];
0515 };
0516
0517 struct atto_csmi_task_mgmt {
0518 u8 host_index;
0519 u8 path_id;
0520 u8 target_id;
0521 u8 lun;
0522 u32 flags;
0523 #define CSMI_TMF_TASK_IU 0x00000001
0524 #define CSMI_TMF_HARD_RST 0x00000002
0525 #define CSMI_TMF_SUPPRESS_RSLT 0x00000004
0526
0527 u32 queue_tag;
0528 u32 reserved;
0529 u8 task_mgt_func;
0530 u8 reserved2[7];
0531 u32 information;
0532 #define CSMI_TM_INFO_TEST 1
0533 #define CSMI_TM_INFO_EXCEEDED 2
0534 #define CSMI_TM_INFO_DEMAND 3
0535 #define CSMI_TM_INFO_TRIGGER 4
0536
0537 struct atto_csmi_ssp_passthru_sts sts;
0538
0539 };
0540
0541 struct atto_csmi_get_conn_info {
0542 u32 pinout;
0543 #define CSMI_CON_UNKNOWN 0x00000001
0544 #define CSMI_CON_SFF_8482 0x00000002
0545 #define CSMI_CON_SFF_8470_LANE_1 0x00000100
0546 #define CSMI_CON_SFF_8470_LANE_2 0x00000200
0547 #define CSMI_CON_SFF_8470_LANE_3 0x00000400
0548 #define CSMI_CON_SFF_8470_LANE_4 0x00000800
0549 #define CSMI_CON_SFF_8484_LANE_1 0x00010000
0550 #define CSMI_CON_SFF_8484_LANE_2 0x00020000
0551 #define CSMI_CON_SFF_8484_LANE_3 0x00040000
0552 #define CSMI_CON_SFF_8484_LANE_4 0x00080000
0553
0554 u8 connector[16];
0555 u8 location;
0556 #define CSMI_CON_INTERNAL 0x02
0557 #define CSMI_CON_EXTERNAL 0x04
0558 #define CSMI_CON_SWITCHABLE 0x08
0559 #define CSMI_CON_AUTO 0x10
0560
0561 u8 reserved[15];
0562 };
0563
0564
0565 struct atto_csmi_character {
0566 u8 type_flags;
0567 #define CSMI_CTF_POS_DISP 0x01
0568 #define CSMI_CTF_NEG_DISP 0x02
0569 #define CSMI_CTF_CTRL_CHAR 0x04
0570
0571 u8 value;
0572 };
0573
0574 struct atto_csmi_pc_ctrl {
0575 u8 type;
0576 #define CSMI_PC_TYPE_UNDEFINED 0x00
0577 #define CSMI_PC_TYPE_SATA 0x01
0578 #define CSMI_PC_TYPE_SAS 0x02
0579 u8 rate;
0580 u8 reserved[6];
0581 u32 vendor_unique[8];
0582 u32 tx_flags;
0583 #define CSMI_PC_TXF_PREEMP_DIS 0x00000001
0584
0585 signed char tx_amplitude;
0586 signed char tx_preemphasis;
0587 signed char tx_slew_rate;
0588 signed char tx_reserved[13];
0589 u8 tx_vendor_unique[64];
0590 u32 rx_flags;
0591 #define CSMI_PC_RXF_EQ_DIS 0x00000001
0592
0593 signed char rx_threshold;
0594 signed char rx_equalization_gain;
0595 signed char rx_reserved[14];
0596 u8 rx_vendor_unique[64];
0597 u32 pattern_flags;
0598 #define CSMI_PC_PATF_FIXED 0x00000001
0599 #define CSMI_PC_PATF_DIS_SCR 0x00000002
0600 #define CSMI_PC_PATF_DIS_ALIGN 0x00000004
0601 #define CSMI_PC_PATF_DIS_SSC 0x00000008
0602
0603 u8 fixed_pattern;
0604 #define CSMI_PC_FP_CJPAT 0x00000001
0605 #define CSMI_PC_FP_ALIGN 0x00000002
0606
0607 u8 user_pattern_len;
0608 u8 pattern_reserved[6];
0609
0610 struct atto_csmi_character user_pattern_buffer[16];
0611 };
0612
0613 struct atto_csmi_phy_ctrl {
0614 u32 function;
0615 #define CSMI_PC_FUNC_GET_SETUP 0x00000100
0616
0617 u8 phy_id;
0618 u16 len_of_cntl;
0619 u8 num_of_cntls;
0620 u8 reserved[4];
0621 u32 link_flags;
0622 #define CSMI_PHY_ACTIVATE_CTRL 0x00000001
0623 #define CSMI_PHY_UPD_SPINUP_RATE 0x00000002
0624 #define CSMI_PHY_AUTO_COMWAKE 0x00000004
0625
0626 u8 spinup_rate;
0627 u8 link_reserved[7];
0628 u32 vendor_unique[8];
0629
0630 struct atto_csmi_pc_ctrl control[1];
0631 };
0632
0633 union atto_ioctl_csmi {
0634 struct atto_csmi_get_driver_info drvr_info;
0635 struct atto_csmi_get_cntlr_cfg cntlr_cfg;
0636 struct atto_csmi_get_cntlr_sts cntlr_sts;
0637 struct atto_csmi_fw_download fw_dwnld;
0638 struct atto_csmi_get_raid_info raid_info;
0639 struct atto_csmi_get_raid_cfg raid_cfg;
0640 struct atto_csmi_get_phy_info get_phy_info;
0641 struct atto_csmi_set_phy_info set_phy_info;
0642 struct atto_csmi_get_link_errors link_errs;
0643 struct atto_csmi_smp_passthru smp_pass_thru;
0644 struct atto_csmi_ssp_passthru ssp_pass_thru;
0645 struct atto_csmi_stp_passthru stp_pass_thru;
0646 struct atto_csmi_task_mgmt tsk_mgt;
0647 struct atto_csmi_get_sata_sig sata_sig;
0648 struct atto_csmi_get_scsi_addr scsi_addr;
0649 struct atto_csmi_get_dev_addr dev_addr;
0650 struct atto_csmi_get_conn_info conn_info[32];
0651 struct atto_csmi_phy_ctrl phy_ctrl;
0652 };
0653
0654 struct atto_csmi {
0655 u32 control_code;
0656 u32 status;
0657 union atto_ioctl_csmi data;
0658 };
0659
0660 struct atto_module_info {
0661 void *adapter;
0662 void *pci_dev;
0663 void *scsi_host;
0664 unsigned short host_no;
0665 union {
0666 struct {
0667 u64 node_name;
0668 u64 port_name;
0669 };
0670 u64 sas_addr;
0671 };
0672 };
0673
0674 #define ATTO_FUNC_GET_ADAP_INFO 0x00
0675 #define ATTO_VER_GET_ADAP_INFO0 0
0676 #define ATTO_VER_GET_ADAP_INFO ATTO_VER_GET_ADAP_INFO0
0677
0678 struct __packed atto_hba_get_adapter_info {
0679
0680 struct {
0681 u16 vendor_id;
0682 u16 device_id;
0683 u16 ss_vendor_id;
0684 u16 ss_device_id;
0685 u8 class_code[3];
0686 u8 rev_id;
0687 u8 bus_num;
0688 u8 dev_num;
0689 u8 func_num;
0690 u8 link_width_max;
0691 u8 link_width_curr;
0692 #define ATTO_GAI_PCILW_UNKNOWN 0x00
0693
0694 u8 link_speed_max;
0695 u8 link_speed_curr;
0696 #define ATTO_GAI_PCILS_UNKNOWN 0x00
0697 #define ATTO_GAI_PCILS_GEN1 0x01
0698 #define ATTO_GAI_PCILS_GEN2 0x02
0699 #define ATTO_GAI_PCILS_GEN3 0x03
0700
0701 u8 interrupt_mode;
0702 #define ATTO_GAI_PCIIM_UNKNOWN 0x00
0703 #define ATTO_GAI_PCIIM_LEGACY 0x01
0704 #define ATTO_GAI_PCIIM_MSI 0x02
0705 #define ATTO_GAI_PCIIM_MSIX 0x03
0706
0707 u8 msi_vector_cnt;
0708 u8 reserved[19];
0709 } pci;
0710
0711 u8 adap_type;
0712 #define ATTO_GAI_AT_EPCIU320 0x00
0713 #define ATTO_GAI_AT_ESASRAID 0x01
0714 #define ATTO_GAI_AT_ESASRAID2 0x02
0715 #define ATTO_GAI_AT_ESASHBA 0x03
0716 #define ATTO_GAI_AT_ESASHBA2 0x04
0717 #define ATTO_GAI_AT_CELERITY 0x05
0718 #define ATTO_GAI_AT_CELERITY8 0x06
0719 #define ATTO_GAI_AT_FASTFRAME 0x07
0720 #define ATTO_GAI_AT_ESASHBA3 0x08
0721 #define ATTO_GAI_AT_CELERITY16 0x09
0722 #define ATTO_GAI_AT_TLSASHBA 0x0A
0723 #define ATTO_GAI_AT_ESASHBA4 0x0B
0724
0725 u8 adap_flags;
0726 #define ATTO_GAI_AF_DEGRADED 0x01
0727 #define ATTO_GAI_AF_SPT_SUPP 0x02
0728 #define ATTO_GAI_AF_DEVADDR_SUPP 0x04
0729 #define ATTO_GAI_AF_PHYCTRL_SUPP 0x08
0730 #define ATTO_GAI_AF_TEST_SUPP 0x10
0731 #define ATTO_GAI_AF_DIAG_SUPP 0x20
0732 #define ATTO_GAI_AF_VIRT_SES 0x40
0733 #define ATTO_GAI_AF_CONN_CTRL 0x80
0734
0735 u8 num_ports;
0736 u8 num_phys;
0737 u8 drvr_rev_major;
0738 u8 drvr_rev_minor;
0739 u8 drvr_revsub_minor;
0740 u8 drvr_rev_build;
0741 char drvr_rev_ascii[16];
0742 char drvr_name[32];
0743 char firmware_rev[16];
0744 char flash_rev[16];
0745 char model_name_short[16];
0746 char model_name[32];
0747 u32 num_targets;
0748 u32 num_targsper_bus;
0749 u32 num_lunsper_targ;
0750 u8 num_busses;
0751 u8 num_connectors;
0752 u8 adap_flags2;
0753 #define ATTO_GAI_AF2_FCOE_SUPP 0x01
0754 #define ATTO_GAI_AF2_NIC_SUPP 0x02
0755 #define ATTO_GAI_AF2_LOCATE_SUPP 0x04
0756 #define ATTO_GAI_AF2_ADAP_CTRL_SUPP 0x08
0757 #define ATTO_GAI_AF2_DEV_INFO_SUPP 0x10
0758 #define ATTO_GAI_AF2_NPIV_SUPP 0x20
0759 #define ATTO_GAI_AF2_MP_SUPP 0x40
0760
0761 u8 num_temp_sensors;
0762 u32 num_targets_backend;
0763 u32 tunnel_flags;
0764 #define ATTO_GAI_TF_MEM_RW 0x00000001
0765 #define ATTO_GAI_TF_TRACE 0x00000002
0766 #define ATTO_GAI_TF_SCSI_PASS_THRU 0x00000004
0767 #define ATTO_GAI_TF_GET_DEV_ADDR 0x00000008
0768 #define ATTO_GAI_TF_PHY_CTRL 0x00000010
0769 #define ATTO_GAI_TF_CONN_CTRL 0x00000020
0770 #define ATTO_GAI_TF_GET_DEV_INFO 0x00000040
0771
0772 u8 reserved3[0x138];
0773 };
0774
0775 #define ATTO_FUNC_GET_ADAP_ADDR 0x01
0776 #define ATTO_VER_GET_ADAP_ADDR0 0
0777 #define ATTO_VER_GET_ADAP_ADDR ATTO_VER_GET_ADAP_ADDR0
0778
0779 struct __packed atto_hba_get_adapter_address {
0780
0781 u8 addr_type;
0782 #define ATTO_GAA_AT_PORT 0x00
0783 #define ATTO_GAA_AT_NODE 0x01
0784 #define ATTO_GAA_AT_CURR_MAC 0x02
0785 #define ATTO_GAA_AT_PERM_MAC 0x03
0786 #define ATTO_GAA_AT_VNIC 0x04
0787
0788 u8 port_id;
0789 u16 addr_len;
0790 u8 address[256];
0791 };
0792
0793 #define ATTO_FUNC_MEM_RW 0x02
0794 #define ATTO_VER_MEM_RW0 0
0795 #define ATTO_VER_MEM_RW ATTO_VER_MEM_RW0
0796
0797 struct __packed atto_hba_memory_read_write {
0798 u8 mem_func;
0799 u8 mem_type;
0800 union {
0801 u8 pci_index;
0802 u8 i2c_dev;
0803 };
0804 u8 i2c_status;
0805 u32 length;
0806 u64 address;
0807 u8 reserved[48];
0808
0809 };
0810
0811 #define ATTO_FUNC_TRACE 0x03
0812 #define ATTO_VER_TRACE0 0
0813 #define ATTO_VER_TRACE1 1
0814 #define ATTO_VER_TRACE ATTO_VER_TRACE1
0815
0816 struct __packed atto_hba_trace {
0817 u8 trace_func;
0818 #define ATTO_TRC_TF_GET_INFO 0x00
0819 #define ATTO_TRC_TF_ENABLE 0x01
0820 #define ATTO_TRC_TF_DISABLE 0x02
0821 #define ATTO_TRC_TF_SET_MASK 0x03
0822 #define ATTO_TRC_TF_UPLOAD 0x04
0823 #define ATTO_TRC_TF_RESET 0x05
0824
0825 u8 trace_type;
0826 #define ATTO_TRC_TT_DRIVER 0x00
0827 #define ATTO_TRC_TT_FWCOREDUMP 0x01
0828
0829 u8 reserved[2];
0830 u32 current_offset;
0831 u32 total_length;
0832 u32 trace_mask;
0833 u8 reserved2[48];
0834 };
0835
0836 #define ATTO_FUNC_SCSI_PASS_THRU 0x04
0837 #define ATTO_VER_SCSI_PASS_THRU0 0
0838 #define ATTO_VER_SCSI_PASS_THRU ATTO_VER_SCSI_PASS_THRU0
0839
0840 struct __packed atto_hba_scsi_pass_thru {
0841 u8 cdb[32];
0842 u8 cdb_length;
0843 u8 req_status;
0844 #define ATTO_SPT_RS_SUCCESS 0x00
0845 #define ATTO_SPT_RS_FAILED 0x01
0846 #define ATTO_SPT_RS_OVERRUN 0x02
0847 #define ATTO_SPT_RS_UNDERRUN 0x03
0848 #define ATTO_SPT_RS_NO_DEVICE 0x04
0849 #define ATTO_SPT_RS_NO_LUN 0x05
0850 #define ATTO_SPT_RS_TIMEOUT 0x06
0851 #define ATTO_SPT_RS_BUS_RESET 0x07
0852 #define ATTO_SPT_RS_ABORTED 0x08
0853 #define ATTO_SPT_RS_BUSY 0x09
0854 #define ATTO_SPT_RS_DEGRADED 0x0A
0855
0856 u8 scsi_status;
0857 u8 sense_length;
0858 u32 flags;
0859 #define ATTO_SPTF_DATA_IN 0x00000001
0860 #define ATTO_SPTF_DATA_OUT 0x00000002
0861 #define ATTO_SPTF_SIMPLE_Q 0x00000004
0862 #define ATTO_SPTF_HEAD_OF_Q 0x00000008
0863 #define ATTO_SPTF_ORDERED_Q 0x00000010
0864
0865 u32 timeout;
0866 u32 target_id;
0867 u8 lun[8];
0868 u32 residual_length;
0869 u8 sense_data[0xFC];
0870 u8 reserved[0x28];
0871 };
0872
0873 #define ATTO_FUNC_GET_DEV_ADDR 0x05
0874 #define ATTO_VER_GET_DEV_ADDR0 0
0875 #define ATTO_VER_GET_DEV_ADDR ATTO_VER_GET_DEV_ADDR0
0876
0877 struct __packed atto_hba_get_device_address {
0878 u8 addr_type;
0879 #define ATTO_GDA_AT_PORT 0x00
0880 #define ATTO_GDA_AT_NODE 0x01
0881 #define ATTO_GDA_AT_MAC 0x02
0882 #define ATTO_GDA_AT_PORTID 0x03
0883 #define ATTO_GDA_AT_UNIQUE 0x04
0884
0885 u8 reserved;
0886 u16 addr_len;
0887 u32 target_id;
0888 u8 address[256];
0889 };
0890
0891
0892
0893
0894 #define ATTO_FUNC_PHY_CTRL 0x06
0895 #define ATTO_FUNC_CONN_CTRL 0x0C
0896 #define ATTO_FUNC_ADAP_CTRL 0x0E
0897 #define ATTO_VER_ADAP_CTRL0 0
0898 #define ATTO_VER_ADAP_CTRL ATTO_VER_ADAP_CTRL0
0899
0900 struct __packed atto_hba_adap_ctrl {
0901 u8 adap_func;
0902 #define ATTO_AC_AF_HARD_RST 0x00
0903 #define ATTO_AC_AF_GET_STATE 0x01
0904 #define ATTO_AC_AF_GET_TEMP 0x02
0905
0906 u8 adap_state;
0907 #define ATTO_AC_AS_UNKNOWN 0x00
0908 #define ATTO_AC_AS_OK 0x01
0909 #define ATTO_AC_AS_RST_SCHED 0x02
0910 #define ATTO_AC_AS_RST_IN_PROG 0x03
0911 #define ATTO_AC_AS_RST_DISC 0x04
0912 #define ATTO_AC_AS_DEGRADED 0x05
0913 #define ATTO_AC_AS_DISABLED 0x06
0914 #define ATTO_AC_AS_TEMP 0x07
0915
0916 u8 reserved[2];
0917
0918 union {
0919 struct {
0920 u8 temp_sensor;
0921 u8 temp_state;
0922
0923 #define ATTO_AC_TS_UNSUPP 0x00
0924 #define ATTO_AC_TS_UNKNOWN 0x01
0925 #define ATTO_AC_TS_INIT_FAILED 0x02
0926 #define ATTO_AC_TS_NORMAL 0x03
0927 #define ATTO_AC_TS_OUT_OF_RANGE 0x04
0928 #define ATTO_AC_TS_FAULT 0x05
0929
0930 signed short temp_value;
0931 signed short temp_lower_lim;
0932 signed short temp_upper_lim;
0933 char temp_desc[32];
0934 u8 reserved2[20];
0935 };
0936 };
0937 };
0938
0939 #define ATTO_FUNC_GET_DEV_INFO 0x0F
0940 #define ATTO_VER_GET_DEV_INFO0 0
0941 #define ATTO_VER_GET_DEV_INFO ATTO_VER_GET_DEV_INFO0
0942
0943 struct __packed atto_hba_sas_device_info {
0944
0945 #define ATTO_SDI_MAX_PHYS_WIDE_PORT 16
0946
0947 u8 phy_id[ATTO_SDI_MAX_PHYS_WIDE_PORT];
0948 #define ATTO_SDI_PHY_ID_INV ATTO_SAS_PHY_ID_INV
0949 u32 exp_target_id;
0950 u32 sas_port_mask;
0951 u8 sas_level;
0952 #define ATTO_SDI_SAS_LVL_INV 0xFF
0953
0954 u8 slot_num;
0955 #define ATTO_SDI_SLOT_NUM_INV ATTO_SLOT_NUM_INV
0956
0957 u8 dev_type;
0958 #define ATTO_SDI_DT_END_DEVICE 0
0959 #define ATTO_SDI_DT_EXPANDER 1
0960 #define ATTO_SDI_DT_PORT_MULT 2
0961
0962 u8 ini_flags;
0963 u8 tgt_flags;
0964 u8 link_rate;
0965 u8 loc_flags;
0966 #define ATTO_SDI_LF_DIRECT 0x01
0967 #define ATTO_SDI_LF_EXPANDER 0x02
0968 #define ATTO_SDI_LF_PORT_MULT 0x04
0969 u8 pm_port;
0970 u8 reserved[0x60];
0971 };
0972
0973 union atto_hba_device_info {
0974 struct atto_hba_sas_device_info sas_dev_info;
0975 };
0976
0977 struct __packed atto_hba_get_device_info {
0978 u32 target_id;
0979 u8 info_type;
0980 #define ATTO_GDI_IT_UNKNOWN 0x00
0981 #define ATTO_GDI_IT_SAS 0x01
0982 #define ATTO_GDI_IT_FC 0x02
0983 #define ATTO_GDI_IT_FCOE 0x03
0984
0985 u8 reserved[11];
0986 union atto_hba_device_info dev_info;
0987 };
0988
0989 struct atto_ioctl {
0990 u8 version;
0991 u8 function;
0992 u8 status;
0993 #define ATTO_STS_SUCCESS 0x00
0994 #define ATTO_STS_FAILED 0x01
0995 #define ATTO_STS_INV_VERSION 0x02
0996 #define ATTO_STS_OUT_OF_RSRC 0x03
0997 #define ATTO_STS_INV_FUNC 0x04
0998 #define ATTO_STS_UNSUPPORTED 0x05
0999 #define ATTO_STS_INV_ADAPTER 0x06
1000 #define ATTO_STS_INV_DRVR_VER 0x07
1001 #define ATTO_STS_INV_PARAM 0x08
1002 #define ATTO_STS_TIMEOUT 0x09
1003 #define ATTO_STS_NOT_APPL 0x0A
1004 #define ATTO_STS_DEGRADED 0x0B
1005
1006 u8 flags;
1007 #define HBAF_TUNNEL 0x01
1008
1009 u32 data_length;
1010 u8 reserved2[56];
1011
1012 union {
1013 u8 byte[1];
1014 struct atto_hba_get_adapter_info get_adap_info;
1015 struct atto_hba_get_adapter_address get_adap_addr;
1016 struct atto_hba_scsi_pass_thru scsi_pass_thru;
1017 struct atto_hba_get_device_address get_dev_addr;
1018 struct atto_hba_adap_ctrl adap_ctrl;
1019 struct atto_hba_get_device_info get_dev_info;
1020 struct atto_hba_trace trace;
1021 } data;
1022
1023 };
1024
1025 struct __packed atto_ioctl_vda_scsi_cmd {
1026
1027 #define ATTO_VDA_SCSI_VER0 0
1028 #define ATTO_VDA_SCSI_VER ATTO_VDA_SCSI_VER0
1029
1030 u8 cdb[16];
1031 u32 flags;
1032 u32 data_length;
1033 u32 residual_length;
1034 u16 target_id;
1035 u8 sense_len;
1036 u8 scsi_stat;
1037 u8 reserved[8];
1038 u8 sense_data[80];
1039 };
1040
1041 struct __packed atto_ioctl_vda_flash_cmd {
1042
1043 #define ATTO_VDA_FLASH_VER0 0
1044 #define ATTO_VDA_FLASH_VER ATTO_VDA_FLASH_VER0
1045
1046 u32 flash_addr;
1047 u32 data_length;
1048 u8 sub_func;
1049 u8 reserved[15];
1050
1051 union {
1052 struct {
1053 u32 flash_size;
1054 u32 page_size;
1055 u8 prod_info[32];
1056 } info;
1057
1058 struct {
1059 char file_name[16];
1060 u32 file_size;
1061 } file;
1062 } data;
1063
1064 };
1065
1066 struct __packed atto_ioctl_vda_diag_cmd {
1067
1068 #define ATTO_VDA_DIAG_VER0 0
1069 #define ATTO_VDA_DIAG_VER ATTO_VDA_DIAG_VER0
1070
1071 u64 local_addr;
1072 u32 data_length;
1073 u8 sub_func;
1074 u8 flags;
1075 u8 reserved[3];
1076 };
1077
1078 struct __packed atto_ioctl_vda_cli_cmd {
1079
1080 #define ATTO_VDA_CLI_VER0 0
1081 #define ATTO_VDA_CLI_VER ATTO_VDA_CLI_VER0
1082
1083 u32 cmd_rsp_len;
1084 };
1085
1086 struct __packed atto_ioctl_vda_smp_cmd {
1087
1088 #define ATTO_VDA_SMP_VER0 0
1089 #define ATTO_VDA_SMP_VER ATTO_VDA_SMP_VER0
1090
1091 u64 dest;
1092 u32 cmd_rsp_len;
1093 };
1094
1095 struct __packed atto_ioctl_vda_cfg_cmd {
1096
1097 #define ATTO_VDA_CFG_VER0 0
1098 #define ATTO_VDA_CFG_VER ATTO_VDA_CFG_VER0
1099
1100 u32 data_length;
1101 u8 cfg_func;
1102 u8 reserved[11];
1103
1104 union {
1105 u8 bytes[112];
1106 struct atto_vda_cfg_init init;
1107 } data;
1108
1109 };
1110
1111 struct __packed atto_ioctl_vda_mgt_cmd {
1112
1113 #define ATTO_VDA_MGT_VER0 0
1114 #define ATTO_VDA_MGT_VER ATTO_VDA_MGT_VER0
1115
1116 u8 mgt_func;
1117 u8 scan_generation;
1118 u16 dev_index;
1119 u32 data_length;
1120 u8 reserved[8];
1121 union {
1122 u8 bytes[112];
1123 struct atto_vda_devinfo dev_info;
1124 struct atto_vda_grp_info grp_info;
1125 struct atto_vdapart_info part_info;
1126 struct atto_vda_dh_info dh_info;
1127 struct atto_vda_metrics_info metrics_info;
1128 struct atto_vda_schedule_info sched_info;
1129 struct atto_vda_n_vcache_info nvcache_info;
1130 struct atto_vda_buzzer_info buzzer_info;
1131 struct atto_vda_adapter_info adapter_info;
1132 struct atto_vda_temp_info temp_info;
1133 struct atto_vda_fan_info fan_info;
1134 } data;
1135 };
1136
1137 struct __packed atto_ioctl_vda_gsv_cmd {
1138
1139 #define ATTO_VDA_GSV_VER0 0
1140 #define ATTO_VDA_GSV_VER ATTO_VDA_GSV_VER0
1141
1142 u8 rsp_len;
1143 u8 reserved[7];
1144 u8 version_info[];
1145 #define ATTO_VDA_VER_UNSUPPORTED 0xFF
1146
1147 };
1148
1149 struct __packed atto_ioctl_vda {
1150 u8 version;
1151 u8 function;
1152 u8 status;
1153 u8 vda_status;
1154 u32 data_length;
1155 u8 reserved[8];
1156
1157 union {
1158 struct atto_ioctl_vda_scsi_cmd scsi;
1159 struct atto_ioctl_vda_flash_cmd flash;
1160 struct atto_ioctl_vda_diag_cmd diag;
1161 struct atto_ioctl_vda_cli_cmd cli;
1162 struct atto_ioctl_vda_smp_cmd smp;
1163 struct atto_ioctl_vda_cfg_cmd cfg;
1164 struct atto_ioctl_vda_mgt_cmd mgt;
1165 struct atto_ioctl_vda_gsv_cmd gsv;
1166 u8 cmd_info[256];
1167 } cmd;
1168
1169 union {
1170 u8 data[1];
1171 struct atto_vda_devinfo2 dev_info2;
1172 } data;
1173
1174 };
1175
1176 struct __packed atto_ioctl_smp {
1177 u8 version;
1178 #define ATTO_SMP_VERSION0 0
1179 #define ATTO_SMP_VERSION1 1
1180 #define ATTO_SMP_VERSION2 2
1181 #define ATTO_SMP_VERSION ATTO_SMP_VERSION2
1182
1183 u8 function;
1184 #define ATTO_SMP_FUNC_DISC_SMP 0x00
1185 #define ATTO_SMP_FUNC_DISC_TARG 0x01
1186 #define ATTO_SMP_FUNC_SEND_CMD 0x02
1187 #define ATTO_SMP_FUNC_DISC_TARG_DIRECT 0x03
1188 #define ATTO_SMP_FUNC_SEND_CMD_DIRECT 0x04
1189 #define ATTO_SMP_FUNC_DISC_SMP_DIRECT 0x05
1190
1191 u8 status;
1192 u8 smp_status;
1193 #define ATTO_SMP_STS_SUCCESS 0x00
1194 #define ATTO_SMP_STS_FAILURE 0x01
1195 #define ATTO_SMP_STS_RESCAN 0x02
1196 #define ATTO_SMP_STS_NOT_FOUND 0x03
1197
1198 u16 target_id;
1199 u8 phy_id;
1200 u8 dev_index;
1201 u64 smp_sas_addr;
1202 u64 targ_sas_addr;
1203 u32 req_length;
1204 u32 rsp_length;
1205 u8 flags;
1206 #define ATTO_SMPF_ROOT_EXP 0x01
1207
1208 u8 reserved[31];
1209
1210 union {
1211 u8 byte[1];
1212 u32 dword[1];
1213 } data;
1214
1215 };
1216
1217 struct __packed atto_express_ioctl {
1218 struct atto_express_ioctl_header header;
1219
1220 union {
1221 struct atto_firmware_rw_request fwrw;
1222 struct atto_param_rw_request prw;
1223 struct atto_channel_list chanlist;
1224 struct atto_channel_info chaninfo;
1225 struct atto_ioctl ioctl_hba;
1226 struct atto_module_info modinfo;
1227 struct atto_ioctl_vda ioctl_vda;
1228 struct atto_ioctl_smp ioctl_smp;
1229 struct atto_csmi csmi;
1230
1231 } data;
1232 };
1233
1234
1235 #define EXPRESS_IOCTL_MIN 0x4500
1236 #define EXPRESS_IOCTL_RW_FIRMWARE 0x4500
1237 #define EXPRESS_IOCTL_READ_PARAMS 0x4501
1238 #define EXPRESS_IOCTL_WRITE_PARAMS 0x4502
1239 #define EXPRESS_IOCTL_FC_API 0x4503
1240 #define EXPRESS_IOCTL_GET_CHANNELS 0x4504
1241 #define EXPRESS_IOCTL_CHAN_INFO 0x4505
1242 #define EXPRESS_IOCTL_DEFAULT_PARAMS 0x4506
1243 #define EXPRESS_ADDR_MEMORY 0x4507
1244 #define EXPRESS_RW_MEMORY 0x4508
1245 #define EXPRESS_TSDK_DUMP 0x4509
1246 #define EXPRESS_IOCTL_SMP 0x450A
1247 #define EXPRESS_CSMI 0x450B
1248 #define EXPRESS_IOCTL_HBA 0x450C
1249 #define EXPRESS_IOCTL_VDA 0x450D
1250 #define EXPRESS_IOCTL_GET_ID 0x450E
1251 #define EXPRESS_IOCTL_GET_MOD_INFO 0x450F
1252 #define EXPRESS_IOCTL_MAX 0x450F
1253
1254 #endif