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0001 /* SPDX-License-Identifier: GPL-2.0 */ 0002 /************************************************************************/ 0003 /* */ 0004 /* dc395x.h */ 0005 /* */ 0006 /* Device Driver for Tekram DC395(U/UW/F), DC315(U) */ 0007 /* PCI SCSI Bus Master Host Adapter */ 0008 /* (SCSI chip set used Tekram ASIC TRM-S1040) */ 0009 /* */ 0010 /************************************************************************/ 0011 #ifndef DC395x_H 0012 #define DC395x_H 0013 0014 /************************************************************************/ 0015 /* */ 0016 /* Initial values */ 0017 /* */ 0018 /************************************************************************/ 0019 #define DC395x_MAX_CMD_QUEUE 32 0020 /* #define DC395x_MAX_QTAGS 32 */ 0021 #define DC395x_MAX_QTAGS 16 0022 #define DC395x_MAX_SCSI_ID 16 0023 #define DC395x_MAX_CMD_PER_LUN DC395x_MAX_QTAGS 0024 #define DC395x_MAX_SG_TABLESIZE 64 /* HW limitation */ 0025 #define DC395x_MAX_SG_LISTENTRY 64 /* Must be equal or lower to previous */ 0026 /* item */ 0027 #define DC395x_MAX_SRB_CNT 63 0028 /* #define DC395x_MAX_CAN_QUEUE 7 * DC395x_MAX_QTAGS */ 0029 #define DC395x_MAX_CAN_QUEUE DC395x_MAX_SRB_CNT 0030 #define DC395x_END_SCAN 2 0031 #define DC395x_SEL_TIMEOUT 153 /* 250 ms selection timeout (@ 40 MHz) */ 0032 #define DC395x_MAX_RETRIES 3 0033 0034 #if 0 0035 #define SYNC_FIRST 0036 #endif 0037 0038 #define NORM_REC_LVL 0 0039 0040 /************************************************************************/ 0041 /* */ 0042 /* Various definitions */ 0043 /* */ 0044 /************************************************************************/ 0045 #define BIT31 0x80000000 0046 #define BIT30 0x40000000 0047 #define BIT29 0x20000000 0048 #define BIT28 0x10000000 0049 #define BIT27 0x08000000 0050 #define BIT26 0x04000000 0051 #define BIT25 0x02000000 0052 #define BIT24 0x01000000 0053 #define BIT23 0x00800000 0054 #define BIT22 0x00400000 0055 #define BIT21 0x00200000 0056 #define BIT20 0x00100000 0057 #define BIT19 0x00080000 0058 #define BIT18 0x00040000 0059 #define BIT17 0x00020000 0060 #define BIT16 0x00010000 0061 #define BIT15 0x00008000 0062 #define BIT14 0x00004000 0063 #define BIT13 0x00002000 0064 #define BIT12 0x00001000 0065 #define BIT11 0x00000800 0066 #define BIT10 0x00000400 0067 #define BIT9 0x00000200 0068 #define BIT8 0x00000100 0069 #define BIT7 0x00000080 0070 #define BIT6 0x00000040 0071 #define BIT5 0x00000020 0072 #define BIT4 0x00000010 0073 #define BIT3 0x00000008 0074 #define BIT2 0x00000004 0075 #define BIT1 0x00000002 0076 #define BIT0 0x00000001 0077 0078 /* UnitCtrlFlag */ 0079 #define UNIT_ALLOCATED BIT0 0080 #define UNIT_INFO_CHANGED BIT1 0081 #define FORMATING_MEDIA BIT2 0082 #define UNIT_RETRY BIT3 0083 0084 /* UnitFlags */ 0085 #define DASD_SUPPORT BIT0 0086 #define SCSI_SUPPORT BIT1 0087 #define ASPI_SUPPORT BIT2 0088 0089 /* SRBState machine definition */ 0090 #define SRB_FREE 0x0000 0091 #define SRB_WAIT 0x0001 0092 #define SRB_READY 0x0002 0093 #define SRB_MSGOUT 0x0004 /* arbitration+msg_out 1st byte */ 0094 #define SRB_MSGIN 0x0008 0095 #define SRB_EXTEND_MSGIN 0x0010 0096 #define SRB_COMMAND 0x0020 0097 #define SRB_START_ 0x0040 /* arbitration+msg_out+command_out */ 0098 #define SRB_DISCONNECT 0x0080 0099 #define SRB_DATA_XFER 0x0100 0100 #define SRB_XFERPAD 0x0200 0101 #define SRB_STATUS 0x0400 0102 #define SRB_COMPLETED 0x0800 0103 #define SRB_ABORT_SENT 0x1000 0104 #define SRB_DO_SYNC_NEGO 0x2000 0105 #define SRB_DO_WIDE_NEGO 0x4000 0106 #define SRB_UNEXPECT_RESEL 0x8000 0107 0108 /************************************************************************/ 0109 /* */ 0110 /* ACB Config */ 0111 /* */ 0112 /************************************************************************/ 0113 #define HCC_WIDE_CARD 0x20 0114 #define HCC_SCSI_RESET 0x10 0115 #define HCC_PARITY 0x08 0116 #define HCC_AUTOTERM 0x04 0117 #define HCC_LOW8TERM 0x02 0118 #define HCC_UP8TERM 0x01 0119 0120 /* ACBFlag */ 0121 #define RESET_DEV BIT0 0122 #define RESET_DETECT BIT1 0123 #define RESET_DONE BIT2 0124 0125 /* DCBFlag */ 0126 #define ABORT_DEV_ BIT0 0127 0128 /* SRBstatus */ 0129 #define SRB_OK BIT0 0130 #define ABORTION BIT1 0131 #define OVER_RUN BIT2 0132 #define UNDER_RUN BIT3 0133 #define PARITY_ERROR BIT4 0134 #define SRB_ERROR BIT5 0135 0136 /* SRBFlag */ 0137 #define DATAOUT BIT7 0138 #define DATAIN BIT6 0139 #define RESIDUAL_VALID BIT5 0140 #define ENABLE_TIMER BIT4 0141 #define RESET_DEV0 BIT2 0142 #define ABORT_DEV BIT1 0143 #define AUTO_REQSENSE BIT0 0144 0145 /* Adapter status */ 0146 #define H_STATUS_GOOD 0 0147 #define H_SEL_TIMEOUT 0x11 0148 #define H_OVER_UNDER_RUN 0x12 0149 #define H_UNEXP_BUS_FREE 0x13 0150 #define H_TARGET_PHASE_F 0x14 0151 #define H_INVALID_CCB_OP 0x16 0152 #define H_LINK_CCB_BAD 0x17 0153 #define H_BAD_TARGET_DIR 0x18 0154 #define H_DUPLICATE_CCB 0x19 0155 #define H_BAD_CCB_OR_SG 0x1A 0156 #define H_ABORT 0x0FF 0157 0158 /* SCSI BUS Status byte codes */ 0159 #define SCSI_STAT_UNEXP_BUS_F 0xFD /* Unexpect Bus Free */ 0160 #define SCSI_STAT_BUS_RST_DETECT 0xFE /* Scsi Bus Reset detected */ 0161 #define SCSI_STAT_SEL_TIMEOUT 0xFF /* Selection Time out */ 0162 0163 /* Sync_Mode */ 0164 #define SYNC_WIDE_TAG_ATNT_DISABLE 0 0165 #define SYNC_NEGO_ENABLE BIT0 0166 #define SYNC_NEGO_DONE BIT1 0167 #define WIDE_NEGO_ENABLE BIT2 0168 #define WIDE_NEGO_DONE BIT3 0169 #define WIDE_NEGO_STATE BIT4 0170 #define EN_TAG_QUEUEING BIT5 0171 #define EN_ATN_STOP BIT6 0172 0173 #define SYNC_NEGO_OFFSET 15 0174 0175 /* cmd->result */ 0176 #define STATUS_MASK_ 0xFF 0177 #define MSG_MASK 0xFF00 0178 #define RETURN_MASK 0xFF0000 0179 0180 /************************************************************************/ 0181 /* */ 0182 /* Inquiry Data format */ 0183 /* */ 0184 /************************************************************************/ 0185 struct ScsiInqData 0186 { /* INQ */ 0187 u8 DevType; /* Periph Qualifier & Periph Dev Type */ 0188 u8 RMB_TypeMod; /* rem media bit & Dev Type Modifier */ 0189 u8 Vers; /* ISO, ECMA, & ANSI versions */ 0190 u8 RDF; /* AEN, TRMIOP, & response data format */ 0191 u8 AddLen; /* length of additional data */ 0192 u8 Res1; /* reserved */ 0193 u8 Res2; /* reserved */ 0194 u8 Flags; /* RelADr, Wbus32, Wbus16, Sync, etc. */ 0195 u8 VendorID[8]; /* Vendor Identification */ 0196 u8 ProductID[16]; /* Product Identification */ 0197 u8 ProductRev[4]; /* Product Revision */ 0198 }; 0199 0200 /* Inquiry byte 0 masks */ 0201 #define SCSI_DEVTYPE 0x1F /* Peripheral Device Type */ 0202 #define SCSI_PERIPHQUAL 0xE0 /* Peripheral Qualifier */ 0203 /* Inquiry byte 1 mask */ 0204 #define SCSI_REMOVABLE_MEDIA 0x80 /* Removable Media bit (1=removable) */ 0205 /* Peripheral Device Type definitions */ 0206 /* See include/scsi/scsi.h */ 0207 #define TYPE_NODEV SCSI_DEVTYPE /* Unknown or no device type */ 0208 #ifndef TYPE_PRINTER /* */ 0209 # define TYPE_PRINTER 0x02 /* Printer device */ 0210 #endif /* */ 0211 #ifndef TYPE_COMM /* */ 0212 # define TYPE_COMM 0x09 /* Communications device */ 0213 #endif 0214 0215 /************************************************************************/ 0216 /* */ 0217 /* Inquiry flag definitions (Inq data byte 7) */ 0218 /* */ 0219 /************************************************************************/ 0220 #define SCSI_INQ_RELADR 0x80 /* device supports relative addressing */ 0221 #define SCSI_INQ_WBUS32 0x40 /* device supports 32 bit data xfers */ 0222 #define SCSI_INQ_WBUS16 0x20 /* device supports 16 bit data xfers */ 0223 #define SCSI_INQ_SYNC 0x10 /* device supports synchronous xfer */ 0224 #define SCSI_INQ_LINKED 0x08 /* device supports linked commands */ 0225 #define SCSI_INQ_CMDQUEUE 0x02 /* device supports command queueing */ 0226 #define SCSI_INQ_SFTRE 0x01 /* device supports soft resets */ 0227 0228 #define ENABLE_CE 1 0229 #define DISABLE_CE 0 0230 #define EEPROM_READ 0x80 0231 0232 /************************************************************************/ 0233 /* */ 0234 /* The PCI configuration register offset for TRM_S1040 */ 0235 /* */ 0236 /************************************************************************/ 0237 #define TRM_S1040_ID 0x00 /* Vendor and Device ID */ 0238 #define TRM_S1040_COMMAND 0x04 /* PCI command register */ 0239 #define TRM_S1040_IOBASE 0x10 /* I/O Space base address */ 0240 #define TRM_S1040_ROMBASE 0x30 /* Expansion ROM Base Address */ 0241 #define TRM_S1040_INTLINE 0x3C /* Interrupt line */ 0242 0243 /************************************************************************/ 0244 /* */ 0245 /* The SCSI register offset for TRM_S1040 */ 0246 /* */ 0247 /************************************************************************/ 0248 #define TRM_S1040_SCSI_STATUS 0x80 /* SCSI Status (R) */ 0249 #define COMMANDPHASEDONE 0x2000 /* SCSI command phase done */ 0250 #define SCSIXFERDONE 0x0800 /* SCSI SCSI transfer done */ 0251 #define SCSIXFERCNT_2_ZERO 0x0100 /* SCSI SCSI transfer count to zero */ 0252 #define SCSIINTERRUPT 0x0080 /* SCSI interrupt pending */ 0253 #define COMMANDABORT 0x0040 /* SCSI command abort */ 0254 #define SEQUENCERACTIVE 0x0020 /* SCSI sequencer active */ 0255 #define PHASEMISMATCH 0x0010 /* SCSI phase mismatch */ 0256 #define PARITYERROR 0x0008 /* SCSI parity error */ 0257 0258 #define PHASEMASK 0x0007 /* Phase MSG/CD/IO */ 0259 #define PH_DATA_OUT 0x00 /* Data out phase */ 0260 #define PH_DATA_IN 0x01 /* Data in phase */ 0261 #define PH_COMMAND 0x02 /* Command phase */ 0262 #define PH_STATUS 0x03 /* Status phase */ 0263 #define PH_BUS_FREE 0x05 /* Invalid phase used as bus free */ 0264 #define PH_MSG_OUT 0x06 /* Message out phase */ 0265 #define PH_MSG_IN 0x07 /* Message in phase */ 0266 0267 #define TRM_S1040_SCSI_CONTROL 0x80 /* SCSI Control (W) */ 0268 #define DO_CLRATN 0x0400 /* Clear ATN */ 0269 #define DO_SETATN 0x0200 /* Set ATN */ 0270 #define DO_CMDABORT 0x0100 /* Abort SCSI command */ 0271 #define DO_RSTMODULE 0x0010 /* Reset SCSI chip */ 0272 #define DO_RSTSCSI 0x0008 /* Reset SCSI bus */ 0273 #define DO_CLRFIFO 0x0004 /* Clear SCSI transfer FIFO */ 0274 #define DO_DATALATCH 0x0002 /* Enable SCSI bus data input (latched) */ 0275 /* #define DO_DATALATCH 0x0000 */ /* KG: DISable SCSI bus data latch */ 0276 #define DO_HWRESELECT 0x0001 /* Enable hardware reselection */ 0277 0278 #define TRM_S1040_SCSI_FIFOCNT 0x82 /* SCSI FIFO Counter 5bits(R) */ 0279 #define TRM_S1040_SCSI_SIGNAL 0x83 /* SCSI low level signal (R/W) */ 0280 0281 #define TRM_S1040_SCSI_INTSTATUS 0x84 /* SCSI Interrupt Status (R) */ 0282 #define INT_SCAM 0x80 /* SCAM selection interrupt */ 0283 #define INT_SELECT 0x40 /* Selection interrupt */ 0284 #define INT_SELTIMEOUT 0x20 /* Selection timeout interrupt */ 0285 #define INT_DISCONNECT 0x10 /* Bus disconnected interrupt */ 0286 #define INT_RESELECTED 0x08 /* Reselected interrupt */ 0287 #define INT_SCSIRESET 0x04 /* SCSI reset detected interrupt */ 0288 #define INT_BUSSERVICE 0x02 /* Bus service interrupt */ 0289 #define INT_CMDDONE 0x01 /* SCSI command done interrupt */ 0290 0291 #define TRM_S1040_SCSI_OFFSET 0x84 /* SCSI Offset Count (W) */ 0292 0293 /************************************************************************/ 0294 /* */ 0295 /* Bit Name Definition */ 0296 /* --------- ------------- ---------------------------- */ 0297 /* 07-05 0 RSVD Reversed. Always 0. */ 0298 /* 04 0 OFFSET4 Reversed for LVDS. Always 0. */ 0299 /* 03-00 0 OFFSET[03:00] Offset number from 0 to 15 */ 0300 /* */ 0301 /************************************************************************/ 0302 0303 #define TRM_S1040_SCSI_SYNC 0x85 /* SCSI Synchronous Control (R/W) */ 0304 #define LVDS_SYNC 0x20 /* Enable LVDS synchronous */ 0305 #define WIDE_SYNC 0x10 /* Enable WIDE synchronous */ 0306 #define ALT_SYNC 0x08 /* Enable Fast-20 alternate synchronous */ 0307 0308 /************************************************************************/ 0309 /* */ 0310 /* SYNCM 7 6 5 4 3 2 1 0 */ 0311 /* Name RSVD RSVD LVDS WIDE ALTPERD PERIOD2 PERIOD1 PERIOD0 */ 0312 /* Default 0 0 0 0 0 0 0 0 */ 0313 /* */ 0314 /* Bit Name Definition */ 0315 /* --------- ------------- --------------------------- */ 0316 /* 07-06 0 RSVD Reversed. Always read 0 */ 0317 /* 05 0 LVDS Reversed. Always read 0 */ 0318 /* 04 0 WIDE/WSCSI Enable wide (16-bits) SCSI */ 0319 /* transfer. */ 0320 /* 03 0 ALTPERD/ALTPD Alternate (Sync./Period) mode. */ 0321 /* */ 0322 /* @@ When this bit is set, */ 0323 /* the synchronous period bits 2:0 */ 0324 /* in the Synchronous Mode register */ 0325 /* are used to transfer data */ 0326 /* at the Fast-20 rate. */ 0327 /* @@ When this bit is unset, */ 0328 /* the synchronous period bits 2:0 */ 0329 /* in the Synchronous Mode Register */ 0330 /* are used to transfer data */ 0331 /* at the Fast-10 rate (or Fast-40 w/ LVDS). */ 0332 /* */ 0333 /* 02-00 0 PERIOD[2:0]/ Synchronous SCSI Transfer Rate. */ 0334 /* SXPD[02:00] These 3 bits specify */ 0335 /* the Synchronous SCSI Transfer */ 0336 /* Rate for Fast-20 and Fast-10. */ 0337 /* These bits are also reset */ 0338 /* by a SCSI Bus reset. */ 0339 /* */ 0340 /* For Fast-10 bit ALTPD = 0 and LVDS = 0 */ 0341 /* and bit2,bit1,bit0 is defined as follows : */ 0342 /* */ 0343 /* 000 100ns, 10.0 MHz */ 0344 /* 001 150ns, 6.6 MHz */ 0345 /* 010 200ns, 5.0 MHz */ 0346 /* 011 250ns, 4.0 MHz */ 0347 /* 100 300ns, 3.3 MHz */ 0348 /* 101 350ns, 2.8 MHz */ 0349 /* 110 400ns, 2.5 MHz */ 0350 /* 111 450ns, 2.2 MHz */ 0351 /* */ 0352 /* For Fast-20 bit ALTPD = 1 and LVDS = 0 */ 0353 /* and bit2,bit1,bit0 is defined as follows : */ 0354 /* */ 0355 /* 000 50ns, 20.0 MHz */ 0356 /* 001 75ns, 13.3 MHz */ 0357 /* 010 100ns, 10.0 MHz */ 0358 /* 011 125ns, 8.0 MHz */ 0359 /* 100 150ns, 6.6 MHz */ 0360 /* 101 175ns, 5.7 MHz */ 0361 /* 110 200ns, 5.0 MHz */ 0362 /* 111 250ns, 4.0 MHz KG: Maybe 225ns, 4.4 MHz */ 0363 /* */ 0364 /* For Fast-40 bit ALTPD = 0 and LVDS = 1 */ 0365 /* and bit2,bit1,bit0 is defined as follows : */ 0366 /* */ 0367 /* 000 25ns, 40.0 MHz */ 0368 /* 001 50ns, 20.0 MHz */ 0369 /* 010 75ns, 13.3 MHz */ 0370 /* 011 100ns, 10.0 MHz */ 0371 /* 100 125ns, 8.0 MHz */ 0372 /* 101 150ns, 6.6 MHz */ 0373 /* 110 175ns, 5.7 MHz */ 0374 /* 111 200ns, 5.0 MHz */ 0375 /* */ 0376 /************************************************************************/ 0377 0378 #define TRM_S1040_SCSI_TARGETID 0x86 /* SCSI Target ID (R/W) */ 0379 #define TRM_S1040_SCSI_IDMSG 0x87 /* SCSI Identify Message (R) */ 0380 #define TRM_S1040_SCSI_HOSTID 0x87 /* SCSI Host ID (W) */ 0381 #define TRM_S1040_SCSI_COUNTER 0x88 /* SCSI Transfer Counter 24bits(R/W) */ 0382 0383 #define TRM_S1040_SCSI_INTEN 0x8C /* SCSI Interrupt Enable (R/W) */ 0384 #define EN_SCAM 0x80 /* Enable SCAM selection interrupt */ 0385 #define EN_SELECT 0x40 /* Enable selection interrupt */ 0386 #define EN_SELTIMEOUT 0x20 /* Enable selection timeout interrupt */ 0387 #define EN_DISCONNECT 0x10 /* Enable bus disconnected interrupt */ 0388 #define EN_RESELECTED 0x08 /* Enable reselected interrupt */ 0389 #define EN_SCSIRESET 0x04 /* Enable SCSI reset detected interrupt */ 0390 #define EN_BUSSERVICE 0x02 /* Enable bus service interrupt */ 0391 #define EN_CMDDONE 0x01 /* Enable SCSI command done interrupt */ 0392 0393 #define TRM_S1040_SCSI_CONFIG0 0x8D /* SCSI Configuration 0 (R/W) */ 0394 #define PHASELATCH 0x40 /* Enable phase latch */ 0395 #define INITIATOR 0x20 /* Enable initiator mode */ 0396 #define PARITYCHECK 0x10 /* Enable parity check */ 0397 #define BLOCKRST 0x01 /* Disable SCSI reset1 */ 0398 0399 #define TRM_S1040_SCSI_CONFIG1 0x8E /* SCSI Configuration 1 (R/W) */ 0400 #define ACTIVE_NEGPLUS 0x10 /* Enhance active negation */ 0401 #define FILTER_DISABLE 0x08 /* Disable SCSI data filter */ 0402 #define FAST_FILTER 0x04 /* ? */ 0403 #define ACTIVE_NEG 0x02 /* Enable active negation */ 0404 0405 #define TRM_S1040_SCSI_CONFIG2 0x8F /* SCSI Configuration 2 (R/W) */ 0406 #define CFG2_WIDEFIFO 0x02 /* */ 0407 0408 #define TRM_S1040_SCSI_COMMAND 0x90 /* SCSI Command (R/W) */ 0409 #define SCMD_COMP 0x12 /* Command complete */ 0410 #define SCMD_SEL_ATN 0x60 /* Selection with ATN */ 0411 #define SCMD_SEL_ATN3 0x64 /* Selection with ATN3 */ 0412 #define SCMD_SEL_ATNSTOP 0xB8 /* Selection with ATN and Stop */ 0413 #define SCMD_FIFO_OUT 0xC0 /* SCSI FIFO transfer out */ 0414 #define SCMD_DMA_OUT 0xC1 /* SCSI DMA transfer out */ 0415 #define SCMD_FIFO_IN 0xC2 /* SCSI FIFO transfer in */ 0416 #define SCMD_DMA_IN 0xC3 /* SCSI DMA transfer in */ 0417 #define SCMD_MSGACCEPT 0xD8 /* Message accept */ 0418 0419 /************************************************************************/ 0420 /* */ 0421 /* Code Command Description */ 0422 /* ---- ---------------------------------------- */ 0423 /* 02 Enable reselection with FIFO */ 0424 /* 40 Select without ATN with FIFO */ 0425 /* 60 Select with ATN with FIFO */ 0426 /* 64 Select with ATN3 with FIFO */ 0427 /* A0 Select with ATN and stop with FIFO */ 0428 /* C0 Transfer information out with FIFO */ 0429 /* C1 Transfer information out with DMA */ 0430 /* C2 Transfer information in with FIFO */ 0431 /* C3 Transfer information in with DMA */ 0432 /* 12 Initiator command complete with FIFO */ 0433 /* 50 Initiator transfer information out sequence without ATN */ 0434 /* with FIFO */ 0435 /* 70 Initiator transfer information out sequence with ATN */ 0436 /* with FIFO */ 0437 /* 74 Initiator transfer information out sequence with ATN3 */ 0438 /* with FIFO */ 0439 /* 52 Initiator transfer information in sequence without ATN */ 0440 /* with FIFO */ 0441 /* 72 Initiator transfer information in sequence with ATN */ 0442 /* with FIFO */ 0443 /* 76 Initiator transfer information in sequence with ATN3 */ 0444 /* with FIFO */ 0445 /* 90 Initiator transfer information out command complete */ 0446 /* with FIFO */ 0447 /* 92 Initiator transfer information in command complete */ 0448 /* with FIFO */ 0449 /* D2 Enable selection */ 0450 /* 08 Reselection */ 0451 /* 48 Disconnect command with FIFO */ 0452 /* 88 Terminate command with FIFO */ 0453 /* C8 Target command complete with FIFO */ 0454 /* 18 SCAM Arbitration/ Selection */ 0455 /* 5A Enable reselection */ 0456 /* 98 Select without ATN with FIFO */ 0457 /* B8 Select with ATN with FIFO */ 0458 /* D8 Message Accepted */ 0459 /* 58 NOP */ 0460 /* */ 0461 /************************************************************************/ 0462 0463 #define TRM_S1040_SCSI_TIMEOUT 0x91 /* SCSI Time Out Value (R/W) */ 0464 #define TRM_S1040_SCSI_FIFO 0x98 /* SCSI FIFO (R/W) */ 0465 0466 #define TRM_S1040_SCSI_TCR0 0x9C /* SCSI Target Control 0 (R/W) */ 0467 #define TCR0_WIDE_NEGO_DONE 0x8000 /* Wide nego done */ 0468 #define TCR0_SYNC_NEGO_DONE 0x4000 /* Synchronous nego done */ 0469 #define TCR0_ENABLE_LVDS 0x2000 /* Enable LVDS synchronous */ 0470 #define TCR0_ENABLE_WIDE 0x1000 /* Enable WIDE synchronous */ 0471 #define TCR0_ENABLE_ALT 0x0800 /* Enable alternate synchronous */ 0472 #define TCR0_PERIOD_MASK 0x0700 /* Transfer rate */ 0473 0474 #define TCR0_DO_WIDE_NEGO 0x0080 /* Do wide NEGO */ 0475 #define TCR0_DO_SYNC_NEGO 0x0040 /* Do sync NEGO */ 0476 #define TCR0_DISCONNECT_EN 0x0020 /* Disconnection enable */ 0477 #define TCR0_OFFSET_MASK 0x001F /* Offset number */ 0478 0479 #define TRM_S1040_SCSI_TCR1 0x9E /* SCSI Target Control 1 (R/W) */ 0480 #define MAXTAG_MASK 0x7F00 /* Maximum tags (127) */ 0481 #define NON_TAG_BUSY 0x0080 /* Non tag command active */ 0482 #define ACTTAG_MASK 0x007F /* Active tags */ 0483 0484 /************************************************************************/ 0485 /* */ 0486 /* The DMA register offset for TRM_S1040 */ 0487 /* */ 0488 /************************************************************************/ 0489 #define TRM_S1040_DMA_COMMAND 0xA0 /* DMA Command (R/W) */ 0490 #define DMACMD_SG 0x02 /* Enable HW S/G support */ 0491 #define DMACMD_DIR 0x01 /* 1 = read from SCSI write to Host */ 0492 #define XFERDATAIN_SG 0x0103 /* Transfer data in w/ SG */ 0493 #define XFERDATAOUT_SG 0x0102 /* Transfer data out w/ SG */ 0494 #define XFERDATAIN 0x0101 /* Transfer data in w/o SG */ 0495 #define XFERDATAOUT 0x0100 /* Transfer data out w/o SG */ 0496 0497 #define TRM_S1040_DMA_FIFOCNT 0xA1 /* DMA FIFO Counter (R) */ 0498 0499 #define TRM_S1040_DMA_CONTROL 0xA1 /* DMA Control (W) */ 0500 #define DMARESETMODULE 0x10 /* Reset PCI/DMA module */ 0501 #define STOPDMAXFER 0x08 /* Stop DMA transfer */ 0502 #define ABORTXFER 0x04 /* Abort DMA transfer */ 0503 #define CLRXFIFO 0x02 /* Clear DMA transfer FIFO */ 0504 #define STARTDMAXFER 0x01 /* Start DMA transfer */ 0505 0506 #define TRM_S1040_DMA_FIFOSTAT 0xA2 /* DMA FIFO Status (R) */ 0507 0508 #define TRM_S1040_DMA_STATUS 0xA3 /* DMA Interrupt Status (R/W) */ 0509 #define XFERPENDING 0x80 /* Transfer pending */ 0510 #define SCSIBUSY 0x40 /* SCSI busy */ 0511 #define GLOBALINT 0x20 /* DMA_INTEN bit 0-4 set */ 0512 #define FORCEDMACOMP 0x10 /* Force DMA transfer complete */ 0513 #define DMAXFERERROR 0x08 /* DMA transfer error */ 0514 #define DMAXFERABORT 0x04 /* DMA transfer abort */ 0515 #define DMAXFERCOMP 0x02 /* Bus Master XFER Complete status */ 0516 #define SCSICOMP 0x01 /* SCSI complete interrupt */ 0517 0518 #define TRM_S1040_DMA_INTEN 0xA4 /* DMA Interrupt Enable (R/W) */ 0519 #define EN_FORCEDMACOMP 0x10 /* Force DMA transfer complete */ 0520 #define EN_DMAXFERERROR 0x08 /* DMA transfer error */ 0521 #define EN_DMAXFERABORT 0x04 /* DMA transfer abort */ 0522 #define EN_DMAXFERCOMP 0x02 /* Bus Master XFER Complete status */ 0523 #define EN_SCSIINTR 0x01 /* Enable SCSI complete interrupt */ 0524 0525 #define TRM_S1040_DMA_CONFIG 0xA6 /* DMA Configuration (R/W) */ 0526 #define DMA_ENHANCE 0x8000 /* Enable DMA enhance feature (SG?) */ 0527 #define DMA_PCI_DUAL_ADDR 0x4000 /* */ 0528 #define DMA_CFG_RES 0x2000 /* Always 1 */ 0529 #define DMA_AUTO_CLR_FIFO 0x1000 /* DISable DMA auto clear FIFO */ 0530 #define DMA_MEM_MULTI_READ 0x0800 /* */ 0531 #define DMA_MEM_WRITE_INVAL 0x0400 /* Memory write and invalidate */ 0532 #define DMA_FIFO_CTRL 0x0300 /* Control FIFO operation with DMA */ 0533 #define DMA_FIFO_HALF_HALF 0x0200 /* Keep half filled on both read/write */ 0534 0535 #define TRM_S1040_DMA_XCNT 0xA8 /* DMA Transfer Counter (R/W), 24bits */ 0536 #define TRM_S1040_DMA_CXCNT 0xAC /* DMA Current Transfer Counter (R) */ 0537 #define TRM_S1040_DMA_XLOWADDR 0xB0 /* DMA Transfer Physical Low Address */ 0538 #define TRM_S1040_DMA_XHIGHADDR 0xB4 /* DMA Transfer Physical High Address */ 0539 0540 /************************************************************************/ 0541 /* */ 0542 /* The general register offset for TRM_S1040 */ 0543 /* */ 0544 /************************************************************************/ 0545 #define TRM_S1040_GEN_CONTROL 0xD4 /* Global Control */ 0546 #define CTRL_LED 0x80 /* Control onboard LED */ 0547 #define EN_EEPROM 0x10 /* Enable EEPROM programming */ 0548 #define DIS_TERM 0x08 /* Disable onboard termination */ 0549 #define AUTOTERM 0x04 /* Enable Auto SCSI terminator */ 0550 #define LOW8TERM 0x02 /* Enable Lower 8 bit SCSI terminator */ 0551 #define UP8TERM 0x01 /* Enable Upper 8 bit SCSI terminator */ 0552 0553 #define TRM_S1040_GEN_STATUS 0xD5 /* Global Status */ 0554 #define GTIMEOUT 0x80 /* Global timer reach 0 */ 0555 #define EXT68HIGH 0x40 /* Higher 8 bit connected externally */ 0556 #define INT68HIGH 0x20 /* Higher 8 bit connected internally */ 0557 #define CON5068 0x10 /* External 50/68 pin connected (low) */ 0558 #define CON68 0x08 /* Internal 68 pin connected (low) */ 0559 #define CON50 0x04 /* Internal 50 pin connected (low!) */ 0560 #define WIDESCSI 0x02 /* Wide SCSI card */ 0561 #define STATUS_LOAD_DEFAULT 0x01 /* */ 0562 0563 #define TRM_S1040_GEN_NVRAM 0xD6 /* Serial NON-VOLATILE RAM port */ 0564 #define NVR_BITOUT 0x08 /* Serial data out */ 0565 #define NVR_BITIN 0x04 /* Serial data in */ 0566 #define NVR_CLOCK 0x02 /* Serial clock */ 0567 #define NVR_SELECT 0x01 /* Serial select */ 0568 0569 #define TRM_S1040_GEN_EDATA 0xD7 /* Parallel EEPROM data port */ 0570 #define TRM_S1040_GEN_EADDRESS 0xD8 /* Parallel EEPROM address */ 0571 #define TRM_S1040_GEN_TIMER 0xDB /* Global timer */ 0572 0573 /************************************************************************/ 0574 /* */ 0575 /* NvmTarCfg0: Target configuration byte 0 :..pDCB->DevMode */ 0576 /* */ 0577 /************************************************************************/ 0578 #define NTC_DO_WIDE_NEGO 0x20 /* Wide negotiate */ 0579 #define NTC_DO_TAG_QUEUEING 0x10 /* Enable SCSI tag queuing */ 0580 #define NTC_DO_SEND_START 0x08 /* Send start command SPINUP */ 0581 #define NTC_DO_DISCONNECT 0x04 /* Enable SCSI disconnect */ 0582 #define NTC_DO_SYNC_NEGO 0x02 /* Sync negotiation */ 0583 #define NTC_DO_PARITY_CHK 0x01 /* (it should define at NAC) */ 0584 /* Parity check enable */ 0585 0586 /************************************************************************/ 0587 /* */ 0588 /* Nvram Initiater bits definition */ 0589 /* */ 0590 /************************************************************************/ 0591 #if 0 0592 #define MORE2_DRV BIT0 0593 #define GREATER_1G BIT1 0594 #define RST_SCSI_BUS BIT2 0595 #define ACTIVE_NEGATION BIT3 0596 #define NO_SEEK BIT4 0597 #define LUN_CHECK BIT5 0598 #endif 0599 0600 /************************************************************************/ 0601 /* */ 0602 /* Nvram Adapter Cfg bits definition */ 0603 /* */ 0604 /************************************************************************/ 0605 #define NAC_SCANLUN 0x20 /* Include LUN as BIOS device */ 0606 #define NAC_POWERON_SCSI_RESET 0x04 /* Power on reset enable */ 0607 #define NAC_GREATER_1G 0x02 /* > 1G support enable */ 0608 #define NAC_GT2DRIVES 0x01 /* Support more than 2 drives */ 0609 /* #define NAC_DO_PARITY_CHK 0x08 */ /* Parity check enable */ 0610 0611 #endif
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