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0013 #ifndef __CXGB3I_H__
0014 #define __CXGB3I_H__
0015
0016 #define CXGB3I_SCSI_HOST_QDEPTH 1024
0017 #define CXGB3I_MAX_LUN 512
0018 #define ISCSI_PDU_NONPAYLOAD_MAX \
0019 (sizeof(struct iscsi_hdr) + ISCSI_MAX_AHS_SIZE + 2*ISCSI_DIGEST_SIZE)
0020
0021
0022 #define CXGB3I_TX_HEADER_LEN \
0023 (sizeof(struct tx_data_wr) + sizeof(struct sge_opaque_hdr))
0024
0025 extern cxgb3_cpl_handler_func cxgb3i_cpl_handlers[NUM_CPL_CMDS];
0026
0027 static inline unsigned int cxgb3i_get_private_ipv4addr(struct net_device *ndev)
0028 {
0029 return ((struct port_info *)(netdev_priv(ndev)))->iscsi_ipv4addr;
0030 }
0031
0032 static inline void cxgb3i_set_private_ipv4addr(struct net_device *ndev,
0033 unsigned int addr)
0034 {
0035 struct port_info *pi = (struct port_info *)netdev_priv(ndev);
0036
0037 pi->iscsic.flags = addr ? 1 : 0;
0038 pi->iscsi_ipv4addr = addr;
0039 if (addr)
0040 memcpy(pi->iscsic.mac_addr, ndev->dev_addr, ETH_ALEN);
0041 }
0042
0043 struct cpl_iscsi_hdr_norss {
0044 union opcode_tid ot;
0045 u16 pdu_len_ddp;
0046 u16 len;
0047 u32 seq;
0048 u16 urg;
0049 u8 rsvd;
0050 u8 status;
0051 };
0052
0053 struct cpl_rx_data_ddp_norss {
0054 union opcode_tid ot;
0055 u16 urg;
0056 u16 len;
0057 u32 seq;
0058 u32 nxt_seq;
0059 u32 ulp_crc;
0060 u32 ddp_status;
0061 };
0062 #endif