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0001 /* bnx2i.h: QLogic NetXtreme II iSCSI driver.
0002  *
0003  * Copyright (c) 2006 - 2013 Broadcom Corporation
0004  * Copyright (c) 2007, 2008 Red Hat, Inc.  All rights reserved.
0005  * Copyright (c) 2007, 2008 Mike Christie
0006  * Copyright (c) 2014, QLogic Corporation
0007  *
0008  * This program is free software; you can redistribute it and/or modify
0009  * it under the terms of the GNU General Public License as published by
0010  * the Free Software Foundation.
0011  *
0012  * Written by: Anil Veerabhadrappa (anilgv@broadcom.com)
0013  * Previously Maintained by: Eddie Wai (eddie.wai@broadcom.com)
0014  * Maintained by: QLogic-Storage-Upstream@qlogic.com
0015  */
0016 
0017 #ifndef _BNX2I_H_
0018 #define _BNX2I_H_
0019 
0020 #include <linux/module.h>
0021 #include <linux/moduleparam.h>
0022 
0023 #include <linux/errno.h>
0024 #include <linux/pci.h>
0025 #include <linux/spinlock.h>
0026 #include <linux/interrupt.h>
0027 #include <linux/delay.h>
0028 #include <linux/sched/signal.h>
0029 #include <linux/in.h>
0030 #include <linux/kfifo.h>
0031 #include <linux/netdevice.h>
0032 #include <linux/completion.h>
0033 #include <linux/kthread.h>
0034 #include <linux/cpu.h>
0035 
0036 #include <scsi/scsi_cmnd.h>
0037 #include <scsi/scsi_device.h>
0038 #include <scsi/scsi_eh.h>
0039 #include <scsi/scsi_host.h>
0040 #include <scsi/scsi.h>
0041 #include <scsi/iscsi_proto.h>
0042 #include <scsi/libiscsi.h>
0043 #include <scsi/scsi_transport_iscsi.h>
0044 
0045 #include "../../net/ethernet/broadcom/cnic_if.h"
0046 #include "57xx_iscsi_hsi.h"
0047 #include "57xx_iscsi_constants.h"
0048 
0049 #include "../../net/ethernet/broadcom/bnx2x/bnx2x_mfw_req.h"
0050 
0051 #define BNX2_ISCSI_DRIVER_NAME      "bnx2i"
0052 
0053 #define BNX2I_MAX_ADAPTERS      8
0054 
0055 #define ISCSI_MAX_CONNS_PER_HBA     128
0056 #define ISCSI_MAX_SESS_PER_HBA      ISCSI_MAX_CONNS_PER_HBA
0057 #define ISCSI_MAX_CMDS_PER_SESS     128
0058 
0059 /* Total active commands across all connections supported by devices */
0060 #define ISCSI_MAX_CMDS_PER_HBA_5708 (28 * (ISCSI_MAX_CMDS_PER_SESS - 1))
0061 #define ISCSI_MAX_CMDS_PER_HBA_5709 (128 * (ISCSI_MAX_CMDS_PER_SESS - 1))
0062 #define ISCSI_MAX_CMDS_PER_HBA_57710    (256 * (ISCSI_MAX_CMDS_PER_SESS - 1))
0063 
0064 #define ISCSI_MAX_BDS_PER_CMD       32
0065 
0066 #define MAX_PAGES_PER_CTRL_STRUCT_POOL  8
0067 #define BNX2I_RESERVED_SLOW_PATH_CMD_SLOTS  4
0068 
0069 #define BNX2X_DB_SHIFT          3
0070 
0071 /* 5706/08 hardware has limit on maximum buffer size per BD it can handle */
0072 #define MAX_BD_LENGTH           65535
0073 #define BD_SPLIT_SIZE           32768
0074 
0075 /* min, max & default values for SQ/RQ/CQ size, configurable via' modparam */
0076 #define BNX2I_SQ_WQES_MIN       16
0077 #define BNX2I_570X_SQ_WQES_MAX      128
0078 #define BNX2I_5770X_SQ_WQES_MAX     512
0079 #define BNX2I_570X_SQ_WQES_DEFAULT  128
0080 #define BNX2I_5770X_SQ_WQES_DEFAULT 128
0081 
0082 #define BNX2I_570X_CQ_WQES_MAX      128
0083 #define BNX2I_5770X_CQ_WQES_MAX     512
0084 
0085 #define BNX2I_RQ_WQES_MIN       16
0086 #define BNX2I_RQ_WQES_MAX       32
0087 #define BNX2I_RQ_WQES_DEFAULT       16
0088 
0089 /* CCELLs per conn */
0090 #define BNX2I_CCELLS_MIN        16
0091 #define BNX2I_CCELLS_MAX        96
0092 #define BNX2I_CCELLS_DEFAULT        64
0093 
0094 #define ITT_INVALID_SIGNATURE       0xFFFF
0095 
0096 #define ISCSI_CMD_CLEANUP_TIMEOUT   100
0097 
0098 #define BNX2I_CONN_CTX_BUF_SIZE     16384
0099 
0100 #define BNX2I_SQ_WQE_SIZE       64
0101 #define BNX2I_RQ_WQE_SIZE       256
0102 #define BNX2I_CQE_SIZE          64
0103 
0104 #define MB_KERNEL_CTX_SHIFT     8
0105 #define MB_KERNEL_CTX_SIZE      (1 << MB_KERNEL_CTX_SHIFT)
0106 
0107 #define CTX_SHIFT           7
0108 #define GET_CID_NUM(cid_addr)       ((cid_addr) >> CTX_SHIFT)
0109 
0110 #define CTX_OFFSET          0x10000
0111 #define MAX_CID_CNT         0x4000
0112 
0113 #define BNX2I_570X_PAGE_SIZE_DEFAULT    4096
0114 
0115 /* 5709 context registers */
0116 #define BNX2_MQ_CONFIG2         0x00003d00
0117 #define BNX2_MQ_CONFIG2_CONT_SZ     (0x7L<<4)
0118 #define BNX2_MQ_CONFIG2_FIRST_L4L5  (0x1fL<<8)
0119 
0120 /* 57710's BAR2 is mapped to doorbell registers */
0121 #define BNX2X_DOORBELL_PCI_BAR      2
0122 #define BNX2X_MAX_CQS           8
0123 
0124 #define CNIC_ARM_CQE            1
0125 #define CNIC_ARM_CQE_FP         2
0126 #define CNIC_DISARM_CQE         0
0127 
0128 #define REG_RD(__hba, offset)               \
0129         readl(__hba->regview + offset)
0130 #define REG_WR(__hba, offset, val)          \
0131         writel(val, __hba->regview + offset)
0132 
0133 #ifdef CONFIG_32BIT
0134 #define GET_STATS_64(__hba, dst, field)             \
0135     do {                            \
0136         spin_lock_bh(&__hba->stat_lock);        \
0137         dst->field##_lo = __hba->stats.field##_lo;  \
0138         dst->field##_hi = __hba->stats.field##_hi;  \
0139         spin_unlock_bh(&__hba->stat_lock);      \
0140     } while (0)
0141 
0142 #define ADD_STATS_64(__hba, field, len)             \
0143     do {                            \
0144         if (spin_trylock(&__hba->stat_lock)) {      \
0145             if (__hba->stats.field##_lo + len < \
0146                 __hba->stats.field##_lo)        \
0147                 __hba->stats.field##_hi++;  \
0148             __hba->stats.field##_lo += len;     \
0149             spin_unlock(&__hba->stat_lock);     \
0150         }                       \
0151     } while (0)
0152 
0153 #else
0154 #define GET_STATS_64(__hba, dst, field)             \
0155     do {                            \
0156         u64 val, *out;                  \
0157                                 \
0158         val = __hba->bnx2i_stats.field;         \
0159         out = (u64 *)&__hba->stats.field##_lo;      \
0160         *out = cpu_to_le64(val);            \
0161         out = (u64 *)&dst->field##_lo;          \
0162         *out = cpu_to_le64(val);            \
0163     } while (0)
0164 
0165 #define ADD_STATS_64(__hba, field, len)             \
0166     do {                            \
0167         __hba->bnx2i_stats.field += len;        \
0168     } while (0)
0169 #endif
0170 
0171 /**
0172  * struct generic_pdu_resc - login pdu resource structure
0173  *
0174  * @req_buf:            driver buffer used to stage payload associated with
0175  *                      the login request
0176  * @req_dma_addr:       dma address for iscsi login request payload buffer
0177  * @req_buf_size:       actual login request payload length
0178  * @req_wr_ptr:         pointer into login request buffer when next data is
0179  *                      to be written
0180  * @resp_hdr:           iscsi header where iscsi login response header is to
0181  *                      be recreated
0182  * @resp_buf:           buffer to stage login response payload
0183  * @resp_dma_addr:      login response payload buffer dma address
0184  * @resp_buf_size:      login response paylod length
0185  * @resp_wr_ptr:        pointer into login response buffer when next data is
0186  *                      to be written
0187  * @req_bd_tbl:         iscsi login request payload BD table
0188  * @req_bd_dma:         login request BD table dma address
0189  * @resp_bd_tbl:        iscsi login response payload BD table
0190  * @resp_bd_dma:        login request BD table dma address
0191  *
0192  * following structure defines buffer info for generic pdus such as iSCSI Login,
0193  *  Logout and NOP
0194  */
0195 struct generic_pdu_resc {
0196     char *req_buf;
0197     dma_addr_t req_dma_addr;
0198     u32 req_buf_size;
0199     char *req_wr_ptr;
0200     struct iscsi_hdr resp_hdr;
0201     char *resp_buf;
0202     dma_addr_t resp_dma_addr;
0203     u32 resp_buf_size;
0204     char *resp_wr_ptr;
0205     char *req_bd_tbl;
0206     dma_addr_t req_bd_dma;
0207     char *resp_bd_tbl;
0208     dma_addr_t resp_bd_dma;
0209 };
0210 
0211 
0212 /**
0213  * struct bd_resc_page - tracks DMA'able memory allocated for BD tables
0214  *
0215  * @link:               list head to link elements
0216  * @max_ptrs:           maximun pointers that can be stored in this page
0217  * @num_valid:          number of pointer valid in this page
0218  * @page:               base addess for page pointer array
0219  *
0220  * structure to track DMA'able memory allocated for command BD tables
0221  */
0222 struct bd_resc_page {
0223     struct list_head link;
0224     u32 max_ptrs;
0225     u32 num_valid;
0226     void *page[1];
0227 };
0228 
0229 
0230 /**
0231  * struct io_bdt - I/O buffer destricptor table
0232  *
0233  * @bd_tbl:             BD table's virtual address
0234  * @bd_tbl_dma:         BD table's dma address
0235  * @bd_valid:           num valid BD entries
0236  *
0237  * IO BD table
0238  */
0239 struct io_bdt {
0240     struct iscsi_bd *bd_tbl;
0241     dma_addr_t bd_tbl_dma;
0242     u16 bd_valid;
0243 };
0244 
0245 
0246 /**
0247  * bnx2i_cmd - iscsi command structure
0248  *
0249  * @hdr:                iSCSI header
0250  * @conn:               iscsi_conn pointer
0251  * @scsi_cmd:           SCSI-ML task pointer corresponding to this iscsi cmd
0252  * @sg:                 SG list
0253  * @io_tbl:             buffer descriptor (BD) table
0254  * @bd_tbl_dma:         buffer descriptor (BD) table's dma address
0255  * @req:                bnx2i specific command request struct
0256  */
0257 struct bnx2i_cmd {
0258     struct iscsi_hdr hdr;
0259     struct bnx2i_conn *conn;
0260     struct scsi_cmnd *scsi_cmd;
0261     struct scatterlist *sg;
0262     struct io_bdt io_tbl;
0263     dma_addr_t bd_tbl_dma;
0264     struct bnx2i_cmd_request req;
0265 };
0266 
0267 
0268 /**
0269  * struct bnx2i_conn - iscsi connection structure
0270  *
0271  * @cls_conn:              pointer to iscsi cls conn
0272  * @hba:                   adapter structure pointer
0273  * @iscsi_conn_cid:        iscsi conn id
0274  * @fw_cid:                firmware iscsi context id
0275  * @ep:                    endpoint structure pointer
0276  * @gen_pdu:               login/nopout/logout pdu resources
0277  * @violation_notified:    bit mask used to track iscsi error/warning messages
0278  *                         already printed out
0279  * @work_cnt:              keeps track of the number of outstanding work
0280  *
0281  * iSCSI connection structure
0282  */
0283 struct bnx2i_conn {
0284     struct iscsi_cls_conn *cls_conn;
0285     struct bnx2i_hba *hba;
0286     struct completion cmd_cleanup_cmpl;
0287 
0288     u32 iscsi_conn_cid;
0289 #define BNX2I_CID_RESERVED  0x5AFF
0290     u32 fw_cid;
0291 
0292     struct timer_list poll_timer;
0293     /*
0294      * Queue Pair (QP) related structure elements.
0295      */
0296     struct bnx2i_endpoint *ep;
0297 
0298     /*
0299      * Buffer for login negotiation process
0300      */
0301     struct generic_pdu_resc gen_pdu;
0302     u64 violation_notified;
0303 
0304     atomic_t work_cnt;
0305 };
0306 
0307 
0308 
0309 /**
0310  * struct iscsi_cid_queue - Per adapter iscsi cid queue
0311  *
0312  * @cid_que_base:           queue base memory
0313  * @cid_que:                queue memory pointer
0314  * @cid_q_prod_idx:         produce index
0315  * @cid_q_cons_idx:         consumer index
0316  * @cid_q_max_idx:          max index. used to detect wrap around condition
0317  * @cid_free_cnt:           queue size
0318  * @conn_cid_tbl:           iscsi cid to conn structure mapping table
0319  *
0320  * Per adapter iSCSI CID Queue
0321  */
0322 struct iscsi_cid_queue {
0323     void *cid_que_base;
0324     u32 *cid_que;
0325     u32 cid_q_prod_idx;
0326     u32 cid_q_cons_idx;
0327     u32 cid_q_max_idx;
0328     u32 cid_free_cnt;
0329     struct bnx2i_conn **conn_cid_tbl;
0330 };
0331 
0332 
0333 struct bnx2i_stats_info {
0334     u64 rx_pdus;
0335     u64 rx_bytes;
0336     u64 tx_pdus;
0337     u64 tx_bytes;
0338 };
0339 
0340 
0341 /**
0342  * struct bnx2i_hba - bnx2i adapter structure
0343  *
0344  * @link:                  list head to link elements
0345  * @cnic:                  pointer to cnic device
0346  * @pcidev:                pointer to pci dev
0347  * @netdev:                pointer to netdev structure
0348  * @regview:               mapped PCI register space
0349  * @age:                   age, incremented by every recovery
0350  * @cnic_dev_type:         cnic device type, 5706/5708/5709/57710
0351  * @mail_queue_access:     mailbox queue access mode, applicable to 5709 only
0352  * @reg_with_cnic:         indicates whether the device is register with CNIC
0353  * @adapter_state:         adapter state, UP, GOING_DOWN, LINK_DOWN
0354  * @mtu_supported:         Ethernet MTU supported
0355  * @shost:                 scsi host pointer
0356  * @max_sqes:              SQ size
0357  * @max_rqes:              RQ size
0358  * @max_cqes:              CQ size
0359  * @num_ccell:             number of command cells per connection
0360  * @ofld_conns_active:     active connection list
0361  * @eh_wait:               wait queue for the endpoint to shutdown
0362  * @max_active_conns:      max offload connections supported by this device
0363  * @cid_que:               iscsi cid queue
0364  * @ep_rdwr_lock:          read / write lock to synchronize various ep lists
0365  * @ep_ofld_list:          connection list for pending offload completion
0366  * @ep_active_list:        connection list for active offload endpoints
0367  * @ep_destroy_list:       connection list for pending offload completion
0368  * @mp_bd_tbl:             BD table to be used with middle path requests
0369  * @mp_bd_dma:             DMA address of 'mp_bd_tbl' memory buffer
0370  * @dummy_buffer:          Dummy buffer to be used with zero length scsicmd reqs
0371  * @dummy_buf_dma:         DMA address of 'dummy_buffer' memory buffer
0372  * @lock:                  lock to synchonize access to hba structure
0373  * @hba_shutdown_tmo:      Timeout value to shutdown each connection
0374  * @conn_teardown_tmo:     Timeout value to tear down each connection
0375  * @conn_ctx_destroy_tmo:  Timeout value to destroy context of each connection
0376  * @pci_did:               PCI device ID
0377  * @pci_vid:               PCI vendor ID
0378  * @pci_sdid:              PCI subsystem device ID
0379  * @pci_svid:              PCI subsystem vendor ID
0380  * @pci_func:              PCI function number in system pci tree
0381  * @pci_devno:             PCI device number in system pci tree
0382  * @num_wqe_sent:          statistic counter, total wqe's sent
0383  * @num_cqe_rcvd:          statistic counter, total cqe's received
0384  * @num_intr_claimed:      statistic counter, total interrupts claimed
0385  * @link_changed_count:    statistic counter, num of link change notifications
0386  *                         received
0387  * @ipaddr_changed_count:  statistic counter, num times IP address changed while
0388  *                         at least one connection is offloaded
0389  * @num_sess_opened:       statistic counter, total num sessions opened
0390  * @num_conn_opened:       statistic counter, total num conns opened on this hba
0391  * @ctx_ccell_tasks:       captures number of ccells and tasks supported by
0392  *                         currently offloaded connection, used to decode
0393  *                         context memory
0394  * @stat_lock:         spin lock used by the statistic collector (32 bit)
0395  * @stats:         local iSCSI statistic collection place holder
0396  *
0397  * Adapter Data Structure
0398  */
0399 struct bnx2i_hba {
0400     struct list_head link;
0401     struct cnic_dev *cnic;
0402     struct pci_dev *pcidev;
0403     struct net_device *netdev;
0404     void __iomem *regview;
0405     resource_size_t reg_base;
0406 
0407     u32 age;
0408     unsigned long cnic_dev_type;
0409         #define BNX2I_NX2_DEV_5706      0x0
0410         #define BNX2I_NX2_DEV_5708      0x1
0411         #define BNX2I_NX2_DEV_5709      0x2
0412         #define BNX2I_NX2_DEV_57710     0x3
0413     u32 mail_queue_access;
0414         #define BNX2I_MQ_KERNEL_MODE        0x0
0415         #define BNX2I_MQ_KERNEL_BYPASS_MODE 0x1
0416         #define BNX2I_MQ_BIN_MODE       0x2
0417     unsigned long  reg_with_cnic;
0418         #define BNX2I_CNIC_REGISTERED       1
0419 
0420     unsigned long  adapter_state;
0421         #define ADAPTER_STATE_UP        0
0422         #define ADAPTER_STATE_GOING_DOWN    1
0423         #define ADAPTER_STATE_LINK_DOWN     2
0424         #define ADAPTER_STATE_INIT_FAILED   31
0425     unsigned int mtu_supported;
0426         #define BNX2I_MAX_MTU_SUPPORTED     9000
0427 
0428     struct Scsi_Host *shost;
0429 
0430     u32 max_sqes;
0431     u32 max_rqes;
0432     u32 max_cqes;
0433     u32 num_ccell;
0434 
0435     int ofld_conns_active;
0436     wait_queue_head_t eh_wait;
0437 
0438     int max_active_conns;
0439     struct iscsi_cid_queue cid_que;
0440 
0441     rwlock_t ep_rdwr_lock;
0442     struct list_head ep_ofld_list;
0443     struct list_head ep_active_list;
0444     struct list_head ep_destroy_list;
0445 
0446     /*
0447      * BD table to be used with MP (Middle Path requests.
0448      */
0449     char *mp_bd_tbl;
0450     dma_addr_t mp_bd_dma;
0451     char *dummy_buffer;
0452     dma_addr_t dummy_buf_dma;
0453 
0454     spinlock_t lock;    /* protects hba structure access */
0455     struct mutex net_dev_lock;/* sync net device access */
0456 
0457     int hba_shutdown_tmo;
0458     int conn_teardown_tmo;
0459     int conn_ctx_destroy_tmo;
0460     /*
0461      * PCI related info.
0462      */
0463     u16 pci_did;
0464     u16 pci_vid;
0465     u16 pci_sdid;
0466     u16 pci_svid;
0467     u16 pci_func;
0468     u16 pci_devno;
0469 
0470     /*
0471      * Following are a bunch of statistics useful during development
0472      * and later stage for score boarding.
0473      */
0474     u32 num_wqe_sent;
0475     u32 num_cqe_rcvd;
0476     u32 num_intr_claimed;
0477     u32 link_changed_count;
0478     u32 ipaddr_changed_count;
0479     u32 num_sess_opened;
0480     u32 num_conn_opened;
0481     unsigned int ctx_ccell_tasks;
0482 
0483 #ifdef CONFIG_32BIT
0484     spinlock_t stat_lock;
0485 #endif
0486     struct bnx2i_stats_info bnx2i_stats;
0487     struct iscsi_stats_info stats;
0488 };
0489 
0490 
0491 /*******************************************************************************
0492  *  QP [ SQ / RQ / CQ ] info.
0493  ******************************************************************************/
0494 
0495 /*
0496  * SQ/RQ/CQ generic structure definition
0497  */
0498 struct  sqe {
0499     u8 sqe_byte[BNX2I_SQ_WQE_SIZE];
0500 };
0501 
0502 struct  rqe {
0503     u8 rqe_byte[BNX2I_RQ_WQE_SIZE];
0504 };
0505 
0506 struct  cqe {
0507     u8 cqe_byte[BNX2I_CQE_SIZE];
0508 };
0509 
0510 
0511 enum {
0512 #if defined(__LITTLE_ENDIAN)
0513     CNIC_EVENT_COAL_INDEX   = 0x0,
0514     CNIC_SEND_DOORBELL  = 0x4,
0515     CNIC_EVENT_CQ_ARM   = 0x7,
0516     CNIC_RECV_DOORBELL  = 0x8
0517 #elif defined(__BIG_ENDIAN)
0518     CNIC_EVENT_COAL_INDEX   = 0x2,
0519     CNIC_SEND_DOORBELL  = 0x6,
0520     CNIC_EVENT_CQ_ARM   = 0x4,
0521     CNIC_RECV_DOORBELL  = 0xa
0522 #endif
0523 };
0524 
0525 
0526 /*
0527  * CQ DB
0528  */
0529 struct bnx2x_iscsi_cq_pend_cmpl {
0530     /* CQ producer, updated by Ustorm */
0531     u16 ustrom_prod;
0532     /* CQ pending completion counter */
0533     u16 pend_cntr;
0534 };
0535 
0536 
0537 struct bnx2i_5771x_cq_db {
0538     struct bnx2x_iscsi_cq_pend_cmpl qp_pend_cmpl[BNX2X_MAX_CQS];
0539     /* CQ pending completion ITT array */
0540     u16 itt[BNX2X_MAX_CQS];
0541     /* Cstorm CQ sequence to notify array, updated by driver */;
0542     u16 sqn[BNX2X_MAX_CQS];
0543     u32 reserved[4] /* 16 byte allignment */;
0544 };
0545 
0546 
0547 struct bnx2i_5771x_sq_rq_db {
0548     u16 prod_idx;
0549     u8 reserved0[62]; /* Pad structure size to 64 bytes */
0550 };
0551 
0552 
0553 struct bnx2i_5771x_dbell_hdr {
0554     u8 header;
0555     /* 1 for rx doorbell, 0 for tx doorbell */
0556 #define B577XX_DOORBELL_HDR_RX              (0x1<<0)
0557 #define B577XX_DOORBELL_HDR_RX_SHIFT            0
0558     /* 0 for normal doorbell, 1 for advertise wnd doorbell */
0559 #define B577XX_DOORBELL_HDR_DB_TYPE         (0x1<<1)
0560 #define B577XX_DOORBELL_HDR_DB_TYPE_SHIFT       1
0561     /* rdma tx only: DPM transaction size specifier (64/128/256/512B) */
0562 #define B577XX_DOORBELL_HDR_DPM_SIZE            (0x3<<2)
0563 #define B577XX_DOORBELL_HDR_DPM_SIZE_SHIFT      2
0564     /* connection type */
0565 #define B577XX_DOORBELL_HDR_CONN_TYPE           (0xF<<4)
0566 #define B577XX_DOORBELL_HDR_CONN_TYPE_SHIFT     4
0567 };
0568 
0569 struct bnx2i_5771x_dbell {
0570     struct bnx2i_5771x_dbell_hdr dbell;
0571     u8 pad[3];
0572 
0573 };
0574 
0575 /**
0576  * struct qp_info - QP (share queue region) atrributes structure
0577  *
0578  * @ctx_base:           ioremapped pci register base to access doorbell register
0579  *                      pertaining to this offloaded connection
0580  * @sq_virt:            virtual address of send queue (SQ) region
0581  * @sq_phys:            DMA address of SQ memory region
0582  * @sq_mem_size:        SQ size
0583  * @sq_prod_qe:         SQ producer entry pointer
0584  * @sq_cons_qe:         SQ consumer entry pointer
0585  * @sq_first_qe:        virtual address of first entry in SQ
0586  * @sq_last_qe:         virtual address of last entry in SQ
0587  * @sq_prod_idx:        SQ producer index
0588  * @sq_cons_idx:        SQ consumer index
0589  * @sqe_left:           number sq entry left
0590  * @sq_pgtbl_virt:      page table describing buffer consituting SQ region
0591  * @sq_pgtbl_phys:      dma address of 'sq_pgtbl_virt'
0592  * @sq_pgtbl_size:      SQ page table size
0593  * @cq_virt:            virtual address of completion queue (CQ) region
0594  * @cq_phys:            DMA address of RQ memory region
0595  * @cq_mem_size:        CQ size
0596  * @cq_prod_qe:         CQ producer entry pointer
0597  * @cq_cons_qe:         CQ consumer entry pointer
0598  * @cq_first_qe:        virtual address of first entry in CQ
0599  * @cq_last_qe:         virtual address of last entry in CQ
0600  * @cq_prod_idx:        CQ producer index
0601  * @cq_cons_idx:        CQ consumer index
0602  * @cqe_left:           number cq entry left
0603  * @cqe_size:           size of each CQ entry
0604  * @cqe_exp_seq_sn:     next expected CQE sequence number
0605  * @cq_pgtbl_virt:      page table describing buffer consituting CQ region
0606  * @cq_pgtbl_phys:      dma address of 'cq_pgtbl_virt'
0607  * @cq_pgtbl_size:      CQ page table size
0608  * @rq_virt:            virtual address of receive queue (RQ) region
0609  * @rq_phys:            DMA address of RQ memory region
0610  * @rq_mem_size:        RQ size
0611  * @rq_prod_qe:         RQ producer entry pointer
0612  * @rq_cons_qe:         RQ consumer entry pointer
0613  * @rq_first_qe:        virtual address of first entry in RQ
0614  * @rq_last_qe:         virtual address of last entry in RQ
0615  * @rq_prod_idx:        RQ producer index
0616  * @rq_cons_idx:        RQ consumer index
0617  * @rqe_left:           number rq entry left
0618  * @rq_pgtbl_virt:      page table describing buffer consituting RQ region
0619  * @rq_pgtbl_phys:      dma address of 'rq_pgtbl_virt'
0620  * @rq_pgtbl_size:      RQ page table size
0621  *
0622  * queue pair (QP) is a per connection shared data structure which is used
0623  *  to send work requests (SQ), receive completion notifications (CQ)
0624  *  and receive asynchoronous / scsi sense info (RQ). 'qp_info' structure
0625  *  below holds queue memory, consumer/producer indexes and page table
0626  *  information
0627  */
0628 struct qp_info {
0629     void __iomem *ctx_base;
0630 #define DPM_TRIGER_TYPE         0x40
0631 
0632 #define BNX2I_570x_QUE_DB_SIZE      0
0633 #define BNX2I_5771x_QUE_DB_SIZE     16
0634     struct sqe *sq_virt;
0635     dma_addr_t sq_phys;
0636     u32 sq_mem_size;
0637 
0638     struct sqe *sq_prod_qe;
0639     struct sqe *sq_cons_qe;
0640     struct sqe *sq_first_qe;
0641     struct sqe *sq_last_qe;
0642     u16 sq_prod_idx;
0643     u16 sq_cons_idx;
0644     u32 sqe_left;
0645 
0646     void *sq_pgtbl_virt;
0647     dma_addr_t sq_pgtbl_phys;
0648     u32 sq_pgtbl_size;  /* set to PAGE_SIZE for 5708 & 5709 */
0649 
0650     struct cqe *cq_virt;
0651     dma_addr_t cq_phys;
0652     u32 cq_mem_size;
0653 
0654     struct cqe *cq_prod_qe;
0655     struct cqe *cq_cons_qe;
0656     struct cqe *cq_first_qe;
0657     struct cqe *cq_last_qe;
0658     u16 cq_prod_idx;
0659     u16 cq_cons_idx;
0660     u32 cqe_left;
0661     u32 cqe_size;
0662     u32 cqe_exp_seq_sn;
0663 
0664     void *cq_pgtbl_virt;
0665     dma_addr_t cq_pgtbl_phys;
0666     u32 cq_pgtbl_size;  /* set to PAGE_SIZE for 5708 & 5709 */
0667 
0668     struct rqe *rq_virt;
0669     dma_addr_t rq_phys;
0670     u32 rq_mem_size;
0671 
0672     struct rqe *rq_prod_qe;
0673     struct rqe *rq_cons_qe;
0674     struct rqe *rq_first_qe;
0675     struct rqe *rq_last_qe;
0676     u16 rq_prod_idx;
0677     u16 rq_cons_idx;
0678     u32 rqe_left;
0679 
0680     void *rq_pgtbl_virt;
0681     dma_addr_t rq_pgtbl_phys;
0682     u32 rq_pgtbl_size;  /* set to PAGE_SIZE for 5708 & 5709 */
0683 };
0684 
0685 
0686 
0687 /*
0688  * CID handles
0689  */
0690 struct ep_handles {
0691     u32 fw_cid;
0692     u32 drv_iscsi_cid;
0693     u16 pg_cid;
0694     u16 rsvd;
0695 };
0696 
0697 
0698 enum {
0699     EP_STATE_IDLE                   = 0x0,
0700     EP_STATE_PG_OFLD_START          = 0x1,
0701     EP_STATE_PG_OFLD_COMPL          = 0x2,
0702     EP_STATE_OFLD_START             = 0x4,
0703     EP_STATE_OFLD_COMPL             = 0x8,
0704     EP_STATE_CONNECT_START          = 0x10,
0705     EP_STATE_CONNECT_COMPL          = 0x20,
0706     EP_STATE_ULP_UPDATE_START       = 0x40,
0707     EP_STATE_ULP_UPDATE_COMPL       = 0x80,
0708     EP_STATE_DISCONN_START          = 0x100,
0709     EP_STATE_DISCONN_COMPL          = 0x200,
0710     EP_STATE_CLEANUP_START          = 0x400,
0711     EP_STATE_CLEANUP_CMPL           = 0x800,
0712     EP_STATE_TCP_FIN_RCVD           = 0x1000,
0713     EP_STATE_TCP_RST_RCVD           = 0x2000,
0714     EP_STATE_LOGOUT_SENT            = 0x4000,
0715     EP_STATE_LOGOUT_RESP_RCVD       = 0x8000,
0716     EP_STATE_PG_OFLD_FAILED         = 0x1000000,
0717     EP_STATE_ULP_UPDATE_FAILED      = 0x2000000,
0718     EP_STATE_CLEANUP_FAILED         = 0x4000000,
0719     EP_STATE_OFLD_FAILED            = 0x8000000,
0720     EP_STATE_CONNECT_FAILED         = 0x10000000,
0721     EP_STATE_DISCONN_TIMEDOUT       = 0x20000000,
0722     EP_STATE_OFLD_FAILED_CID_BUSY   = 0x80000000,
0723 };
0724 
0725 /**
0726  * struct bnx2i_endpoint - representation of tcp connection in NX2 world
0727  *
0728  * @link:               list head to link elements
0729  * @hba:                adapter to which this connection belongs
0730  * @conn:               iscsi connection this EP is linked to
0731  * @cls_ep:             associated iSCSI endpoint pointer
0732  * @cm_sk:              cnic sock struct
0733  * @hba_age:            age to detect if 'iscsid' issues ep_disconnect()
0734  *                      after HBA reset is completed by bnx2i/cnic/bnx2
0735  *                      modules
0736  * @state:              tracks offload connection state machine
0737  * @timestamp:          tracks the start time when the ep begins to connect
0738  * @num_active_cmds:    tracks the number of outstanding commands for this ep
0739  * @ec_shift:           the amount of shift as part of the event coal calc
0740  * @qp:                 QP information
0741  * @ids:                contains chip allocated *context id* & driver assigned
0742  *                      *iscsi cid*
0743  * @ofld_timer:         offload timer to detect timeout
0744  * @ofld_wait:          wait queue
0745  *
0746  * Endpoint Structure - equivalent of tcp socket structure
0747  */
0748 struct bnx2i_endpoint {
0749     struct list_head link;
0750     struct bnx2i_hba *hba;
0751     struct bnx2i_conn *conn;
0752     struct iscsi_endpoint *cls_ep;
0753     struct cnic_sock *cm_sk;
0754     u32 hba_age;
0755     u32 state;
0756     unsigned long timestamp;
0757     atomic_t num_active_cmds;
0758     u32 ec_shift;
0759 
0760     struct qp_info qp;
0761     struct ep_handles ids;
0762         #define ep_iscsi_cid    ids.drv_iscsi_cid
0763         #define ep_cid      ids.fw_cid
0764         #define ep_pg_cid   ids.pg_cid
0765     struct timer_list ofld_timer;
0766     wait_queue_head_t ofld_wait;
0767 };
0768 
0769 
0770 struct bnx2i_work {
0771     struct list_head list;
0772     struct iscsi_session *session;
0773     struct bnx2i_conn *bnx2i_conn;
0774     struct cqe cqe;
0775 };
0776 
0777 struct bnx2i_percpu_s {
0778     struct task_struct *iothread;
0779     struct list_head work_list;
0780     spinlock_t p_work_lock;
0781 };
0782 
0783 
0784 /* Global variables */
0785 extern unsigned int error_mask1, error_mask2;
0786 extern u64 iscsi_error_mask;
0787 extern unsigned int en_tcp_dack;
0788 extern unsigned int event_coal_div;
0789 extern unsigned int event_coal_min;
0790 
0791 extern struct scsi_transport_template *bnx2i_scsi_xport_template;
0792 extern struct iscsi_transport bnx2i_iscsi_transport;
0793 extern struct cnic_ulp_ops bnx2i_cnic_cb;
0794 
0795 extern unsigned int sq_size;
0796 extern unsigned int rq_size;
0797 
0798 extern const struct attribute_group *bnx2i_dev_groups[];
0799 
0800 
0801 
0802 /*
0803  * Function Prototypes
0804  */
0805 extern void bnx2i_identify_device(struct bnx2i_hba *hba, struct cnic_dev *dev);
0806 
0807 extern void bnx2i_ulp_init(struct cnic_dev *dev);
0808 extern void bnx2i_ulp_exit(struct cnic_dev *dev);
0809 extern void bnx2i_start(void *handle);
0810 extern void bnx2i_stop(void *handle);
0811 extern int bnx2i_get_stats(void *handle);
0812 
0813 extern struct bnx2i_hba *get_adapter_list_head(void);
0814 
0815 struct bnx2i_conn *bnx2i_get_conn_from_id(struct bnx2i_hba *hba,
0816                       u16 iscsi_cid);
0817 
0818 int bnx2i_alloc_ep_pool(void);
0819 void bnx2i_release_ep_pool(void);
0820 struct bnx2i_endpoint *bnx2i_ep_ofld_list_next(struct bnx2i_hba *hba);
0821 struct bnx2i_endpoint *bnx2i_ep_destroy_list_next(struct bnx2i_hba *hba);
0822 
0823 struct bnx2i_hba *bnx2i_find_hba_for_cnic(struct cnic_dev *cnic);
0824 
0825 struct bnx2i_hba *bnx2i_alloc_hba(struct cnic_dev *cnic);
0826 void bnx2i_free_hba(struct bnx2i_hba *hba);
0827 
0828 void bnx2i_get_rq_buf(struct bnx2i_conn *conn, char *ptr, int len);
0829 void bnx2i_put_rq_buf(struct bnx2i_conn *conn, int count);
0830 
0831 void bnx2i_iscsi_unmap_sg_list(struct bnx2i_cmd *cmd);
0832 
0833 void bnx2i_drop_session(struct iscsi_cls_session *session);
0834 
0835 extern int bnx2i_send_fw_iscsi_init_msg(struct bnx2i_hba *hba);
0836 extern int bnx2i_send_iscsi_login(struct bnx2i_conn *conn,
0837                   struct iscsi_task *mtask);
0838 extern int bnx2i_send_iscsi_tmf(struct bnx2i_conn *conn,
0839                   struct iscsi_task *mtask);
0840 extern int bnx2i_send_iscsi_text(struct bnx2i_conn *conn,
0841                  struct iscsi_task *mtask);
0842 extern int bnx2i_send_iscsi_scsicmd(struct bnx2i_conn *conn,
0843                     struct bnx2i_cmd *cmnd);
0844 extern int bnx2i_send_iscsi_nopout(struct bnx2i_conn *conn,
0845                    struct iscsi_task *mtask,
0846                    char *datap, int data_len, int unsol);
0847 extern int bnx2i_send_iscsi_logout(struct bnx2i_conn *conn,
0848                    struct iscsi_task *mtask);
0849 extern void bnx2i_send_cmd_cleanup_req(struct bnx2i_hba *hba,
0850                        struct bnx2i_cmd *cmd);
0851 extern int bnx2i_send_conn_ofld_req(struct bnx2i_hba *hba,
0852                     struct bnx2i_endpoint *ep);
0853 extern void bnx2i_update_iscsi_conn(struct iscsi_conn *conn);
0854 extern int bnx2i_send_conn_destroy(struct bnx2i_hba *hba,
0855                    struct bnx2i_endpoint *ep);
0856 
0857 extern int bnx2i_alloc_qp_resc(struct bnx2i_hba *hba,
0858                    struct bnx2i_endpoint *ep);
0859 extern void bnx2i_free_qp_resc(struct bnx2i_hba *hba,
0860                    struct bnx2i_endpoint *ep);
0861 extern void bnx2i_ep_ofld_timer(struct timer_list *t);
0862 extern struct bnx2i_endpoint *bnx2i_find_ep_in_ofld_list(
0863         struct bnx2i_hba *hba, u32 iscsi_cid);
0864 extern struct bnx2i_endpoint *bnx2i_find_ep_in_destroy_list(
0865         struct bnx2i_hba *hba, u32 iscsi_cid);
0866 
0867 extern int bnx2i_map_ep_dbell_regs(struct bnx2i_endpoint *ep);
0868 extern int bnx2i_arm_cq_event_coalescing(struct bnx2i_endpoint *ep, u8 action);
0869 
0870 extern int bnx2i_hw_ep_disconnect(struct bnx2i_endpoint *bnx2i_ep);
0871 
0872 /* Debug related function prototypes */
0873 extern void bnx2i_print_pend_cmd_queue(struct bnx2i_conn *conn);
0874 extern void bnx2i_print_active_cmd_queue(struct bnx2i_conn *conn);
0875 extern void bnx2i_print_xmit_pdu_queue(struct bnx2i_conn *conn);
0876 extern void bnx2i_print_recv_state(struct bnx2i_conn *conn);
0877 
0878 extern int bnx2i_percpu_io_thread(void *arg);
0879 extern int bnx2i_process_scsi_cmd_resp(struct iscsi_session *session,
0880                        struct bnx2i_conn *bnx2i_conn,
0881                        struct cqe *cqe);
0882 #endif
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