Back to home page

OSCL-LXR
 
 

     

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
0004  * Copyright (c) 2014- QLogic Corporation.
0005  * All rights reserved
0006  * www.qlogic.com
0007  *
0008  * Linux driver for QLogic BR-series Fibre Channel Host Bus Adapter.
0009  */
0010 
0011 #ifndef __BFI_H__
0012 #define __BFI_H__
0013 
0014 #include "bfa_defs.h"
0015 #include "bfa_defs_svc.h"
0016 
0017 #pragma pack(1)
0018 
0019 /* Per dma segment max size */
0020 #define BFI_MEM_DMA_SEG_SZ  (131072)
0021 
0022 /* Get number of dma segments required */
0023 #define BFI_MEM_DMA_NSEGS(_num_reqs, _req_sz)               \
0024     ((u16)(((((_num_reqs) * (_req_sz)) + BFI_MEM_DMA_SEG_SZ - 1) &  \
0025      ~(BFI_MEM_DMA_SEG_SZ - 1)) / BFI_MEM_DMA_SEG_SZ))
0026 
0027 /* Get num dma reqs - that fit in a segment */
0028 #define BFI_MEM_NREQS_SEG(_rqsz) (BFI_MEM_DMA_SEG_SZ / (_rqsz))
0029 
0030 /* Get segment num from tag */
0031 #define BFI_MEM_SEG_FROM_TAG(_tag, _rqsz) ((_tag) / BFI_MEM_NREQS_SEG(_rqsz))
0032 
0033 /* Get dma req offset in a segment */
0034 #define BFI_MEM_SEG_REQ_OFFSET(_tag, _sz)   \
0035     ((_tag) - (BFI_MEM_SEG_FROM_TAG(_tag, _sz) * BFI_MEM_NREQS_SEG(_sz)))
0036 
0037 /*
0038  * BFI FW image type
0039  */
0040 #define BFI_FLASH_CHUNK_SZ          256 /*  Flash chunk size */
0041 #define BFI_FLASH_CHUNK_SZ_WORDS    (BFI_FLASH_CHUNK_SZ/sizeof(u32))
0042 #define BFI_FLASH_IMAGE_SZ      0x100000
0043 
0044 /*
0045  * Msg header common to all msgs
0046  */
0047 struct bfi_mhdr_s {
0048     u8      msg_class;  /*  @ref bfi_mclass_t           */
0049     u8      msg_id;     /*  msg opcode with in the class   */
0050     union {
0051         struct {
0052             u8  qid;
0053             u8  fn_lpu; /*  msg destination         */
0054         } h2i;
0055         u16 i2htok; /*  token in msgs to host       */
0056     } mtag;
0057 };
0058 
0059 #define bfi_fn_lpu(__fn, __lpu) ((__fn) << 1 | (__lpu))
0060 #define bfi_mhdr_2_fn(_mh)  ((_mh)->mtag.h2i.fn_lpu >> 1)
0061 
0062 #define bfi_h2i_set(_mh, _mc, _op, _fn_lpu) do {        \
0063     (_mh).msg_class     = (_mc);      \
0064     (_mh).msg_id        = (_op);      \
0065     (_mh).mtag.h2i.fn_lpu   = (_fn_lpu);      \
0066 } while (0)
0067 
0068 #define bfi_i2h_set(_mh, _mc, _op, _i2htok) do {        \
0069     (_mh).msg_class     = (_mc);      \
0070     (_mh).msg_id        = (_op);      \
0071     (_mh).mtag.i2htok   = (_i2htok);      \
0072 } while (0)
0073 
0074 /*
0075  * Message opcodes: 0-127 to firmware, 128-255 to host
0076  */
0077 #define BFI_I2H_OPCODE_BASE 128
0078 #define BFA_I2HM(_x)        ((_x) + BFI_I2H_OPCODE_BASE)
0079 
0080 /*
0081  ****************************************************************************
0082  *
0083  * Scatter Gather Element and Page definition
0084  *
0085  ****************************************************************************
0086  */
0087 
0088 #define BFI_SGE_INLINE  1
0089 #define BFI_SGE_INLINE_MAX  (BFI_SGE_INLINE + 1)
0090 
0091 /*
0092  * SG Flags
0093  */
0094 enum {
0095     BFI_SGE_DATA        = 0,    /*  data address, not last       */
0096     BFI_SGE_DATA_CPL    = 1,    /*  data addr, last in current page */
0097     BFI_SGE_DATA_LAST   = 3,    /*  data address, last           */
0098     BFI_SGE_LINK        = 2,    /*  link address             */
0099     BFI_SGE_PGDLEN      = 2,    /*  cumulative data length for page */
0100 };
0101 
0102 /*
0103  * DMA addresses
0104  */
0105 union bfi_addr_u {
0106     struct {
0107         __be32  addr_lo;
0108         __be32  addr_hi;
0109     } a32;
0110 };
0111 
0112 /*
0113  * Scatter Gather Element used for fast-path IO requests
0114  */
0115 struct bfi_sge_s {
0116 #ifdef __BIG_ENDIAN
0117     u32 flags:2,
0118             rsvd:2,
0119             sg_len:28;
0120 #else
0121     u32 sg_len:28,
0122             rsvd:2,
0123             flags:2;
0124 #endif
0125     union bfi_addr_u sga;
0126 };
0127 
0128 /**
0129  * Generic DMA addr-len pair.
0130  */
0131 struct bfi_alen_s {
0132     union bfi_addr_u    al_addr;    /* DMA addr of buffer   */
0133     u32         al_len;     /* length of buffer */
0134 };
0135 
0136 /*
0137  * Scatter Gather Page
0138  */
0139 #define BFI_SGPG_DATA_SGES      7
0140 #define BFI_SGPG_SGES_MAX       (BFI_SGPG_DATA_SGES + 1)
0141 #define BFI_SGPG_RSVD_WD_LEN    8
0142 struct bfi_sgpg_s {
0143     struct bfi_sge_s sges[BFI_SGPG_SGES_MAX];
0144     u32 rsvd[BFI_SGPG_RSVD_WD_LEN];
0145 };
0146 
0147 /* FCP module definitions */
0148 #define BFI_IO_MAX  (2000)
0149 #define BFI_IOIM_SNSLEN (256)
0150 #define BFI_IOIM_SNSBUF_SEGS    \
0151     BFI_MEM_DMA_NSEGS(BFI_IO_MAX, BFI_IOIM_SNSLEN)
0152 
0153 /*
0154  * Large Message structure - 128 Bytes size Msgs
0155  */
0156 #define BFI_LMSG_SZ     128
0157 #define BFI_LMSG_PL_WSZ \
0158             ((BFI_LMSG_SZ - sizeof(struct bfi_mhdr_s)) / 4)
0159 
0160 struct bfi_msg_s {
0161     struct bfi_mhdr_s mhdr;
0162     u32 pl[BFI_LMSG_PL_WSZ];
0163 };
0164 
0165 /*
0166  * Mailbox message structure
0167  */
0168 #define BFI_MBMSG_SZ        7
0169 struct bfi_mbmsg_s {
0170     struct bfi_mhdr_s   mh;
0171     u32     pl[BFI_MBMSG_SZ];
0172 };
0173 
0174 /*
0175  * Supported PCI function class codes (personality)
0176  */
0177 enum bfi_pcifn_class {
0178     BFI_PCIFN_CLASS_FC  = 0x0c04,
0179     BFI_PCIFN_CLASS_ETH = 0x0200,
0180 };
0181 
0182 /*
0183  * Message Classes
0184  */
0185 enum bfi_mclass {
0186     BFI_MC_IOC      = 1,    /*  IO Controller (IOC)     */
0187     BFI_MC_DIAG     = 2,    /*  Diagnostic Msgs            */
0188     BFI_MC_FLASH        = 3,    /*  Flash message class */
0189     BFI_MC_CEE      = 4,    /*  CEE */
0190     BFI_MC_FCPORT       = 5,    /*  FC port             */
0191     BFI_MC_IOCFC        = 6,    /*  FC - IO Controller (IOC)        */
0192     BFI_MC_ABLK     = 7,    /*  ASIC block configuration        */
0193     BFI_MC_UF       = 8,    /*  Unsolicited frame receive       */
0194     BFI_MC_FCXP     = 9,    /*  FC Transport            */
0195     BFI_MC_LPS      = 10,   /*  lport fc login services     */
0196     BFI_MC_RPORT        = 11,   /*  Remote port         */
0197     BFI_MC_ITN      = 12,   /*  I-T nexus (Initiator mode)      */
0198     BFI_MC_IOIM_READ    = 13,   /*  read IO (Initiator mode)        */
0199     BFI_MC_IOIM_WRITE   = 14,   /*  write IO (Initiator mode)       */
0200     BFI_MC_IOIM_IO      = 15,   /*  IO (Initiator mode)     */
0201     BFI_MC_IOIM     = 16,   /*  IO (Initiator mode)     */
0202     BFI_MC_IOIM_IOCOM   = 17,   /*  good IO completion          */
0203     BFI_MC_TSKIM        = 18,   /*  Initiator Task management       */
0204     BFI_MC_PORT     = 21,   /*  Physical port           */
0205     BFI_MC_SFP      = 22,   /*  SFP module  */
0206     BFI_MC_PHY      = 25,   /*  External PHY message class  */
0207     BFI_MC_FRU      = 34,
0208     BFI_MC_MAX      = 35
0209 };
0210 
0211 #define BFI_IOC_MAX_CQS     4
0212 #define BFI_IOC_MAX_CQS_ASIC    8
0213 #define BFI_IOC_MSGLEN_MAX  32  /* 32 bytes */
0214 
0215 /*
0216  *----------------------------------------------------------------------
0217  *              IOC
0218  *----------------------------------------------------------------------
0219  */
0220 
0221 /*
0222  * Different asic generations
0223  */
0224 enum bfi_asic_gen {
0225     BFI_ASIC_GEN_CB     = 1,    /* crossbow 8G FC       */
0226     BFI_ASIC_GEN_CT     = 2,    /* catapult 8G FC or 10G CNA    */
0227     BFI_ASIC_GEN_CT2    = 3,    /* catapult-2 16G FC or 10G CNA */
0228 };
0229 
0230 enum bfi_asic_mode {
0231     BFI_ASIC_MODE_FC    = 1,    /* FC upto 8G speed     */
0232     BFI_ASIC_MODE_FC16  = 2,    /* FC upto 16G speed        */
0233     BFI_ASIC_MODE_ETH   = 3,    /* Ethernet ports       */
0234     BFI_ASIC_MODE_COMBO = 4,    /* FC 16G and Ethernet 10G port */
0235 };
0236 
0237 enum bfi_ioc_h2i_msgs {
0238     BFI_IOC_H2I_ENABLE_REQ      = 1,
0239     BFI_IOC_H2I_DISABLE_REQ     = 2,
0240     BFI_IOC_H2I_GETATTR_REQ     = 3,
0241     BFI_IOC_H2I_DBG_SYNC        = 4,
0242     BFI_IOC_H2I_DBG_DUMP        = 5,
0243 };
0244 
0245 enum bfi_ioc_i2h_msgs {
0246     BFI_IOC_I2H_ENABLE_REPLY    = BFA_I2HM(1),
0247     BFI_IOC_I2H_DISABLE_REPLY   = BFA_I2HM(2),
0248     BFI_IOC_I2H_GETATTR_REPLY   = BFA_I2HM(3),
0249     BFI_IOC_I2H_HBEAT       = BFA_I2HM(4),
0250     BFI_IOC_I2H_ACQ_ADDR_REPLY  = BFA_I2HM(5),
0251 };
0252 
0253 /*
0254  * BFI_IOC_H2I_GETATTR_REQ message
0255  */
0256 struct bfi_ioc_getattr_req_s {
0257     struct bfi_mhdr_s   mh;
0258     union bfi_addr_u    attr_addr;
0259 };
0260 
0261 #define BFI_IOC_ATTR_UUID_SZ    16
0262 struct bfi_ioc_attr_s {
0263     wwn_t       mfg_pwwn;   /*  Mfg port wwn       */
0264     wwn_t       mfg_nwwn;   /*  Mfg node wwn       */
0265     mac_t       mfg_mac;    /*  Mfg mac        */
0266     u8      port_mode;  /* bfi_port_mode       */
0267     u8      rsvd_a;
0268     wwn_t       pwwn;
0269     wwn_t       nwwn;
0270     mac_t       mac;        /*  PBC or Mfg mac     */
0271     u16 rsvd_b;
0272     mac_t       fcoe_mac;
0273     u16 rsvd_c;
0274     char        brcd_serialnum[STRSZ(BFA_MFG_SERIALNUM_SIZE)];
0275     u8      pcie_gen;
0276     u8      pcie_lanes_orig;
0277     u8      pcie_lanes;
0278     u8      rx_bbcredit;    /*  receive buffer credits */
0279     u32 adapter_prop;   /*  adapter properties     */
0280     u16 maxfrsize;  /*  max receive frame size */
0281     char        asic_rev;
0282     u8      rsvd_d;
0283     char        fw_version[BFA_VERSION_LEN];
0284     char        optrom_version[BFA_VERSION_LEN];
0285     struct      bfa_mfg_vpd_s   vpd;
0286     u32 card_type;  /*  card type           */
0287     u8  mfg_day;    /* manufacturing day */
0288     u8  mfg_month;  /* manufacturing month */
0289     u16 mfg_year;   /* manufacturing year */
0290     u8  uuid[BFI_IOC_ATTR_UUID_SZ]; /*!< chinook uuid */
0291 };
0292 
0293 /*
0294  * BFI_IOC_I2H_GETATTR_REPLY message
0295  */
0296 struct bfi_ioc_getattr_reply_s {
0297     struct  bfi_mhdr_s  mh; /*  Common msg header       */
0298     u8          status; /*  cfg reply status        */
0299     u8          rsvd[3];
0300 };
0301 
0302 /*
0303  * Firmware memory page offsets
0304  */
0305 #define BFI_IOC_SMEM_PG0_CB (0x40)
0306 #define BFI_IOC_SMEM_PG0_CT (0x180)
0307 
0308 /*
0309  * Firmware statistic offset
0310  */
0311 #define BFI_IOC_FWSTATS_OFF (0x6B40)
0312 #define BFI_IOC_FWSTATS_SZ  (4096)
0313 
0314 /*
0315  * Firmware trace offset
0316  */
0317 #define BFI_IOC_TRC_OFF     (0x4b00)
0318 #define BFI_IOC_TRC_ENTS    256
0319 
0320 #define BFI_IOC_FW_SIGNATURE    (0xbfadbfad)
0321 #define BFA_IOC_FW_INV_SIGN (0xdeaddead)
0322 #define BFI_IOC_MD5SUM_SZ   4
0323 
0324 struct bfi_ioc_fwver_s {
0325 #ifdef __BIG_ENDIAN
0326     uint8_t patch;
0327     uint8_t maint;
0328     uint8_t minor;
0329     uint8_t major;
0330     uint8_t rsvd[2];
0331     uint8_t build;
0332     uint8_t phase;
0333 #else
0334     uint8_t major;
0335     uint8_t minor;
0336     uint8_t maint;
0337     uint8_t patch;
0338     uint8_t phase;
0339     uint8_t build;
0340     uint8_t rsvd[2];
0341 #endif
0342 };
0343 
0344 struct bfi_ioc_image_hdr_s {
0345     u32 signature;  /* constant signature       */
0346     u8  asic_gen;   /* asic generation      */
0347     u8  asic_mode;
0348     u8  port0_mode; /* device mode for port 0   */
0349     u8  port1_mode; /* device mode for port 1   */
0350     u32 exec;       /* exec vector          */
0351     u32 bootenv;    /* firmware boot env        */
0352     u32 rsvd_b[2];
0353     struct bfi_ioc_fwver_s  fwver;
0354     u32 md5sum[BFI_IOC_MD5SUM_SZ];
0355 };
0356 
0357 enum bfi_ioc_img_ver_cmp_e {
0358     BFI_IOC_IMG_VER_INCOMP,
0359     BFI_IOC_IMG_VER_OLD,
0360     BFI_IOC_IMG_VER_SAME,
0361     BFI_IOC_IMG_VER_BETTER
0362 };
0363 
0364 #define BFI_FWBOOT_DEVMODE_OFF      4
0365 #define BFI_FWBOOT_TYPE_OFF     8
0366 #define BFI_FWBOOT_ENV_OFF      12
0367 #define BFI_FWBOOT_DEVMODE(__asic_gen, __asic_mode, __p0_mode, __p1_mode) \
0368     (((u32)(__asic_gen)) << 24 |        \
0369      ((u32)(__asic_mode)) << 16 |       \
0370      ((u32)(__p0_mode)) << 8 |      \
0371      ((u32)(__p1_mode)))
0372 
0373 enum bfi_fwboot_type {
0374     BFI_FWBOOT_TYPE_NORMAL  = 0,
0375     BFI_FWBOOT_TYPE_FLASH   = 1,
0376     BFI_FWBOOT_TYPE_MEMTEST = 2,
0377 };
0378 
0379 #define BFI_FWBOOT_TYPE_NORMAL  0
0380 #define BFI_FWBOOT_TYPE_MEMTEST 2
0381 #define BFI_FWBOOT_ENV_OS       0
0382 
0383 enum bfi_port_mode {
0384     BFI_PORT_MODE_FC    = 1,
0385     BFI_PORT_MODE_ETH   = 2,
0386 };
0387 
0388 struct bfi_ioc_hbeat_s {
0389     struct bfi_mhdr_s  mh;      /*  common msg header       */
0390     u32    hb_count;    /*  current heart beat count    */
0391 };
0392 
0393 /*
0394  * IOC hardware/firmware state
0395  */
0396 enum bfi_ioc_state {
0397     BFI_IOC_UNINIT      = 0,    /*  not initialized          */
0398     BFI_IOC_INITING     = 1,    /*  h/w is being initialized         */
0399     BFI_IOC_HWINIT      = 2,    /*  h/w is initialized           */
0400     BFI_IOC_CFG     = 3,    /*  IOC configuration in progress   */
0401     BFI_IOC_OP      = 4,    /*  IOC is operational           */
0402     BFI_IOC_DISABLING   = 5,    /*  IOC is being disabled        */
0403     BFI_IOC_DISABLED    = 6,    /*  IOC is disabled          */
0404     BFI_IOC_CFG_DISABLED    = 7,    /*  IOC is being disabled;transient */
0405     BFI_IOC_FAIL        = 8,    /*  IOC heart-beat failure       */
0406     BFI_IOC_MEMTEST     = 9,    /*  IOC is doing memtest         */
0407 };
0408 
0409 #define BFA_IOC_CB_JOIN_SH  16
0410 #define BFA_IOC_CB_FWSTATE_MASK 0x0000ffff
0411 #define BFA_IOC_CB_JOIN_MASK    0xffff0000
0412 
0413 #define BFI_IOC_ENDIAN_SIG  0x12345678
0414 
0415 enum {
0416     BFI_ADAPTER_TYPE_FC = 0x01,     /*  FC adapters    */
0417     BFI_ADAPTER_TYPE_MK = 0x0f0000, /*  adapter type mask     */
0418     BFI_ADAPTER_TYPE_SH = 16,           /*  adapter type shift    */
0419     BFI_ADAPTER_NPORTS_MK   = 0xff00,   /*  number of ports mask  */
0420     BFI_ADAPTER_NPORTS_SH   = 8,            /*  number of ports shift */
0421     BFI_ADAPTER_SPEED_MK    = 0xff,     /*  adapter speed mask    */
0422     BFI_ADAPTER_SPEED_SH    = 0,            /*  adapter speed shift   */
0423     BFI_ADAPTER_PROTO   = 0x100000, /*  prototype adapaters   */
0424     BFI_ADAPTER_TTV     = 0x200000, /*  TTV debug capable     */
0425     BFI_ADAPTER_UNSUPP  = 0x400000, /*  unknown adapter type  */
0426 };
0427 
0428 #define BFI_ADAPTER_GETP(__prop, __adap_prop)           \
0429     (((__adap_prop) & BFI_ADAPTER_ ## __prop ## _MK) >> \
0430         BFI_ADAPTER_ ## __prop ## _SH)
0431 #define BFI_ADAPTER_SETP(__prop, __val)             \
0432     ((__val) << BFI_ADAPTER_ ## __prop ## _SH)
0433 #define BFI_ADAPTER_IS_PROTO(__adap_type)           \
0434     ((__adap_type) & BFI_ADAPTER_PROTO)
0435 #define BFI_ADAPTER_IS_TTV(__adap_type)             \
0436     ((__adap_type) & BFI_ADAPTER_TTV)
0437 #define BFI_ADAPTER_IS_UNSUPP(__adap_type)          \
0438     ((__adap_type) & BFI_ADAPTER_UNSUPP)
0439 #define BFI_ADAPTER_IS_SPECIAL(__adap_type)         \
0440     ((__adap_type) & (BFI_ADAPTER_TTV | BFI_ADAPTER_PROTO | \
0441             BFI_ADAPTER_UNSUPP))
0442 
0443 /*
0444  * BFI_IOC_H2I_ENABLE_REQ & BFI_IOC_H2I_DISABLE_REQ messages
0445  */
0446 struct bfi_ioc_ctrl_req_s {
0447     struct bfi_mhdr_s   mh;
0448     u16         clscode;
0449     u16         rsvd;
0450     u32     tv_sec;
0451 };
0452 #define bfi_ioc_enable_req_t struct bfi_ioc_ctrl_req_s;
0453 #define bfi_ioc_disable_req_t struct bfi_ioc_ctrl_req_s;
0454 
0455 /*
0456  * BFI_IOC_I2H_ENABLE_REPLY & BFI_IOC_I2H_DISABLE_REPLY messages
0457  */
0458 struct bfi_ioc_ctrl_reply_s {
0459     struct bfi_mhdr_s   mh;     /*  Common msg header     */
0460     u8          status;     /*  enable/disable status */
0461     u8          port_mode;  /*  bfa_mode_s  */
0462     u8          cap_bm;     /*  capability bit mask */
0463     u8          rsvd;
0464 };
0465 #define bfi_ioc_enable_reply_t struct bfi_ioc_ctrl_reply_s;
0466 #define bfi_ioc_disable_reply_t struct bfi_ioc_ctrl_reply_s;
0467 
0468 #define BFI_IOC_MSGSZ   8
0469 /*
0470  * H2I Messages
0471  */
0472 union bfi_ioc_h2i_msg_u {
0473     struct bfi_mhdr_s       mh;
0474     struct bfi_ioc_ctrl_req_s   enable_req;
0475     struct bfi_ioc_ctrl_req_s   disable_req;
0476     struct bfi_ioc_getattr_req_s    getattr_req;
0477     u32         mboxmsg[BFI_IOC_MSGSZ];
0478 };
0479 
0480 /*
0481  * I2H Messages
0482  */
0483 union bfi_ioc_i2h_msg_u {
0484     struct bfi_mhdr_s       mh;
0485     struct bfi_ioc_ctrl_reply_s fw_event;
0486     u32         mboxmsg[BFI_IOC_MSGSZ];
0487 };
0488 
0489 
0490 /*
0491  *----------------------------------------------------------------------
0492  *              PBC
0493  *----------------------------------------------------------------------
0494  */
0495 
0496 #define BFI_PBC_MAX_BLUNS   8
0497 #define BFI_PBC_MAX_VPORTS  16
0498 #define BFI_PBC_PORT_DISABLED   2
0499 
0500 /*
0501  * PBC boot lun configuration
0502  */
0503 struct bfi_pbc_blun_s {
0504     wwn_t       tgt_pwwn;
0505     struct scsi_lun tgt_lun;
0506 };
0507 
0508 /*
0509  * PBC virtual port configuration
0510  */
0511 struct bfi_pbc_vport_s {
0512     wwn_t       vp_pwwn;
0513     wwn_t       vp_nwwn;
0514 };
0515 
0516 /*
0517  * BFI pre-boot configuration information
0518  */
0519 struct bfi_pbc_s {
0520     u8      port_enabled;
0521     u8      boot_enabled;
0522     u8      nbluns;
0523     u8      nvports;
0524     u8      port_speed;
0525     u8      rsvd_a;
0526     u16 hss;
0527     wwn_t       pbc_pwwn;
0528     wwn_t       pbc_nwwn;
0529     struct bfi_pbc_blun_s blun[BFI_PBC_MAX_BLUNS];
0530     struct bfi_pbc_vport_s vport[BFI_PBC_MAX_VPORTS];
0531 };
0532 
0533 /*
0534  *----------------------------------------------------------------------
0535  *              MSGQ
0536  *----------------------------------------------------------------------
0537  */
0538 #define BFI_MSGQ_FULL(_q)   (((_q->pi + 1) % _q->q_depth) == _q->ci)
0539 #define BFI_MSGQ_EMPTY(_q)  (_q->pi == _q->ci)
0540 #define BFI_MSGQ_UPDATE_CI(_q)  (_q->ci = (_q->ci + 1) % _q->q_depth)
0541 #define BFI_MSGQ_UPDATE_PI(_q)  (_q->pi = (_q->pi + 1) % _q->q_depth)
0542 
0543 /* q_depth must be power of 2 */
0544 #define BFI_MSGQ_FREE_CNT(_q)   ((_q->ci - _q->pi - 1) & (_q->q_depth - 1))
0545 
0546 enum bfi_msgq_h2i_msgs_e {
0547     BFI_MSGQ_H2I_INIT_REQ   = 1,
0548     BFI_MSGQ_H2I_DOORBELL   = 2,
0549     BFI_MSGQ_H2I_SHUTDOWN   = 3,
0550 };
0551 
0552 enum bfi_msgq_i2h_msgs_e {
0553     BFI_MSGQ_I2H_INIT_RSP   = 1,
0554     BFI_MSGQ_I2H_DOORBELL   = 2,
0555 };
0556 
0557 
0558 /* Messages(commands/responsed/AENS will have the following header */
0559 struct bfi_msgq_mhdr_s {
0560     u8      msg_class;
0561     u8      msg_id;
0562     u16 msg_token;
0563     u16 num_entries;
0564     u8      enet_id;
0565     u8      rsvd[1];
0566 };
0567 
0568 #define bfi_msgq_mhdr_set(_mh, _mc, _mid, _tok, _enet_id) do {        \
0569     (_mh).msg_class     = (_mc);      \
0570     (_mh).msg_id        = (_mid);      \
0571     (_mh).msg_token     = (_tok);      \
0572     (_mh).enet_id       = (_enet_id);      \
0573 } while (0)
0574 
0575 /*
0576  * Mailbox  for messaging interface
0577  *
0578 */
0579 #define BFI_MSGQ_CMD_ENTRY_SIZE     (64)    /* TBD */
0580 #define BFI_MSGQ_RSP_ENTRY_SIZE     (64)    /* TBD */
0581 #define BFI_MSGQ_MSG_SIZE_MAX       (2048)  /* TBD */
0582 
0583 struct bfi_msgq_s {
0584     union bfi_addr_u addr;
0585     u16 q_depth;     /* Total num of entries in the queue */
0586     u8 rsvd[2];
0587 };
0588 
0589 /* BFI_ENET_MSGQ_CFG_REQ TBD init or cfg? */
0590 struct bfi_msgq_cfg_req_s {
0591     struct bfi_mhdr_s mh;
0592     struct bfi_msgq_s cmdq;
0593     struct bfi_msgq_s rspq;
0594 };
0595 
0596 /* BFI_ENET_MSGQ_CFG_RSP */
0597 struct bfi_msgq_cfg_rsp_s {
0598     struct bfi_mhdr_s mh;
0599     u8 cmd_status;
0600     u8 rsvd[3];
0601 };
0602 
0603 
0604 /* BFI_MSGQ_H2I_DOORBELL */
0605 struct bfi_msgq_h2i_db_s {
0606     struct bfi_mhdr_s mh;
0607     u16 cmdq_pi;
0608     u16 rspq_ci;
0609 };
0610 
0611 /* BFI_MSGQ_I2H_DOORBELL */
0612 struct bfi_msgq_i2h_db_s {
0613     struct bfi_mhdr_s mh;
0614     u16 rspq_pi;
0615     u16 cmdq_ci;
0616 };
0617 
0618 #pragma pack()
0619 
0620 /* BFI port specific */
0621 #pragma pack(1)
0622 
0623 enum bfi_port_h2i {
0624     BFI_PORT_H2I_ENABLE_REQ         = (1),
0625     BFI_PORT_H2I_DISABLE_REQ        = (2),
0626     BFI_PORT_H2I_GET_STATS_REQ      = (3),
0627     BFI_PORT_H2I_CLEAR_STATS_REQ    = (4),
0628 };
0629 
0630 enum bfi_port_i2h {
0631     BFI_PORT_I2H_ENABLE_RSP         = BFA_I2HM(1),
0632     BFI_PORT_I2H_DISABLE_RSP        = BFA_I2HM(2),
0633     BFI_PORT_I2H_GET_STATS_RSP      = BFA_I2HM(3),
0634     BFI_PORT_I2H_CLEAR_STATS_RSP    = BFA_I2HM(4),
0635 };
0636 
0637 /*
0638  * Generic REQ type
0639  */
0640 struct bfi_port_generic_req_s {
0641     struct bfi_mhdr_s  mh;          /*  msg header      */
0642     u32     msgtag;         /*  msgtag for reply                */
0643     u32     rsvd;
0644 };
0645 
0646 /*
0647  * Generic RSP type
0648  */
0649 struct bfi_port_generic_rsp_s {
0650     struct bfi_mhdr_s  mh;          /*  common msg header               */
0651     u8              status;         /*  port enable status              */
0652     u8              rsvd[3];
0653     u32     msgtag;         /*  msgtag for reply                */
0654 };
0655 
0656 /*
0657  * BFI_PORT_H2I_GET_STATS_REQ
0658  */
0659 struct bfi_port_get_stats_req_s {
0660     struct bfi_mhdr_s  mh;          /*  common msg header               */
0661     union bfi_addr_u   dma_addr;
0662 };
0663 
0664 union bfi_port_h2i_msg_u {
0665     struct bfi_mhdr_s               mh;
0666     struct bfi_port_generic_req_s   enable_req;
0667     struct bfi_port_generic_req_s   disable_req;
0668     struct bfi_port_get_stats_req_s getstats_req;
0669     struct bfi_port_generic_req_s   clearstats_req;
0670 };
0671 
0672 union bfi_port_i2h_msg_u {
0673     struct bfi_mhdr_s               mh;
0674     struct bfi_port_generic_rsp_s   enable_rsp;
0675     struct bfi_port_generic_rsp_s   disable_rsp;
0676     struct bfi_port_generic_rsp_s   getstats_rsp;
0677     struct bfi_port_generic_rsp_s   clearstats_rsp;
0678 };
0679 
0680 /*
0681  *----------------------------------------------------------------------
0682  *              ABLK
0683  *----------------------------------------------------------------------
0684  */
0685 enum bfi_ablk_h2i_msgs_e {
0686     BFI_ABLK_H2I_QUERY      = 1,
0687     BFI_ABLK_H2I_ADPT_CONFIG    = 2,
0688     BFI_ABLK_H2I_PORT_CONFIG    = 3,
0689     BFI_ABLK_H2I_PF_CREATE      = 4,
0690     BFI_ABLK_H2I_PF_DELETE      = 5,
0691     BFI_ABLK_H2I_PF_UPDATE      = 6,
0692     BFI_ABLK_H2I_OPTROM_ENABLE  = 7,
0693     BFI_ABLK_H2I_OPTROM_DISABLE = 8,
0694 };
0695 
0696 enum bfi_ablk_i2h_msgs_e {
0697     BFI_ABLK_I2H_QUERY      = BFA_I2HM(BFI_ABLK_H2I_QUERY),
0698     BFI_ABLK_I2H_ADPT_CONFIG    = BFA_I2HM(BFI_ABLK_H2I_ADPT_CONFIG),
0699     BFI_ABLK_I2H_PORT_CONFIG    = BFA_I2HM(BFI_ABLK_H2I_PORT_CONFIG),
0700     BFI_ABLK_I2H_PF_CREATE      = BFA_I2HM(BFI_ABLK_H2I_PF_CREATE),
0701     BFI_ABLK_I2H_PF_DELETE      = BFA_I2HM(BFI_ABLK_H2I_PF_DELETE),
0702     BFI_ABLK_I2H_PF_UPDATE      = BFA_I2HM(BFI_ABLK_H2I_PF_UPDATE),
0703     BFI_ABLK_I2H_OPTROM_ENABLE  = BFA_I2HM(BFI_ABLK_H2I_OPTROM_ENABLE),
0704     BFI_ABLK_I2H_OPTROM_DISABLE = BFA_I2HM(BFI_ABLK_H2I_OPTROM_DISABLE),
0705 };
0706 
0707 /* BFI_ABLK_H2I_QUERY */
0708 struct bfi_ablk_h2i_query_s {
0709     struct bfi_mhdr_s   mh;
0710     union bfi_addr_u    addr;
0711 };
0712 
0713 /* BFI_ABL_H2I_ADPT_CONFIG, BFI_ABLK_H2I_PORT_CONFIG */
0714 struct bfi_ablk_h2i_cfg_req_s {
0715     struct bfi_mhdr_s   mh;
0716     u8          mode;
0717     u8          port;
0718     u8          max_pf;
0719     u8          max_vf;
0720 };
0721 
0722 /*
0723  * BFI_ABLK_H2I_PF_CREATE, BFI_ABLK_H2I_PF_DELETE,
0724  */
0725 struct bfi_ablk_h2i_pf_req_s {
0726     struct bfi_mhdr_s   mh;
0727     u8          pcifn;
0728     u8          port;
0729     u16         pers;
0730     u16         bw_min; /* percent BW @ max speed */
0731     u16         bw_max; /* percent BW @ max speed */
0732 };
0733 
0734 /* BFI_ABLK_H2I_OPTROM_ENABLE, BFI_ABLK_H2I_OPTROM_DISABLE */
0735 struct bfi_ablk_h2i_optrom_s {
0736     struct bfi_mhdr_s   mh;
0737 };
0738 
0739 /*
0740  * BFI_ABLK_I2H_QUERY
0741  * BFI_ABLK_I2H_PORT_CONFIG
0742  * BFI_ABLK_I2H_PF_CREATE
0743  * BFI_ABLK_I2H_PF_DELETE
0744  * BFI_ABLK_I2H_PF_UPDATE
0745  * BFI_ABLK_I2H_OPTROM_ENABLE
0746  * BFI_ABLK_I2H_OPTROM_DISABLE
0747  */
0748 struct bfi_ablk_i2h_rsp_s {
0749     struct bfi_mhdr_s   mh;
0750     u8          status;
0751     u8          pcifn;
0752     u8          port_mode;
0753 };
0754 
0755 
0756 /*
0757  *  CEE module specific messages
0758  */
0759 
0760 /* Mailbox commands from host to firmware */
0761 enum bfi_cee_h2i_msgs_e {
0762     BFI_CEE_H2I_GET_CFG_REQ = 1,
0763     BFI_CEE_H2I_RESET_STATS = 2,
0764     BFI_CEE_H2I_GET_STATS_REQ = 3,
0765 };
0766 
0767 enum bfi_cee_i2h_msgs_e {
0768     BFI_CEE_I2H_GET_CFG_RSP = BFA_I2HM(1),
0769     BFI_CEE_I2H_RESET_STATS_RSP = BFA_I2HM(2),
0770     BFI_CEE_I2H_GET_STATS_RSP = BFA_I2HM(3),
0771 };
0772 
0773 /*
0774  * H2I command structure for resetting the stats
0775  */
0776 struct bfi_cee_reset_stats_s {
0777     struct bfi_mhdr_s  mh;
0778 };
0779 
0780 /*
0781  * Get configuration  command from host
0782  */
0783 struct bfi_cee_get_req_s {
0784     struct bfi_mhdr_s   mh;
0785     union bfi_addr_u    dma_addr;
0786 };
0787 
0788 /*
0789  * Reply message from firmware
0790  */
0791 struct bfi_cee_get_rsp_s {
0792     struct bfi_mhdr_s   mh;
0793     u8          cmd_status;
0794     u8          rsvd[3];
0795 };
0796 
0797 /*
0798  * Reply message from firmware
0799  */
0800 struct bfi_cee_stats_rsp_s {
0801     struct bfi_mhdr_s   mh;
0802     u8          cmd_status;
0803     u8          rsvd[3];
0804 };
0805 
0806 /* Mailbox message structures from firmware to host */
0807 union bfi_cee_i2h_msg_u {
0808     struct bfi_mhdr_s       mh;
0809     struct bfi_cee_get_rsp_s    get_rsp;
0810     struct bfi_cee_stats_rsp_s  stats_rsp;
0811 };
0812 
0813 /*
0814  * SFP related
0815  */
0816 
0817 enum bfi_sfp_h2i_e {
0818     BFI_SFP_H2I_SHOW    = 1,
0819     BFI_SFP_H2I_SCN     = 2,
0820 };
0821 
0822 enum bfi_sfp_i2h_e {
0823     BFI_SFP_I2H_SHOW = BFA_I2HM(BFI_SFP_H2I_SHOW),
0824     BFI_SFP_I2H_SCN  = BFA_I2HM(BFI_SFP_H2I_SCN),
0825 };
0826 
0827 /*
0828  *  SFP state change notification
0829  */
0830 struct bfi_sfp_scn_s {
0831     struct bfi_mhdr_s mhr;  /* host msg header        */
0832     u8  event;
0833     u8  sfpid;
0834     u8  pomlvl; /* pom level: normal/warning/alarm */
0835     u8  is_elb; /* e-loopback */
0836 };
0837 
0838 /*
0839  *  SFP state
0840  */
0841 enum bfa_sfp_stat_e {
0842     BFA_SFP_STATE_INIT  = 0,    /* SFP state is uninit  */
0843     BFA_SFP_STATE_REMOVED   = 1,    /* SFP is removed   */
0844     BFA_SFP_STATE_INSERTED  = 2,    /* SFP is inserted  */
0845     BFA_SFP_STATE_VALID = 3,    /* SFP is valid     */
0846     BFA_SFP_STATE_UNSUPPORT = 4,    /* SFP is unsupport */
0847     BFA_SFP_STATE_FAILED    = 5,    /* SFP i2c read fail    */
0848 };
0849 
0850 /*
0851  *  SFP memory access type
0852  */
0853 enum bfi_sfp_mem_e {
0854     BFI_SFP_MEM_ALL     = 0x1,  /* access all data field */
0855     BFI_SFP_MEM_DIAGEXT = 0x2,  /* access diag ext data field only */
0856 };
0857 
0858 struct bfi_sfp_req_s {
0859     struct bfi_mhdr_s   mh;
0860     u8          memtype;
0861     u8          rsvd[3];
0862     struct bfi_alen_s   alen;
0863 };
0864 
0865 struct bfi_sfp_rsp_s {
0866     struct bfi_mhdr_s   mh;
0867     u8          status;
0868     u8          state;
0869     u8          rsvd[2];
0870 };
0871 
0872 /*
0873  *  FLASH module specific
0874  */
0875 enum bfi_flash_h2i_msgs {
0876     BFI_FLASH_H2I_QUERY_REQ = 1,
0877     BFI_FLASH_H2I_ERASE_REQ = 2,
0878     BFI_FLASH_H2I_WRITE_REQ = 3,
0879     BFI_FLASH_H2I_READ_REQ = 4,
0880     BFI_FLASH_H2I_BOOT_VER_REQ = 5,
0881 };
0882 
0883 enum bfi_flash_i2h_msgs {
0884     BFI_FLASH_I2H_QUERY_RSP = BFA_I2HM(1),
0885     BFI_FLASH_I2H_ERASE_RSP = BFA_I2HM(2),
0886     BFI_FLASH_I2H_WRITE_RSP = BFA_I2HM(3),
0887     BFI_FLASH_I2H_READ_RSP = BFA_I2HM(4),
0888     BFI_FLASH_I2H_BOOT_VER_RSP = BFA_I2HM(5),
0889     BFI_FLASH_I2H_EVENT = BFA_I2HM(127),
0890 };
0891 
0892 /*
0893  * Flash query request
0894  */
0895 struct bfi_flash_query_req_s {
0896     struct bfi_mhdr_s mh;   /* Common msg header */
0897     struct bfi_alen_s alen;
0898 };
0899 
0900 /*
0901  * Flash erase request
0902  */
0903 struct bfi_flash_erase_req_s {
0904     struct bfi_mhdr_s   mh; /* Common msg header */
0905     u32 type;   /* partition type */
0906     u8  instance; /* partition instance */
0907     u8  rsv[3];
0908 };
0909 
0910 /*
0911  * Flash write request
0912  */
0913 struct bfi_flash_write_req_s {
0914     struct bfi_mhdr_s mh;   /* Common msg header */
0915     struct bfi_alen_s alen;
0916     u32 type;   /* partition type */
0917     u8  instance; /* partition instance */
0918     u8  last;
0919     u8  rsv[2];
0920     u32 offset;
0921     u32 length;
0922 };
0923 
0924 /*
0925  * Flash read request
0926  */
0927 struct bfi_flash_read_req_s {
0928     struct bfi_mhdr_s mh;   /* Common msg header */
0929     u32 type;       /* partition type */
0930     u8  instance;   /* partition instance */
0931     u8  rsv[3];
0932     u32 offset;
0933     u32 length;
0934     struct bfi_alen_s alen;
0935 };
0936 
0937 /*
0938  * Flash query response
0939  */
0940 struct bfi_flash_query_rsp_s {
0941     struct bfi_mhdr_s mh;   /* Common msg header */
0942     u32 status;
0943 };
0944 
0945 /*
0946  * Flash read response
0947  */
0948 struct bfi_flash_read_rsp_s {
0949     struct bfi_mhdr_s mh;   /* Common msg header */
0950     u32 type;       /* partition type */
0951     u8  instance;   /* partition instance */
0952     u8  rsv[3];
0953     u32 status;
0954     u32 length;
0955 };
0956 
0957 /*
0958  * Flash write response
0959  */
0960 struct bfi_flash_write_rsp_s {
0961     struct bfi_mhdr_s mh;   /* Common msg header */
0962     u32 type;       /* partition type */
0963     u8  instance;   /* partition instance */
0964     u8  rsv[3];
0965     u32 status;
0966     u32 length;
0967 };
0968 
0969 /*
0970  * Flash erase response
0971  */
0972 struct bfi_flash_erase_rsp_s {
0973     struct bfi_mhdr_s mh;   /* Common msg header */
0974     u32 type;       /* partition type */
0975     u8  instance;   /* partition instance */
0976     u8  rsv[3];
0977     u32 status;
0978 };
0979 
0980 /*
0981  * Flash event notification
0982  */
0983 struct bfi_flash_event_s {
0984     struct bfi_mhdr_s   mh; /* Common msg header */
0985     bfa_status_t        status;
0986     u32         param;
0987 };
0988 
0989 /*
0990  *----------------------------------------------------------------------
0991  *              DIAG
0992  *----------------------------------------------------------------------
0993  */
0994 enum bfi_diag_h2i {
0995     BFI_DIAG_H2I_PORTBEACON = 1,
0996     BFI_DIAG_H2I_LOOPBACK = 2,
0997     BFI_DIAG_H2I_FWPING = 3,
0998     BFI_DIAG_H2I_TEMPSENSOR = 4,
0999     BFI_DIAG_H2I_LEDTEST = 5,
1000     BFI_DIAG_H2I_QTEST      = 6,
1001     BFI_DIAG_H2I_DPORT  = 7,
1002 };
1003 
1004 enum bfi_diag_i2h {
1005     BFI_DIAG_I2H_PORTBEACON = BFA_I2HM(BFI_DIAG_H2I_PORTBEACON),
1006     BFI_DIAG_I2H_LOOPBACK = BFA_I2HM(BFI_DIAG_H2I_LOOPBACK),
1007     BFI_DIAG_I2H_FWPING = BFA_I2HM(BFI_DIAG_H2I_FWPING),
1008     BFI_DIAG_I2H_TEMPSENSOR = BFA_I2HM(BFI_DIAG_H2I_TEMPSENSOR),
1009     BFI_DIAG_I2H_LEDTEST = BFA_I2HM(BFI_DIAG_H2I_LEDTEST),
1010     BFI_DIAG_I2H_QTEST      = BFA_I2HM(BFI_DIAG_H2I_QTEST),
1011     BFI_DIAG_I2H_DPORT  = BFA_I2HM(BFI_DIAG_H2I_DPORT),
1012     BFI_DIAG_I2H_DPORT_SCN  = BFA_I2HM(8),
1013 };
1014 
1015 #define BFI_DIAG_MAX_SGES   2
1016 #define BFI_DIAG_DMA_BUF_SZ (2 * 1024)
1017 #define BFI_BOOT_MEMTEST_RES_ADDR 0x900
1018 #define BFI_BOOT_MEMTEST_RES_SIG  0xA0A1A2A3
1019 
1020 struct bfi_diag_lb_req_s {
1021     struct bfi_mhdr_s mh;
1022     u32 loopcnt;
1023     u32 pattern;
1024     u8  lb_mode;        /*!< bfa_port_opmode_t */
1025     u8  speed;          /*!< bfa_port_speed_t */
1026     u8  rsvd[2];
1027 };
1028 
1029 struct bfi_diag_lb_rsp_s {
1030     struct bfi_mhdr_s  mh;          /* 4 bytes */
1031     struct bfa_diag_loopback_result_s res; /* 16 bytes */
1032 };
1033 
1034 struct bfi_diag_fwping_req_s {
1035     struct bfi_mhdr_s mh;   /* 4 bytes */
1036     struct bfi_alen_s alen; /* 12 bytes */
1037     u32 data;           /* user input data pattern */
1038     u32 count;          /* user input dma count */
1039     u8  qtag;           /* track CPE vc */
1040     u8  rsv[3];
1041 };
1042 
1043 struct bfi_diag_fwping_rsp_s {
1044     struct bfi_mhdr_s  mh;          /* 4 bytes */
1045     u32 data;           /* user input data pattern    */
1046     u8  qtag;           /* track CPE vc               */
1047     u8  dma_status;     /* dma status                 */
1048     u8  rsv[2];
1049 };
1050 
1051 /*
1052  * Temperature Sensor
1053  */
1054 struct bfi_diag_ts_req_s {
1055     struct bfi_mhdr_s mh;   /* 4 bytes */
1056     u16 temp;           /* 10-bit A/D value */
1057     u16 brd_temp;       /* 9-bit board temp */
1058     u8  status;
1059     u8  ts_junc;        /* show junction tempsensor   */
1060     u8  ts_brd;         /* show board tempsensor      */
1061     u8  rsv;
1062 };
1063 #define bfi_diag_ts_rsp_t struct bfi_diag_ts_req_s
1064 
1065 struct bfi_diag_ledtest_req_s {
1066     struct bfi_mhdr_s  mh;  /* 4 bytes */
1067     u8  cmd;
1068     u8  color;
1069     u8  portid;
1070     u8  led;    /* bitmap of LEDs to be tested */
1071     u16 freq;   /* no. of blinks every 10 secs */
1072     u8  rsv[2];
1073 };
1074 
1075 /* notify host led operation is done */
1076 struct bfi_diag_ledtest_rsp_s {
1077     struct bfi_mhdr_s  mh;  /* 4 bytes */
1078 };
1079 
1080 struct bfi_diag_portbeacon_req_s {
1081     struct bfi_mhdr_s  mh;  /* 4 bytes */
1082     u32 period; /* beaconing period */
1083     u8  beacon; /* 1: beacon on */
1084     u8  rsvd[3];
1085 };
1086 
1087 /* notify host the beacon is off */
1088 struct bfi_diag_portbeacon_rsp_s {
1089     struct bfi_mhdr_s  mh;  /* 4 bytes */
1090 };
1091 
1092 struct bfi_diag_qtest_req_s {
1093     struct bfi_mhdr_s   mh;             /* 4 bytes */
1094     u32 data[BFI_LMSG_PL_WSZ]; /* fill up tcm prefetch area */
1095 };
1096 #define bfi_diag_qtest_rsp_t struct bfi_diag_qtest_req_s
1097 
1098 /*
1099  *  D-port test
1100  */
1101 enum bfi_dport_req {
1102     BFI_DPORT_DISABLE   = 0,    /* disable dport request    */
1103     BFI_DPORT_ENABLE    = 1,    /* enable dport request     */
1104     BFI_DPORT_START     = 2,    /* start dport request  */
1105     BFI_DPORT_SHOW      = 3,    /* show dport request   */
1106     BFI_DPORT_DYN_DISABLE   = 4,    /* disable dynamic dport request */
1107 };
1108 
1109 enum bfi_dport_scn {
1110     BFI_DPORT_SCN_TESTSTART     = 1,
1111     BFI_DPORT_SCN_TESTCOMP      = 2,
1112     BFI_DPORT_SCN_SFP_REMOVED   = 3,
1113     BFI_DPORT_SCN_DDPORT_ENABLE = 4,
1114     BFI_DPORT_SCN_DDPORT_DISABLE    = 5,
1115     BFI_DPORT_SCN_FCPORT_DISABLE    = 6,
1116     BFI_DPORT_SCN_SUBTESTSTART  = 7,
1117     BFI_DPORT_SCN_TESTSKIP      = 8,
1118     BFI_DPORT_SCN_DDPORT_DISABLED   = 9,
1119 };
1120 
1121 struct bfi_diag_dport_req_s {
1122     struct bfi_mhdr_s   mh; /* 4 bytes                      */
1123     u8          req;    /* request 1: enable 0: disable */
1124     u8          rsvd[3];
1125     u32         lpcnt;
1126     u32         payload;
1127 };
1128 
1129 struct bfi_diag_dport_rsp_s {
1130     struct bfi_mhdr_s   mh; /* header 4 bytes       */
1131     bfa_status_t        status; /* reply status         */
1132     wwn_t           pwwn;   /* switch port wwn. 8 bytes */
1133     wwn_t           nwwn;   /* switch node wwn. 8 bytes */
1134 };
1135 
1136 struct bfi_diag_dport_scn_teststart_s {
1137     wwn_t   pwwn;   /* switch port wwn. 8 bytes */
1138     wwn_t   nwwn;   /* switch node wwn. 8 bytes */
1139     u8  type;   /* bfa_diag_dport_test_type_e */
1140     u8  mode;   /* bfa_diag_dport_test_opmode */
1141     u8  rsvd[2];
1142     u32 numfrm; /* from switch uint in 1M */
1143 };
1144 
1145 struct bfi_diag_dport_scn_testcomp_s {
1146     u8  status; /* bfa_diag_dport_test_status_e */
1147     u8  speed;  /* bfa_port_speed_t  */
1148     u16 numbuffer; /* from switch  */
1149     u8  subtest_status[DPORT_TEST_MAX];  /* 4 bytes */
1150     u32 latency;   /* from switch  */
1151     u32 distance;  /* from swtich unit in meters  */
1152             /* Buffers required to saturate the link */
1153     u16 frm_sz; /* from switch for buf_reqd */
1154     u8  rsvd[2];
1155 };
1156 
1157 struct bfi_diag_dport_scn_s {       /* max size == RDS_RMESZ    */
1158     struct bfi_mhdr_s   mh; /* header 4 bytes       */
1159     u8          state;  /* new state            */
1160     u8          rsvd[3];
1161     union {
1162         struct bfi_diag_dport_scn_teststart_s teststart;
1163         struct bfi_diag_dport_scn_testcomp_s testcomp;
1164     } info;
1165 };
1166 
1167 union bfi_diag_dport_msg_u {
1168     struct bfi_diag_dport_req_s req;
1169     struct bfi_diag_dport_rsp_s rsp;
1170     struct bfi_diag_dport_scn_s scn;
1171 };
1172 
1173 /*
1174  *  PHY module specific
1175  */
1176 enum bfi_phy_h2i_msgs_e {
1177     BFI_PHY_H2I_QUERY_REQ = 1,
1178     BFI_PHY_H2I_STATS_REQ = 2,
1179     BFI_PHY_H2I_WRITE_REQ = 3,
1180     BFI_PHY_H2I_READ_REQ = 4,
1181 };
1182 
1183 enum bfi_phy_i2h_msgs_e {
1184     BFI_PHY_I2H_QUERY_RSP = BFA_I2HM(1),
1185     BFI_PHY_I2H_STATS_RSP = BFA_I2HM(2),
1186     BFI_PHY_I2H_WRITE_RSP = BFA_I2HM(3),
1187     BFI_PHY_I2H_READ_RSP = BFA_I2HM(4),
1188 };
1189 
1190 /*
1191  * External PHY query request
1192  */
1193 struct bfi_phy_query_req_s {
1194     struct bfi_mhdr_s   mh;             /* Common msg header */
1195     u8          instance;
1196     u8          rsv[3];
1197     struct bfi_alen_s   alen;
1198 };
1199 
1200 /*
1201  * External PHY stats request
1202  */
1203 struct bfi_phy_stats_req_s {
1204     struct bfi_mhdr_s   mh;             /* Common msg header */
1205     u8          instance;
1206     u8          rsv[3];
1207     struct bfi_alen_s   alen;
1208 };
1209 
1210 /*
1211  * External PHY write request
1212  */
1213 struct bfi_phy_write_req_s {
1214     struct bfi_mhdr_s   mh;             /* Common msg header */
1215     u8      instance;
1216     u8      last;
1217     u8      rsv[2];
1218     u32     offset;
1219     u32     length;
1220     struct bfi_alen_s   alen;
1221 };
1222 
1223 /*
1224  * External PHY read request
1225  */
1226 struct bfi_phy_read_req_s {
1227     struct bfi_mhdr_s   mh; /* Common msg header */
1228     u8      instance;
1229     u8      rsv[3];
1230     u32     offset;
1231     u32     length;
1232     struct bfi_alen_s   alen;
1233 };
1234 
1235 /*
1236  * External PHY query response
1237  */
1238 struct bfi_phy_query_rsp_s {
1239     struct bfi_mhdr_s   mh; /* Common msg header */
1240     u32         status;
1241 };
1242 
1243 /*
1244  * External PHY stats response
1245  */
1246 struct bfi_phy_stats_rsp_s {
1247     struct bfi_mhdr_s   mh; /* Common msg header */
1248     u32         status;
1249 };
1250 
1251 /*
1252  * External PHY read response
1253  */
1254 struct bfi_phy_read_rsp_s {
1255     struct bfi_mhdr_s   mh; /* Common msg header */
1256     u32         status;
1257     u32     length;
1258 };
1259 
1260 /*
1261  * External PHY write response
1262  */
1263 struct bfi_phy_write_rsp_s {
1264     struct bfi_mhdr_s   mh; /* Common msg header */
1265     u32         status;
1266     u32         length;
1267 };
1268 
1269 enum bfi_fru_h2i_msgs {
1270     BFI_FRUVPD_H2I_WRITE_REQ = 1,
1271     BFI_FRUVPD_H2I_READ_REQ = 2,
1272     BFI_TFRU_H2I_WRITE_REQ = 3,
1273     BFI_TFRU_H2I_READ_REQ = 4,
1274 };
1275 
1276 enum bfi_fru_i2h_msgs {
1277     BFI_FRUVPD_I2H_WRITE_RSP = BFA_I2HM(1),
1278     BFI_FRUVPD_I2H_READ_RSP = BFA_I2HM(2),
1279     BFI_TFRU_I2H_WRITE_RSP = BFA_I2HM(3),
1280     BFI_TFRU_I2H_READ_RSP = BFA_I2HM(4),
1281 };
1282 
1283 /*
1284  * FRU write request
1285  */
1286 struct bfi_fru_write_req_s {
1287     struct bfi_mhdr_s   mh; /* Common msg header */
1288     u8          last;
1289     u8          rsv_1[3];
1290     u8          trfr_cmpl;
1291     u8          rsv_2[3];
1292     u32         offset;
1293     u32         length;
1294     struct bfi_alen_s   alen;
1295 };
1296 
1297 /*
1298  * FRU read request
1299  */
1300 struct bfi_fru_read_req_s {
1301     struct bfi_mhdr_s   mh; /* Common msg header */
1302     u32         offset;
1303     u32         length;
1304     struct bfi_alen_s   alen;
1305 };
1306 
1307 /*
1308  * FRU response
1309  */
1310 struct bfi_fru_rsp_s {
1311     struct bfi_mhdr_s   mh; /* Common msg header */
1312     u32         status;
1313     u32         length;
1314 };
1315 #pragma pack()
1316 
1317 #endif /* __BFI_H__ */
[ Source navigation ] [ Diff markup ] [ Identifier search ] [ general search ]

This page was automatically generated by the 2.1.0 LXR engine.

The LXR team
Valid CSS 2.1! Valid HTML 4.01!