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0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
0004  * Copyright (c) 2014- QLogic Corporation.
0005  * All rights reserved
0006  * www.qlogic.com
0007  *
0008  * Linux driver for QLogic BR-series Fibre Channel Host Bus Adapter.
0009  */
0010 
0011 #ifndef __BFA_DEFS_H__
0012 #define __BFA_DEFS_H__
0013 
0014 #include "bfa_fc.h"
0015 #include "bfad_drv.h"
0016 
0017 #define BFA_MFG_SERIALNUM_SIZE                  11
0018 #define STRSZ(_n)                               (((_n) + 4) & ~3)
0019 
0020 /*
0021  * Manufacturing card type
0022  */
0023 enum {
0024     BFA_MFG_TYPE_CB_MAX  = 825,      /*  Crossbow card type max     */
0025     BFA_MFG_TYPE_FC8P2   = 825,      /*  8G 2port FC card           */
0026     BFA_MFG_TYPE_FC8P1   = 815,      /*  8G 1port FC card           */
0027     BFA_MFG_TYPE_FC4P2   = 425,      /*  4G 2port FC card           */
0028     BFA_MFG_TYPE_FC4P1   = 415,      /*  4G 1port FC card           */
0029     BFA_MFG_TYPE_CNA10P2 = 1020,     /*  10G 2port CNA card */
0030     BFA_MFG_TYPE_CNA10P1 = 1010,     /*  10G 1port CNA card */
0031     BFA_MFG_TYPE_JAYHAWK = 804,      /*  Jayhawk mezz card          */
0032     BFA_MFG_TYPE_WANCHESE = 1007,    /*  Wanchese mezz card */
0033     BFA_MFG_TYPE_ASTRA    = 807,     /*  Astra mezz card            */
0034     BFA_MFG_TYPE_LIGHTNING_P0 = 902, /*  Lightning mezz card - old  */
0035     BFA_MFG_TYPE_LIGHTNING = 1741,   /*  Lightning mezz card        */
0036     BFA_MFG_TYPE_PROWLER_F = 1560,   /*  Prowler FC only cards  */
0037     BFA_MFG_TYPE_PROWLER_N = 1410,   /*  Prowler NIC only cards */
0038     BFA_MFG_TYPE_PROWLER_C = 1710,   /*  Prowler CNA only cards */
0039     BFA_MFG_TYPE_PROWLER_D = 1860,   /*  Prowler Dual cards     */
0040     BFA_MFG_TYPE_CHINOOK   = 1867,   /*  Chinook cards      */
0041     BFA_MFG_TYPE_CHINOOK2   = 1869,  /*!< Chinook2 cards        */
0042     BFA_MFG_TYPE_INVALID = 0,        /*  Invalid card type      */
0043 };
0044 
0045 #pragma pack(1)
0046 
0047 /*
0048  * Check if Mezz card
0049  */
0050 #define bfa_mfg_is_mezz(type) (( \
0051     (type) == BFA_MFG_TYPE_JAYHAWK || \
0052     (type) == BFA_MFG_TYPE_WANCHESE || \
0053     (type) == BFA_MFG_TYPE_ASTRA || \
0054     (type) == BFA_MFG_TYPE_LIGHTNING_P0 || \
0055     (type) == BFA_MFG_TYPE_LIGHTNING || \
0056     (type) == BFA_MFG_TYPE_CHINOOK || \
0057     (type) == BFA_MFG_TYPE_CHINOOK2))
0058 
0059 /*
0060  * Check if the card having old wwn/mac handling
0061  */
0062 #define bfa_mfg_is_old_wwn_mac_model(type) (( \
0063     (type) == BFA_MFG_TYPE_FC8P2 || \
0064     (type) == BFA_MFG_TYPE_FC8P1 || \
0065     (type) == BFA_MFG_TYPE_FC4P2 || \
0066     (type) == BFA_MFG_TYPE_FC4P1 || \
0067     (type) == BFA_MFG_TYPE_CNA10P2 || \
0068     (type) == BFA_MFG_TYPE_CNA10P1 || \
0069     (type) == BFA_MFG_TYPE_JAYHAWK || \
0070     (type) == BFA_MFG_TYPE_WANCHESE))
0071 
0072 #define bfa_mfg_increment_wwn_mac(m, i)                         \
0073 do {                                                            \
0074     u32 t = ((u32)(m)[0] << 16) | ((u32)(m)[1] << 8) | \
0075         (u32)(m)[2];  \
0076     t += (i);      \
0077     (m)[0] = (t >> 16) & 0xFF;                              \
0078     (m)[1] = (t >> 8) & 0xFF;                               \
0079     (m)[2] = t & 0xFF;                                      \
0080 } while (0)
0081 
0082 /*
0083  * VPD data length
0084  */
0085 #define BFA_MFG_VPD_LEN                 512
0086 
0087 /*
0088  * VPD vendor tag
0089  */
0090 enum {
0091     BFA_MFG_VPD_UNKNOWN     = 0,     /*  vendor unknown             */
0092     BFA_MFG_VPD_IBM         = 1,     /*  vendor IBM                 */
0093     BFA_MFG_VPD_HP          = 2,     /*  vendor HP                  */
0094     BFA_MFG_VPD_DELL        = 3,     /*  vendor DELL                */
0095     BFA_MFG_VPD_PCI_IBM     = 0x08,  /*  PCI VPD IBM                */
0096     BFA_MFG_VPD_PCI_HP      = 0x10,  /*  PCI VPD HP         */
0097     BFA_MFG_VPD_PCI_DELL    = 0x20,  /*  PCI VPD DELL               */
0098     BFA_MFG_VPD_PCI_BRCD    = 0xf8,  /*  PCI VPD Brocade            */
0099 };
0100 
0101 /*
0102  * All numerical fields are in big-endian format.
0103  */
0104 struct bfa_mfg_vpd_s {
0105     u8              version;        /*  vpd data version */
0106     u8              vpd_sig[3];     /*  characters 'V', 'P', 'D' */
0107     u8              chksum;         /*  u8 checksum */
0108     u8              vendor;         /*  vendor */
0109     u8      len;            /*  vpd data length excluding header */
0110     u8      rsv;
0111     u8              data[BFA_MFG_VPD_LEN];  /*  vpd data */
0112 };
0113 
0114 #pragma pack()
0115 
0116 /*
0117  * Status return values
0118  */
0119 enum bfa_status {
0120     BFA_STATUS_OK       = 0,    /*  Success */
0121     BFA_STATUS_FAILED   = 1,    /*  Operation failed */
0122     BFA_STATUS_EINVAL   = 2,    /*  Invalid params Check input
0123                      *  parameters */
0124     BFA_STATUS_ENOMEM   = 3,    /*  Out of resources */
0125     BFA_STATUS_ETIMER   = 5,    /*  Timer expired - Retry, if persists,
0126                      *  contact support */
0127     BFA_STATUS_EPROTOCOL    = 6,    /*  Protocol error */
0128     BFA_STATUS_BADFLASH = 9,    /*  Flash is bad */
0129     BFA_STATUS_SFP_UNSUPP   = 10,   /*  Unsupported SFP - Replace SFP */
0130     BFA_STATUS_UNKNOWN_VFID = 11,   /*  VF_ID not found */
0131     BFA_STATUS_DATACORRUPTED = 12,  /*  Diag returned data corrupted */
0132     BFA_STATUS_DEVBUSY  = 13,   /*  Device busy - Retry operation */
0133     BFA_STATUS_HDMA_FAILED  = 16,   /* Host dma failed contact support */
0134     BFA_STATUS_FLASH_BAD_LEN = 17,  /*  Flash bad length */
0135     BFA_STATUS_UNKNOWN_LWWN = 18,   /*  LPORT PWWN not found */
0136     BFA_STATUS_UNKNOWN_RWWN = 19,   /*  RPORT PWWN not found */
0137     BFA_STATUS_VPORT_EXISTS = 21,   /*  VPORT already exists */
0138     BFA_STATUS_VPORT_MAX    = 22,   /*  Reached max VPORT supported limit */
0139     BFA_STATUS_UNSUPP_SPEED = 23,   /*  Invalid Speed Check speed setting */
0140     BFA_STATUS_INVLD_DFSZ   = 24,   /*  Invalid Max data field size */
0141     BFA_STATUS_CMD_NOTSUPP  = 26,   /*  Command/API not supported */
0142     BFA_STATUS_FABRIC_RJT   = 29,   /*  Reject from attached fabric */
0143     BFA_STATUS_UNKNOWN_VWWN = 30,   /*  VPORT PWWN not found */
0144     BFA_STATUS_PORT_OFFLINE = 34,   /*  Port is not online */
0145     BFA_STATUS_VPORT_WWN_BP = 46,   /*  WWN is same as base port's WWN */
0146     BFA_STATUS_PORT_NOT_DISABLED = 47, /* Port not disabled disable port */
0147     BFA_STATUS_NO_FCPIM_NEXUS = 52, /* No FCP Nexus exists with the rport */
0148     BFA_STATUS_IOC_FAILURE  = 56,   /* IOC failure - Retry, if persists
0149                      * contact support */
0150     BFA_STATUS_INVALID_WWN  = 57,   /*  Invalid WWN */
0151     BFA_STATUS_ADAPTER_ENABLED = 60, /* Adapter is not disabled */
0152     BFA_STATUS_IOC_NON_OP   = 61,   /* IOC is not operational */
0153     BFA_STATUS_VERSION_FAIL = 70, /* Application/Driver version mismatch */
0154     BFA_STATUS_DIAG_BUSY    = 71,   /*  diag busy */
0155     BFA_STATUS_BEACON_ON    = 72,   /* Port Beacon already on */
0156     BFA_STATUS_ENOFSAVE = 78,   /*  No saved firmware trace */
0157     BFA_STATUS_IOC_DISABLED = 82,   /* IOC is already disabled */
0158     BFA_STATUS_ERROR_TRL_ENABLED  = 87,   /* TRL is enabled */
0159     BFA_STATUS_ERROR_QOS_ENABLED  = 88,   /* QoS is enabled */
0160     BFA_STATUS_NO_SFP_DEV = 89, /* No SFP device check or replace SFP */
0161     BFA_STATUS_MEMTEST_FAILED = 90, /* Memory test failed contact support */
0162     BFA_STATUS_LEDTEST_OP = 109, /* LED test is operating */
0163     BFA_STATUS_INVALID_MAC  = 134, /*  Invalid MAC address */
0164     BFA_STATUS_CMD_NOTSUPP_CNA = 146, /* Command not supported for CNA */
0165     BFA_STATUS_PBC      = 154, /*  Operation not allowed for pre-boot
0166                     *  configuration */
0167     BFA_STATUS_BAD_FWCFG = 156, /* Bad firmware configuration */
0168     BFA_STATUS_INVALID_VENDOR = 158, /* Invalid switch vendor */
0169     BFA_STATUS_SFP_NOT_READY = 159, /* SFP info is not ready. Retry */
0170     BFA_STATUS_TRUNK_ENABLED = 164, /* Trunk is already enabled on
0171                      * this adapter */
0172     BFA_STATUS_TRUNK_DISABLED  = 165, /* Trunking is disabled on
0173                        * the adapter */
0174     BFA_STATUS_IOPROFILE_OFF = 175, /* IO profile OFF */
0175     BFA_STATUS_PHY_NOT_PRESENT = 183, /* PHY module not present */
0176     BFA_STATUS_FEATURE_NOT_SUPPORTED = 192, /* Feature not supported */
0177     BFA_STATUS_ENTRY_EXISTS = 193,  /* Entry already exists */
0178     BFA_STATUS_ENTRY_NOT_EXISTS = 194, /* Entry does not exist */
0179     BFA_STATUS_NO_CHANGE = 195, /* Feature already in that state */
0180     BFA_STATUS_FAA_ENABLED = 197,   /* FAA is already enabled */
0181     BFA_STATUS_FAA_DISABLED = 198,  /* FAA is already disabled */
0182     BFA_STATUS_FAA_ACQUIRED = 199,  /* FAA is already acquired */
0183     BFA_STATUS_FAA_ACQ_ADDR = 200,  /* Acquiring addr */
0184     BFA_STATUS_BBCR_FC_ONLY = 201, /*!< BBCredit Recovery is supported for *
0185                     * FC mode only */
0186     BFA_STATUS_ERROR_TRUNK_ENABLED = 203,   /* Trunk enabled on adapter */
0187     BFA_STATUS_MAX_ENTRY_REACHED = 212, /* MAX entry reached */
0188     BFA_STATUS_TOPOLOGY_LOOP = 230, /* Topology is set to Loop */
0189     BFA_STATUS_LOOP_UNSUPP_MEZZ = 231, /* Loop topology is not supported
0190                         * on mezz cards */
0191     BFA_STATUS_INVALID_BW = 233,    /* Invalid bandwidth value */
0192     BFA_STATUS_QOS_BW_INVALID = 234,   /* Invalid QOS bandwidth
0193                         * configuration */
0194     BFA_STATUS_DPORT_ENABLED = 235, /* D-port mode is already enabled */
0195     BFA_STATUS_DPORT_DISABLED = 236, /* D-port mode is already disabled */
0196     BFA_STATUS_CMD_NOTSUPP_MEZZ = 239, /* Cmd not supported for MEZZ card */
0197     BFA_STATUS_FRU_NOT_PRESENT = 240, /* fru module not present */
0198     BFA_STATUS_DPORT_NO_SFP = 243, /* SFP is not present.\n D-port will be
0199                     * enabled but it will be operational
0200                     * only after inserting a valid SFP. */
0201     BFA_STATUS_DPORT_ERR = 245, /* D-port mode is enabled */
0202     BFA_STATUS_DPORT_ENOSYS = 254, /* Switch has no D_Port functionality */
0203     BFA_STATUS_DPORT_CANT_PERF = 255, /* Switch port is not D_Port capable
0204                     * or D_Port is disabled */
0205     BFA_STATUS_DPORT_LOGICALERR = 256, /* Switch D_Port fail */
0206     BFA_STATUS_DPORT_SWBUSY = 257, /* Switch port busy */
0207     BFA_STATUS_ERR_BBCR_SPEED_UNSUPPORT = 258, /*!< BB credit recovery is
0208                     * supported at max port speed alone */
0209     BFA_STATUS_ERROR_BBCR_ENABLED  = 259, /*!< BB credit recovery
0210                     * is enabled */
0211     BFA_STATUS_INVALID_BBSCN = 260, /*!< Invalid BBSCN value.
0212                      * Valid range is [1-15] */
0213     BFA_STATUS_DDPORT_ERR = 261, /* Dynamic D_Port mode is active.\n To
0214                     * exit dynamic mode, disable D_Port on
0215                     * the remote port */
0216     BFA_STATUS_DPORT_SFPWRAP_ERR = 262, /* Clear e/o_wrap fail, check or
0217                         * replace SFP */
0218     BFA_STATUS_BBCR_CFG_NO_CHANGE = 265, /*!< BBCR is operational.
0219             * Disable BBCR and try this operation again. */
0220     BFA_STATUS_DPORT_SW_NOTREADY = 268, /* Remote port is not ready to
0221                     * start dport test. Check remote
0222                     * port status. */
0223     BFA_STATUS_DPORT_INV_SFP = 271, /* Invalid SFP for D-PORT mode. */
0224     BFA_STATUS_DPORT_CMD_NOTSUPP    = 273, /* Dport is not supported by
0225                     * remote port */
0226     BFA_STATUS_MAX_VAL      /* Unknown error code */
0227 };
0228 #define bfa_status_t enum bfa_status
0229 
0230 enum bfa_eproto_status {
0231     BFA_EPROTO_BAD_ACCEPT = 0,
0232     BFA_EPROTO_UNKNOWN_RSP = 1
0233 };
0234 #define bfa_eproto_status_t enum bfa_eproto_status
0235 
0236 enum bfa_boolean {
0237     BFA_FALSE = 0,
0238     BFA_TRUE  = 1
0239 };
0240 #define bfa_boolean_t enum bfa_boolean
0241 
0242 #define BFA_STRING_32   32
0243 #define BFA_VERSION_LEN 64
0244 
0245 /*
0246  * ---------------------- adapter definitions ------------
0247  */
0248 
0249 /*
0250  * BFA adapter level attributes.
0251  */
0252 enum {
0253     BFA_ADAPTER_SERIAL_NUM_LEN = STRSZ(BFA_MFG_SERIALNUM_SIZE),
0254                     /*
0255                      *!< adapter serial num length
0256                      */
0257     BFA_ADAPTER_MODEL_NAME_LEN  = 16,  /*  model name length */
0258     BFA_ADAPTER_MODEL_DESCR_LEN = 128, /*  model description length */
0259     BFA_ADAPTER_MFG_NAME_LEN    = 8,   /*  manufacturer name length */
0260     BFA_ADAPTER_SYM_NAME_LEN    = 64,  /*  adapter symbolic name length */
0261     BFA_ADAPTER_OS_TYPE_LEN     = 64,  /*  adapter os type length */
0262     BFA_ADAPTER_UUID_LEN        = 16,  /* adapter uuid length */
0263 };
0264 
0265 struct bfa_adapter_attr_s {
0266     char        manufacturer[BFA_ADAPTER_MFG_NAME_LEN];
0267     char        serial_num[BFA_ADAPTER_SERIAL_NUM_LEN];
0268     u32 card_type;
0269     char        model[BFA_ADAPTER_MODEL_NAME_LEN];
0270     char        model_descr[BFA_ADAPTER_MODEL_DESCR_LEN];
0271     wwn_t       pwwn;
0272     char        node_symname[FC_SYMNAME_MAX];
0273     char        hw_ver[BFA_VERSION_LEN];
0274     char        fw_ver[BFA_VERSION_LEN];
0275     char        optrom_ver[BFA_VERSION_LEN];
0276     char        os_type[BFA_ADAPTER_OS_TYPE_LEN];
0277     struct bfa_mfg_vpd_s    vpd;
0278     struct mac_s    mac;
0279 
0280     u8      nports;
0281     u8      max_speed;
0282     u8      prototype;
0283     char            asic_rev;
0284 
0285     u8      pcie_gen;
0286     u8      pcie_lanes_orig;
0287     u8      pcie_lanes;
0288     u8          cna_capable;
0289 
0290     u8      is_mezz;
0291     u8      trunk_capable;
0292     u8      mfg_day;    /* manufacturing day */
0293     u8      mfg_month;  /* manufacturing month */
0294     u16     mfg_year;   /* manufacturing year */
0295     u16     rsvd;
0296     u8      uuid[BFA_ADAPTER_UUID_LEN];
0297 };
0298 
0299 /*
0300  * ---------------------- IOC definitions ------------
0301  */
0302 
0303 enum {
0304     BFA_IOC_DRIVER_LEN  = 16,
0305     BFA_IOC_CHIP_REV_LEN    = 8,
0306 };
0307 
0308 /*
0309  * Driver and firmware versions.
0310  */
0311 struct bfa_ioc_driver_attr_s {
0312     char        driver[BFA_IOC_DRIVER_LEN]; /*  driver name */
0313     char        driver_ver[BFA_VERSION_LEN];    /*  driver version */
0314     char        fw_ver[BFA_VERSION_LEN];    /*  firmware version */
0315     char        bios_ver[BFA_VERSION_LEN];  /*  bios version */
0316     char        efi_ver[BFA_VERSION_LEN];   /*  EFI version */
0317     char        ob_ver[BFA_VERSION_LEN];    /*  openboot version */
0318 };
0319 
0320 /*
0321  * IOC PCI device attributes
0322  */
0323 struct bfa_ioc_pci_attr_s {
0324     u16 vendor_id;  /*  PCI vendor ID */
0325     u16 device_id;  /*  PCI device ID */
0326     u16 ssid;       /*  subsystem ID */
0327     u16 ssvid;      /*  subsystem vendor ID */
0328     u32 pcifn;      /*  PCI device function */
0329     u32 rsvd;       /* padding */
0330     char        chip_rev[BFA_IOC_CHIP_REV_LEN];  /*  chip revision */
0331 };
0332 
0333 /*
0334  * IOC states
0335  */
0336 enum bfa_ioc_state {
0337     BFA_IOC_UNINIT      = 1,    /*  IOC is in uninit state */
0338     BFA_IOC_RESET       = 2,    /*  IOC is in reset state */
0339     BFA_IOC_SEMWAIT     = 3,    /*  Waiting for IOC h/w semaphore */
0340     BFA_IOC_HWINIT      = 4,    /*  IOC h/w is being initialized */
0341     BFA_IOC_GETATTR     = 5,    /*  IOC is being configured */
0342     BFA_IOC_OPERATIONAL = 6,    /*  IOC is operational */
0343     BFA_IOC_INITFAIL    = 7,    /*  IOC hardware failure */
0344     BFA_IOC_FAIL        = 8,    /*  IOC heart-beat failure */
0345     BFA_IOC_DISABLING   = 9,    /*  IOC is being disabled */
0346     BFA_IOC_DISABLED    = 10,   /*  IOC is disabled */
0347     BFA_IOC_FWMISMATCH  = 11,   /*  IOC f/w different from drivers */
0348     BFA_IOC_ENABLING    = 12,   /*  IOC is being enabled */
0349     BFA_IOC_HWFAIL      = 13,   /*  PCI mapping doesn't exist */
0350     BFA_IOC_ACQ_ADDR    = 14,   /*  Acquiring addr from fabric */
0351 };
0352 
0353 /*
0354  * IOC firmware stats
0355  */
0356 struct bfa_fw_ioc_stats_s {
0357     u32 enable_reqs;
0358     u32 disable_reqs;
0359     u32 get_attr_reqs;
0360     u32 dbg_sync;
0361     u32 dbg_dump;
0362     u32 unknown_reqs;
0363 };
0364 
0365 /*
0366  * IOC driver stats
0367  */
0368 struct bfa_ioc_drv_stats_s {
0369     u32 ioc_isrs;
0370     u32 ioc_enables;
0371     u32 ioc_disables;
0372     u32 ioc_hbfails;
0373     u32 ioc_boots;
0374     u32 stats_tmos;
0375     u32 hb_count;
0376     u32 disable_reqs;
0377     u32 enable_reqs;
0378     u32 disable_replies;
0379     u32 enable_replies;
0380     u32 rsvd;
0381 };
0382 
0383 /*
0384  * IOC statistics
0385  */
0386 struct bfa_ioc_stats_s {
0387     struct bfa_ioc_drv_stats_s  drv_stats; /*  driver IOC stats */
0388     struct bfa_fw_ioc_stats_s   fw_stats;  /*  firmware IOC stats */
0389 };
0390 
0391 enum bfa_ioc_type_e {
0392     BFA_IOC_TYPE_FC     = 1,
0393     BFA_IOC_TYPE_FCoE   = 2,
0394     BFA_IOC_TYPE_LL     = 3,
0395 };
0396 
0397 /*
0398  * IOC attributes returned in queries
0399  */
0400 struct bfa_ioc_attr_s {
0401     enum bfa_ioc_type_e     ioc_type;
0402     enum bfa_ioc_state      state;      /*  IOC state      */
0403     struct bfa_adapter_attr_s   adapter_attr;   /*  HBA attributes */
0404     struct bfa_ioc_driver_attr_s    driver_attr;    /*  driver attr    */
0405     struct bfa_ioc_pci_attr_s   pci_attr;
0406     u8              port_id;    /*  port number    */
0407     u8              port_mode;  /*  bfa_mode_s  */
0408     u8              cap_bm;     /*  capability  */
0409     u8              port_mode_cfg;  /*  bfa_mode_s  */
0410     u8              def_fn;     /* 1 if default fn */
0411     u8              rsvd[3];    /*  64bit align */
0412 };
0413 
0414 /*
0415  *          AEN related definitions
0416  */
0417 enum bfa_aen_category {
0418     BFA_AEN_CAT_ADAPTER = 1,
0419     BFA_AEN_CAT_PORT    = 2,
0420     BFA_AEN_CAT_LPORT   = 3,
0421     BFA_AEN_CAT_RPORT   = 4,
0422     BFA_AEN_CAT_ITNIM   = 5,
0423     BFA_AEN_CAT_AUDIT   = 8,
0424     BFA_AEN_CAT_IOC     = 9,
0425 };
0426 
0427 /* BFA adapter level events */
0428 enum bfa_adapter_aen_event {
0429     BFA_ADAPTER_AEN_ADD = 1,    /* New Adapter found event */
0430     BFA_ADAPTER_AEN_REMOVE  = 2,    /* Adapter removed event */
0431 };
0432 
0433 struct bfa_adapter_aen_data_s {
0434     char    serial_num[BFA_ADAPTER_SERIAL_NUM_LEN];
0435     u32 nports; /* Number of NPorts */
0436     wwn_t   pwwn;   /* WWN of one of its physical port */
0437 };
0438 
0439 /* BFA physical port Level events */
0440 enum bfa_port_aen_event {
0441     BFA_PORT_AEN_ONLINE = 1,    /* Physical Port online event */
0442     BFA_PORT_AEN_OFFLINE    = 2,    /* Physical Port offline event */
0443     BFA_PORT_AEN_RLIR   = 3,    /* RLIR event, not supported */
0444     BFA_PORT_AEN_SFP_INSERT = 4,    /* SFP inserted event */
0445     BFA_PORT_AEN_SFP_REMOVE = 5,    /* SFP removed event */
0446     BFA_PORT_AEN_SFP_POM    = 6,    /* SFP POM event */
0447     BFA_PORT_AEN_ENABLE = 7,    /* Physical Port enable event */
0448     BFA_PORT_AEN_DISABLE    = 8,    /* Physical Port disable event */
0449     BFA_PORT_AEN_AUTH_ON    = 9,    /* Physical Port auth success event */
0450     BFA_PORT_AEN_AUTH_OFF   = 10,   /* Physical Port auth fail event */
0451     BFA_PORT_AEN_DISCONNECT = 11,   /* Physical Port disconnect event */
0452     BFA_PORT_AEN_QOS_NEG    = 12,   /* Base Port QOS negotiation event */
0453     BFA_PORT_AEN_FABRIC_NAME_CHANGE = 13, /* Fabric Name/WWN change */
0454     BFA_PORT_AEN_SFP_ACCESS_ERROR   = 14, /* SFP read error event */
0455     BFA_PORT_AEN_SFP_UNSUPPORT  = 15, /* Unsupported SFP event */
0456 };
0457 
0458 enum bfa_port_aen_sfp_pom {
0459     BFA_PORT_AEN_SFP_POM_GREEN = 1, /* Normal */
0460     BFA_PORT_AEN_SFP_POM_AMBER = 2, /* Warning */
0461     BFA_PORT_AEN_SFP_POM_RED   = 3, /* Critical */
0462     BFA_PORT_AEN_SFP_POM_MAX   = BFA_PORT_AEN_SFP_POM_RED
0463 };
0464 
0465 struct bfa_port_aen_data_s {
0466     wwn_t       pwwn;       /* WWN of the physical port */
0467     wwn_t       fwwn;       /* WWN of the fabric port */
0468     u32     phy_port_num;   /* For SFP related events */
0469     u16     ioc_type;
0470     u16     level;      /* Only transitions will be informed */
0471     mac_t       mac;        /* MAC address of the ethernet port */
0472     u16     rsvd;
0473 };
0474 
0475 /* BFA AEN logical port events */
0476 enum bfa_lport_aen_event {
0477     BFA_LPORT_AEN_NEW   = 1,        /* LPort created event */
0478     BFA_LPORT_AEN_DELETE    = 2,        /* LPort deleted event */
0479     BFA_LPORT_AEN_ONLINE    = 3,        /* LPort online event */
0480     BFA_LPORT_AEN_OFFLINE   = 4,        /* LPort offline event */
0481     BFA_LPORT_AEN_DISCONNECT = 5,       /* LPort disconnect event */
0482     BFA_LPORT_AEN_NEW_PROP  = 6,        /* VPort created event */
0483     BFA_LPORT_AEN_DELETE_PROP = 7,      /* VPort deleted event */
0484     BFA_LPORT_AEN_NEW_STANDARD = 8,     /* VPort created event */
0485     BFA_LPORT_AEN_DELETE_STANDARD = 9,  /* VPort deleted event */
0486     BFA_LPORT_AEN_NPIV_DUP_WWN = 10,    /* VPort with duplicate WWN */
0487     BFA_LPORT_AEN_NPIV_FABRIC_MAX = 11, /* Max NPIV in fabric/fport */
0488     BFA_LPORT_AEN_NPIV_UNKNOWN = 12,    /* Unknown NPIV Error code */
0489 };
0490 
0491 struct bfa_lport_aen_data_s {
0492     u16 vf_id;  /* vf_id of this logical port */
0493     u16 roles;  /* Logical port mode,IM/TM/IP etc */
0494     u32 rsvd;
0495     wwn_t   ppwwn;  /* WWN of its physical port */
0496     wwn_t   lpwwn;  /* WWN of this logical port */
0497 };
0498 
0499 /* BFA ITNIM events */
0500 enum bfa_itnim_aen_event {
0501     BFA_ITNIM_AEN_ONLINE     = 1,   /* Target online */
0502     BFA_ITNIM_AEN_OFFLINE    = 2,   /* Target offline */
0503     BFA_ITNIM_AEN_DISCONNECT = 3,   /* Target disconnected */
0504 };
0505 
0506 struct bfa_itnim_aen_data_s {
0507     u16     vf_id;      /* vf_id of the IT nexus */
0508     u16     rsvd[3];
0509     wwn_t       ppwwn;      /* WWN of its physical port */
0510     wwn_t       lpwwn;      /* WWN of logical port */
0511     wwn_t       rpwwn;      /* WWN of remote(target) port */
0512 };
0513 
0514 /* BFA audit events */
0515 enum bfa_audit_aen_event {
0516     BFA_AUDIT_AEN_AUTH_ENABLE   = 1,
0517     BFA_AUDIT_AEN_AUTH_DISABLE  = 2,
0518     BFA_AUDIT_AEN_FLASH_ERASE   = 3,
0519     BFA_AUDIT_AEN_FLASH_UPDATE  = 4,
0520 };
0521 
0522 struct bfa_audit_aen_data_s {
0523     wwn_t   pwwn;
0524     int partition_inst;
0525     int partition_type;
0526 };
0527 
0528 /* BFA IOC level events */
0529 enum bfa_ioc_aen_event {
0530     BFA_IOC_AEN_HBGOOD  = 1,    /* Heart Beat restore event */
0531     BFA_IOC_AEN_HBFAIL  = 2,    /* Heart Beat failure event */
0532     BFA_IOC_AEN_ENABLE  = 3,    /* IOC enabled event        */
0533     BFA_IOC_AEN_DISABLE = 4,    /* IOC disabled event       */
0534     BFA_IOC_AEN_FWMISMATCH  = 5,    /* IOC firmware mismatch    */
0535     BFA_IOC_AEN_FWCFG_ERROR = 6,    /* IOC firmware config error    */
0536     BFA_IOC_AEN_INVALID_VENDOR = 7,
0537     BFA_IOC_AEN_INVALID_NWWN = 8,   /* Zero NWWN            */
0538     BFA_IOC_AEN_INVALID_PWWN = 9    /* Zero PWWN            */
0539 };
0540 
0541 struct bfa_ioc_aen_data_s {
0542     wwn_t   pwwn;
0543     u16 ioc_type;
0544     mac_t   mac;
0545 };
0546 
0547 /*
0548  * ---------------------- mfg definitions ------------
0549  */
0550 
0551 /*
0552  * Checksum size
0553  */
0554 #define BFA_MFG_CHKSUM_SIZE         16
0555 
0556 #define BFA_MFG_PARTNUM_SIZE            14
0557 #define BFA_MFG_SUPPLIER_ID_SIZE        10
0558 #define BFA_MFG_SUPPLIER_PARTNUM_SIZE       20
0559 #define BFA_MFG_SUPPLIER_SERIALNUM_SIZE     20
0560 #define BFA_MFG_SUPPLIER_REVISION_SIZE      4
0561 /*
0562  * Initial capability definition
0563  */
0564 #define BFA_MFG_IC_FC   0x01
0565 #define BFA_MFG_IC_ETH  0x02
0566 
0567 /*
0568  * Adapter capability mask definition
0569  */
0570 #define BFA_CM_HBA  0x01
0571 #define BFA_CM_CNA  0x02
0572 #define BFA_CM_NIC  0x04
0573 #define BFA_CM_FC16G    0x08
0574 #define BFA_CM_SRIOV    0x10
0575 #define BFA_CM_MEZZ 0x20
0576 
0577 #pragma pack(1)
0578 
0579 /*
0580  * All numerical fields are in big-endian format.
0581  */
0582 struct bfa_mfg_block_s {
0583     u8  version;    /*!< manufacturing block version */
0584     u8     mfg_sig[3]; /*!< characters 'M', 'F', 'G' */
0585     u16    mfgsize;    /*!< mfg block size */
0586     u16    u16_chksum; /*!< old u16 checksum */
0587     char        brcd_serialnum[STRSZ(BFA_MFG_SERIALNUM_SIZE)];
0588     char        brcd_partnum[STRSZ(BFA_MFG_PARTNUM_SIZE)];
0589     u8     mfg_day;    /*!< manufacturing day */
0590     u8     mfg_month;  /*!< manufacturing month */
0591     u16    mfg_year;   /*!< manufacturing year */
0592     wwn_t       mfg_wwn;    /*!< wwn base for this adapter */
0593     u8     num_wwn;    /*!< number of wwns assigned */
0594     u8     mfg_speeds; /*!< speeds allowed for this adapter */
0595     u8     rsv[2];
0596     char    supplier_id[STRSZ(BFA_MFG_SUPPLIER_ID_SIZE)];
0597     char    supplier_partnum[STRSZ(BFA_MFG_SUPPLIER_PARTNUM_SIZE)];
0598     char    supplier_serialnum[STRSZ(BFA_MFG_SUPPLIER_SERIALNUM_SIZE)];
0599     char    supplier_revision[STRSZ(BFA_MFG_SUPPLIER_REVISION_SIZE)];
0600     mac_t       mfg_mac;    /*!< base mac address */
0601     u8     num_mac;    /*!< number of mac addresses */
0602     u8     rsv2;
0603     u32    card_type;  /*!< card type          */
0604     char        cap_nic;    /*!< capability nic     */
0605     char        cap_cna;    /*!< capability cna     */
0606     char        cap_hba;    /*!< capability hba     */
0607     char        cap_fc16g;  /*!< capability fc 16g      */
0608     char        cap_sriov;  /*!< capability sriov       */
0609     char        cap_mezz;   /*!< capability mezz        */
0610     u8     rsv3;
0611     u8     mfg_nports; /*!< number of ports        */
0612     char        media[8];   /*!< xfi/xaui           */
0613     char        initial_mode[8]; /*!< initial mode: hba/cna/nic */
0614     u8     rsv4[84];
0615     u8     md5_chksum[BFA_MFG_CHKSUM_SIZE]; /*!< md5 checksum */
0616 };
0617 
0618 #pragma pack()
0619 
0620 /*
0621  * ---------------------- pci definitions ------------
0622  */
0623 
0624 /*
0625  * PCI device and vendor ID information
0626  */
0627 enum {
0628     BFA_PCI_VENDOR_ID_BROCADE   = 0x1657,
0629     BFA_PCI_DEVICE_ID_FC_8G2P   = 0x13,
0630     BFA_PCI_DEVICE_ID_FC_8G1P   = 0x17,
0631     BFA_PCI_DEVICE_ID_CT        = 0x14,
0632     BFA_PCI_DEVICE_ID_CT_FC     = 0x21,
0633     BFA_PCI_DEVICE_ID_CT2       = 0x22,
0634     BFA_PCI_DEVICE_ID_CT2_QUAD  = 0x23,
0635 };
0636 
0637 #define bfa_asic_id_cb(__d)         \
0638     ((__d) == BFA_PCI_DEVICE_ID_FC_8G2P ||  \
0639      (__d) == BFA_PCI_DEVICE_ID_FC_8G1P)
0640 #define bfa_asic_id_ct(__d)         \
0641     ((__d) == BFA_PCI_DEVICE_ID_CT ||   \
0642      (__d) == BFA_PCI_DEVICE_ID_CT_FC)
0643 #define bfa_asic_id_ct2(__d)            \
0644     ((__d) == BFA_PCI_DEVICE_ID_CT2 ||  \
0645     (__d) == BFA_PCI_DEVICE_ID_CT2_QUAD)
0646 #define bfa_asic_id_ctc(__d)    \
0647     (bfa_asic_id_ct(__d) || bfa_asic_id_ct2(__d))
0648 
0649 /*
0650  * PCI sub-system device and vendor ID information
0651  */
0652 enum {
0653     BFA_PCI_FCOE_SSDEVICE_ID    = 0x14,
0654     BFA_PCI_CT2_SSID_FCoE       = 0x22,
0655     BFA_PCI_CT2_SSID_ETH        = 0x23,
0656     BFA_PCI_CT2_SSID_FC     = 0x24,
0657 };
0658 
0659 /*
0660  * Maximum number of device address ranges mapped through different BAR(s)
0661  */
0662 #define BFA_PCI_ACCESS_RANGES 1
0663 
0664 /*
0665  *  Port speed settings. Each specific speed is a bit field. Use multiple
0666  *  bits to specify speeds to be selected for auto-negotiation.
0667  */
0668 enum bfa_port_speed {
0669     BFA_PORT_SPEED_UNKNOWN = 0,
0670     BFA_PORT_SPEED_1GBPS    = 1,
0671     BFA_PORT_SPEED_2GBPS    = 2,
0672     BFA_PORT_SPEED_4GBPS    = 4,
0673     BFA_PORT_SPEED_8GBPS    = 8,
0674     BFA_PORT_SPEED_10GBPS   = 10,
0675     BFA_PORT_SPEED_16GBPS   = 16,
0676     BFA_PORT_SPEED_AUTO = 0xf,
0677 };
0678 #define bfa_port_speed_t enum bfa_port_speed
0679 
0680 enum {
0681     BFA_BOOT_BOOTLUN_MAX = 4,       /*  maximum boot lun per IOC */
0682     BFA_PREBOOT_BOOTLUN_MAX = 8,    /*  maximum preboot lun per IOC */
0683 };
0684 
0685 #define BOOT_CFG_REV1   1
0686 #define BOOT_CFG_VLAN   1
0687 
0688 /*
0689  *      Boot options setting. Boot options setting determines from where
0690  *      to get the boot lun information
0691  */
0692 enum bfa_boot_bootopt {
0693     BFA_BOOT_AUTO_DISCOVER  = 0, /*  Boot from blun provided by fabric */
0694     BFA_BOOT_STORED_BLUN = 1, /*  Boot from bluns stored in flash */
0695     BFA_BOOT_FIRST_LUN      = 2, /*  Boot from first discovered blun */
0696     BFA_BOOT_PBC    = 3, /*  Boot from pbc configured blun  */
0697 };
0698 
0699 #pragma pack(1)
0700 /*
0701  * Boot lun information.
0702  */
0703 struct bfa_boot_bootlun_s {
0704     wwn_t   pwwn;       /*  port wwn of target */
0705     struct scsi_lun   lun;  /*  64-bit lun */
0706 };
0707 #pragma pack()
0708 
0709 /*
0710  * BOOT boot configuraton
0711  */
0712 struct bfa_boot_cfg_s {
0713     u8      version;
0714     u8      rsvd1;
0715     u16     chksum;
0716     u8      enable;     /* enable/disable SAN boot */
0717     u8      speed;          /* boot speed settings */
0718     u8      topology;       /* boot topology setting */
0719     u8      bootopt;        /* bfa_boot_bootopt_t */
0720     u32     nbluns;         /* number of boot luns */
0721     u32     rsvd2;
0722     struct bfa_boot_bootlun_s blun[BFA_BOOT_BOOTLUN_MAX];
0723     struct bfa_boot_bootlun_s blun_disc[BFA_BOOT_BOOTLUN_MAX];
0724 };
0725 
0726 struct bfa_boot_pbc_s {
0727     u8              enable;         /*  enable/disable SAN boot */
0728     u8              speed;          /*  boot speed settings */
0729     u8              topology;       /*  boot topology setting */
0730     u8              rsvd1;
0731     u32     nbluns;         /*  number of boot luns */
0732     struct bfa_boot_bootlun_s pblun[BFA_PREBOOT_BOOTLUN_MAX];
0733 };
0734 
0735 struct bfa_ethboot_cfg_s {
0736     u8      version;
0737     u8      rsvd1;
0738     u16     chksum;
0739     u8      enable; /* enable/disable Eth/PXE boot */
0740     u8      rsvd2;
0741     u16     vlan;
0742 };
0743 
0744 /*
0745  * ASIC block configuration related structures
0746  */
0747 #define BFA_ABLK_MAX_PORTS  2
0748 #define BFA_ABLK_MAX_PFS    16
0749 #define BFA_ABLK_MAX        2
0750 
0751 #pragma pack(1)
0752 enum bfa_mode_s {
0753     BFA_MODE_HBA    = 1,
0754     BFA_MODE_CNA    = 2,
0755     BFA_MODE_NIC    = 3
0756 };
0757 
0758 struct bfa_adapter_cfg_mode_s {
0759     u16 max_pf;
0760     u16 max_vf;
0761     enum bfa_mode_s mode;
0762 };
0763 
0764 struct bfa_ablk_cfg_pf_s {
0765     u16 pers;
0766     u8  port_id;
0767     u8  optrom;
0768     u8  valid;
0769     u8  sriov;
0770     u8  max_vfs;
0771     u8  rsvd[1];
0772     u16 num_qpairs;
0773     u16 num_vectors;
0774     u16 bw_min;
0775     u16 bw_max;
0776 };
0777 
0778 struct bfa_ablk_cfg_port_s {
0779     u8  mode;
0780     u8  type;
0781     u8  max_pfs;
0782     u8  rsvd[5];
0783 };
0784 
0785 struct bfa_ablk_cfg_inst_s {
0786     u8  nports;
0787     u8  max_pfs;
0788     u8  rsvd[6];
0789     struct bfa_ablk_cfg_pf_s    pf_cfg[BFA_ABLK_MAX_PFS];
0790     struct bfa_ablk_cfg_port_s  port_cfg[BFA_ABLK_MAX_PORTS];
0791 };
0792 
0793 struct bfa_ablk_cfg_s {
0794     struct bfa_ablk_cfg_inst_s  inst[BFA_ABLK_MAX];
0795 };
0796 
0797 
0798 /*
0799  *  SFP module specific
0800  */
0801 #define SFP_DIAGMON_SIZE    10 /* num bytes of diag monitor data */
0802 
0803 /* SFP state change notification event */
0804 #define BFA_SFP_SCN_REMOVED 0
0805 #define BFA_SFP_SCN_INSERTED    1
0806 #define BFA_SFP_SCN_POM     2
0807 #define BFA_SFP_SCN_FAILED  3
0808 #define BFA_SFP_SCN_UNSUPPORT   4
0809 #define BFA_SFP_SCN_VALID   5
0810 
0811 enum bfa_defs_sfp_media_e {
0812     BFA_SFP_MEDIA_UNKNOWN   = 0x00,
0813     BFA_SFP_MEDIA_CU    = 0x01,
0814     BFA_SFP_MEDIA_LW    = 0x02,
0815     BFA_SFP_MEDIA_SW    = 0x03,
0816     BFA_SFP_MEDIA_EL    = 0x04,
0817     BFA_SFP_MEDIA_UNSUPPORT = 0x05,
0818 };
0819 
0820 /*
0821  * values for xmtr_tech above
0822  */
0823 enum {
0824     SFP_XMTR_TECH_CU = (1 << 0),    /* copper FC-BaseT */
0825     SFP_XMTR_TECH_CP = (1 << 1),    /* copper passive */
0826     SFP_XMTR_TECH_CA = (1 << 2),    /* copper active */
0827     SFP_XMTR_TECH_LL = (1 << 3),    /* longwave laser */
0828     SFP_XMTR_TECH_SL = (1 << 4),    /* shortwave laser w/ OFC */
0829     SFP_XMTR_TECH_SN = (1 << 5),    /* shortwave laser w/o OFC */
0830     SFP_XMTR_TECH_EL_INTRA = (1 << 6), /* elec intra-enclosure */
0831     SFP_XMTR_TECH_EL_INTER = (1 << 7), /* elec inter-enclosure */
0832     SFP_XMTR_TECH_LC = (1 << 8),    /* longwave laser */
0833     SFP_XMTR_TECH_SA = (1 << 9)
0834 };
0835 
0836 /*
0837  * Serial ID: Data Fields -- Address A0h
0838  * Basic ID field total 64 bytes
0839  */
0840 struct sfp_srlid_base_s {
0841     u8  id;     /* 00: Identifier */
0842     u8  extid;      /* 01: Extended Identifier */
0843     u8  connector;  /* 02: Connector */
0844     u8  xcvr[8];    /* 03-10: Transceiver */
0845     u8  encoding;   /* 11: Encoding */
0846     u8  br_norm;    /* 12: BR, Nominal */
0847     u8  rate_id;    /* 13: Rate Identifier */
0848     u8  len_km;     /* 14: Length single mode km */
0849     u8  len_100m;   /* 15: Length single mode 100m */
0850     u8  len_om2;    /* 16: Length om2 fiber 10m */
0851     u8  len_om1;    /* 17: Length om1 fiber 10m */
0852     u8  len_cu;     /* 18: Length copper 1m */
0853     u8  len_om3;    /* 19: Length om3 fiber 10m */
0854     u8  vendor_name[16];/* 20-35 */
0855     u8  unalloc1;
0856     u8  vendor_oui[3];  /* 37-39 */
0857     u8  vendor_pn[16];  /* 40-55 */
0858     u8  vendor_rev[4];  /* 56-59 */
0859     u8  wavelen[2]; /* 60-61 */
0860     u8  unalloc2;
0861     u8  cc_base;    /* 63: check code for base id field */
0862 };
0863 
0864 /*
0865  * Serial ID: Data Fields -- Address A0h
0866  * Extended id field total 32 bytes
0867  */
0868 struct sfp_srlid_ext_s {
0869     u8  options[2];
0870     u8  br_max;
0871     u8  br_min;
0872     u8  vendor_sn[16];
0873     u8  date_code[8];
0874     u8  diag_mon_type;  /* 92: Diagnostic Monitoring type */
0875     u8  en_options;
0876     u8  sff_8472;
0877     u8  cc_ext;
0878 };
0879 
0880 /*
0881  * Diagnostic: Data Fields -- Address A2h
0882  * Diagnostic and control/status base field total 96 bytes
0883  */
0884 struct sfp_diag_base_s {
0885     /*
0886      * Alarm and warning Thresholds 40 bytes
0887      */
0888     u8  temp_high_alarm[2]; /* 00-01 */
0889     u8  temp_low_alarm[2];  /* 02-03 */
0890     u8  temp_high_warning[2];   /* 04-05 */
0891     u8  temp_low_warning[2];    /* 06-07 */
0892 
0893     u8  volt_high_alarm[2]; /* 08-09 */
0894     u8  volt_low_alarm[2];  /* 10-11 */
0895     u8  volt_high_warning[2];   /* 12-13 */
0896     u8  volt_low_warning[2];    /* 14-15 */
0897 
0898     u8  bias_high_alarm[2]; /* 16-17 */
0899     u8  bias_low_alarm[2];  /* 18-19 */
0900     u8  bias_high_warning[2];   /* 20-21 */
0901     u8  bias_low_warning[2];    /* 22-23 */
0902 
0903     u8  tx_pwr_high_alarm[2];   /* 24-25 */
0904     u8  tx_pwr_low_alarm[2];    /* 26-27 */
0905     u8  tx_pwr_high_warning[2]; /* 28-29 */
0906     u8  tx_pwr_low_warning[2];  /* 30-31 */
0907 
0908     u8  rx_pwr_high_alarm[2];   /* 32-33 */
0909     u8  rx_pwr_low_alarm[2];    /* 34-35 */
0910     u8  rx_pwr_high_warning[2]; /* 36-37 */
0911     u8  rx_pwr_low_warning[2];  /* 38-39 */
0912 
0913     u8  unallocate_1[16];
0914 
0915     /*
0916      * ext_cal_const[36]
0917      */
0918     u8  rx_pwr[20];
0919     u8  tx_i[4];
0920     u8  tx_pwr[4];
0921     u8  temp[4];
0922     u8  volt[4];
0923     u8  unallocate_2[3];
0924     u8  cc_dmi;
0925 };
0926 
0927 /*
0928  * Diagnostic: Data Fields -- Address A2h
0929  * Diagnostic and control/status extended field total 24 bytes
0930  */
0931 struct sfp_diag_ext_s {
0932     u8  diag[SFP_DIAGMON_SIZE];
0933     u8  unalloc1[4];
0934     u8  status_ctl;
0935     u8  rsvd;
0936     u8  alarm_flags[2];
0937     u8  unalloc2[2];
0938     u8  warning_flags[2];
0939     u8  ext_status_ctl[2];
0940 };
0941 
0942 /*
0943  * Diagnostic: Data Fields -- Address A2h
0944  * General Use Fields: User Writable Table - Features's Control Registers
0945  * Total 32 bytes
0946  */
0947 struct sfp_usr_eeprom_s {
0948     u8  rsvd1[2];       /* 128-129 */
0949     u8  ewrap;          /* 130 */
0950     u8  rsvd2[2];       /*  */
0951     u8  owrap;          /* 133 */
0952     u8  rsvd3[2];       /*  */
0953     u8  prbs;           /* 136: PRBS 7 generator */
0954     u8  rsvd4[2];       /*  */
0955     u8  tx_eqz_16;      /* 139: TX Equalizer (16xFC) */
0956     u8  tx_eqz_8;       /* 140: TX Equalizer (8xFC) */
0957     u8  rsvd5[2];       /*  */
0958     u8  rx_emp_16;      /* 143: RX Emphasis (16xFC) */
0959     u8  rx_emp_8;       /* 144: RX Emphasis (8xFC) */
0960     u8  rsvd6[2];       /*  */
0961     u8  tx_eye_adj;     /* 147: TX eye Threshold Adjust */
0962     u8  rsvd7[3];       /*  */
0963     u8  tx_eye_qctl;    /* 151: TX eye Quality Control */
0964     u8  tx_eye_qres;    /* 152: TX eye Quality Result */
0965     u8  rsvd8[2];       /*  */
0966     u8  poh[3];         /* 155-157: Power On Hours */
0967     u8  rsvd9[2];       /*  */
0968 };
0969 
0970 struct sfp_mem_s {
0971     struct sfp_srlid_base_s srlid_base;
0972     struct sfp_srlid_ext_s  srlid_ext;
0973     struct sfp_diag_base_s  diag_base;
0974     struct sfp_diag_ext_s   diag_ext;
0975     struct sfp_usr_eeprom_s usr_eeprom;
0976 };
0977 
0978 /*
0979  * transceiver codes (SFF-8472 Rev 10.2 Table 3.5)
0980  */
0981 union sfp_xcvr_e10g_code_u {
0982     u8      b;
0983     struct {
0984 #ifdef __BIG_ENDIAN
0985         u8  e10g_unall:1;   /* 10G Ethernet compliance */
0986         u8  e10g_lrm:1;
0987         u8  e10g_lr:1;
0988         u8  e10g_sr:1;
0989         u8  ib_sx:1;    /* Infiniband compliance */
0990         u8  ib_lx:1;
0991         u8  ib_cu_a:1;
0992         u8  ib_cu_p:1;
0993 #else
0994         u8  ib_cu_p:1;
0995         u8  ib_cu_a:1;
0996         u8  ib_lx:1;
0997         u8  ib_sx:1;    /* Infiniband compliance */
0998         u8  e10g_sr:1;
0999         u8  e10g_lr:1;
1000         u8  e10g_lrm:1;
1001         u8  e10g_unall:1;   /* 10G Ethernet compliance */
1002 #endif
1003     } r;
1004 };
1005 
1006 union sfp_xcvr_so1_code_u {
1007     u8      b;
1008     struct {
1009         u8  escon:2;    /* ESCON compliance code */
1010         u8  oc192_reach:1;  /* SONET compliance code */
1011         u8  so_reach:2;
1012         u8  oc48_reach:3;
1013     } r;
1014 };
1015 
1016 union sfp_xcvr_so2_code_u {
1017     u8      b;
1018     struct {
1019         u8  reserved:1;
1020         u8  oc12_reach:3;   /* OC12 reach */
1021         u8  reserved1:1;
1022         u8  oc3_reach:3;    /* OC3 reach */
1023     } r;
1024 };
1025 
1026 union sfp_xcvr_eth_code_u {
1027     u8      b;
1028     struct {
1029         u8  base_px:1;
1030         u8  base_bx10:1;
1031         u8  e100base_fx:1;
1032         u8  e100base_lx:1;
1033         u8  e1000base_t:1;
1034         u8  e1000base_cx:1;
1035         u8  e1000base_lx:1;
1036         u8  e1000base_sx:1;
1037     } r;
1038 };
1039 
1040 struct sfp_xcvr_fc1_code_s {
1041     u8  link_len:5; /* FC link length */
1042     u8  xmtr_tech2:3;
1043     u8  xmtr_tech1:7;   /* FC transmitter technology */
1044     u8  reserved1:1;
1045 };
1046 
1047 union sfp_xcvr_fc2_code_u {
1048     u8      b;
1049     struct {
1050         u8  tw_media:1; /* twin axial pair (tw) */
1051         u8  tp_media:1; /* shielded twisted pair (sp) */
1052         u8  mi_media:1; /* miniature coax (mi) */
1053         u8  tv_media:1; /* video coax (tv) */
1054         u8  m6_media:1; /* multimode, 62.5m (m6) */
1055         u8  m5_media:1; /* multimode, 50m (m5) */
1056         u8  reserved:1;
1057         u8  sm_media:1; /* single mode (sm) */
1058     } r;
1059 };
1060 
1061 union sfp_xcvr_fc3_code_u {
1062     u8      b;
1063     struct {
1064 #ifdef __BIG_ENDIAN
1065         u8  rsv4:1;
1066         u8  mb800:1;    /* 800 Mbytes/sec */
1067         u8  mb1600:1;   /* 1600 Mbytes/sec */
1068         u8  mb400:1;    /* 400 Mbytes/sec */
1069         u8  rsv2:1;
1070         u8  mb200:1;    /* 200 Mbytes/sec */
1071         u8  rsv1:1;
1072         u8  mb100:1;    /* 100 Mbytes/sec */
1073 #else
1074         u8  mb100:1;    /* 100 Mbytes/sec */
1075         u8  rsv1:1;
1076         u8  mb200:1;    /* 200 Mbytes/sec */
1077         u8  rsv2:1;
1078         u8  mb400:1;    /* 400 Mbytes/sec */
1079         u8  mb1600:1;   /* 1600 Mbytes/sec */
1080         u8  mb800:1;    /* 800 Mbytes/sec */
1081         u8  rsv4:1;
1082 #endif
1083     } r;
1084 };
1085 
1086 struct sfp_xcvr_s {
1087     union sfp_xcvr_e10g_code_u  e10g;
1088     union sfp_xcvr_so1_code_u   so1;
1089     union sfp_xcvr_so2_code_u   so2;
1090     union sfp_xcvr_eth_code_u   eth;
1091     struct sfp_xcvr_fc1_code_s  fc1;
1092     union sfp_xcvr_fc2_code_u   fc2;
1093     union sfp_xcvr_fc3_code_u   fc3;
1094 };
1095 
1096 /*
1097  *  Flash module specific
1098  */
1099 #define BFA_FLASH_PART_ENTRY_SIZE   32  /* partition entry size */
1100 #define BFA_FLASH_PART_MAX      32  /* maximal # of partitions */
1101 
1102 enum bfa_flash_part_type {
1103     BFA_FLASH_PART_OPTROM   = 1,    /* option rom partition */
1104     BFA_FLASH_PART_FWIMG    = 2,    /* firmware image partition */
1105     BFA_FLASH_PART_FWCFG    = 3,    /* firmware tuneable config */
1106     BFA_FLASH_PART_DRV      = 4,    /* IOC driver config */
1107     BFA_FLASH_PART_BOOT     = 5,    /* boot config */
1108     BFA_FLASH_PART_ASIC     = 6,    /* asic bootstrap configuration */
1109     BFA_FLASH_PART_MFG      = 7,    /* manufacturing block partition */
1110     BFA_FLASH_PART_OPTROM2  = 8,    /* 2nd option rom partition */
1111     BFA_FLASH_PART_VPD      = 9,    /* vpd data of OEM info */
1112     BFA_FLASH_PART_PBC      = 10,   /* pre-boot config */
1113     BFA_FLASH_PART_BOOTOVL  = 11,   /* boot overlay partition */
1114     BFA_FLASH_PART_LOG      = 12,   /* firmware log partition */
1115     BFA_FLASH_PART_PXECFG   = 13,   /* pxe boot config partition */
1116     BFA_FLASH_PART_PXEOVL   = 14,   /* pxe boot overlay partition */
1117     BFA_FLASH_PART_PORTCFG  = 15,   /* port cfg partition */
1118     BFA_FLASH_PART_ASICBK   = 16,   /* asic backup partition */
1119 };
1120 
1121 /*
1122  * flash partition attributes
1123  */
1124 struct bfa_flash_part_attr_s {
1125     u32 part_type;      /* partition type */
1126     u32 part_instance;  /* partition instance */
1127     u32 part_off;       /* partition offset */
1128     u32 part_size;      /* partition size */
1129     u32 part_len;       /* partition content length */
1130     u32 part_status;    /* partition status */
1131     char    rsv[BFA_FLASH_PART_ENTRY_SIZE - 24];
1132 };
1133 
1134 /*
1135  * flash attributes
1136  */
1137 struct bfa_flash_attr_s {
1138     u32 status; /* flash overall status */
1139     u32 npart;  /* num of partitions */
1140     struct bfa_flash_part_attr_s part[BFA_FLASH_PART_MAX];
1141 };
1142 
1143 /*
1144  *  DIAG module specific
1145  */
1146 #define LB_PATTERN_DEFAULT  0xB5B5B5B5
1147 #define QTEST_CNT_DEFAULT   10
1148 #define QTEST_PAT_DEFAULT   LB_PATTERN_DEFAULT
1149 #define DPORT_ENABLE_LOOPCNT_DEFAULT (1024 * 1024)
1150 
1151 struct bfa_diag_memtest_s {
1152     u8  algo;
1153     u8  rsvd[7];
1154 };
1155 
1156 struct bfa_diag_memtest_result {
1157     u32 status;
1158     u32 addr;
1159     u32 exp; /* expect value read from reg */
1160     u32 act; /* actually value read */
1161     u32 err_status;             /* error status reg */
1162     u32 err_status1;    /* extra error info reg */
1163     u32 err_addr; /* error address reg */
1164     u8  algo;
1165     u8  rsv[3];
1166 };
1167 
1168 struct bfa_diag_loopback_result_s {
1169     u32 numtxmfrm;      /* no. of transmit frame */
1170     u32 numosffrm;      /* no. of outstanding frame */
1171     u32 numrcvfrm;      /* no. of received good frame */
1172     u32 badfrminf;      /* mis-match info */
1173     u32 badfrmnum;      /* mis-match fram number */
1174     u8  status;         /* loopback test result */
1175     u8  rsvd[3];
1176 };
1177 
1178 enum bfa_diag_dport_test_status {
1179     DPORT_TEST_ST_IDLE  = 0,    /* the test has not started yet. */
1180     DPORT_TEST_ST_FINAL = 1,    /* the test done successfully */
1181     DPORT_TEST_ST_SKIP  = 2,    /* the test skipped */
1182     DPORT_TEST_ST_FAIL  = 3,    /* the test failed */
1183     DPORT_TEST_ST_INPRG = 4,    /* the testing is in progress */
1184     DPORT_TEST_ST_RESPONDER = 5,    /* test triggered from remote port */
1185     DPORT_TEST_ST_STOPPED   = 6,    /* the test stopped by user. */
1186     DPORT_TEST_ST_MAX
1187 };
1188 
1189 enum bfa_diag_dport_test_type {
1190     DPORT_TEST_ELOOP    = 0,
1191     DPORT_TEST_OLOOP    = 1,
1192     DPORT_TEST_ROLOOP   = 2,
1193     DPORT_TEST_LINK     = 3,
1194     DPORT_TEST_MAX
1195 };
1196 
1197 enum bfa_diag_dport_test_opmode {
1198     BFA_DPORT_OPMODE_AUTO   = 0,
1199     BFA_DPORT_OPMODE_MANU   = 1,
1200 };
1201 
1202 struct bfa_diag_dport_subtest_result_s {
1203     u8  status;     /* bfa_diag_dport_test_status */
1204     u8  rsvd[7];    /* 64bit align */
1205     u64 start_time; /* timestamp  */
1206 };
1207 
1208 struct bfa_diag_dport_result_s {
1209     wwn_t   rp_pwwn;    /* switch port wwn  */
1210     wwn_t   rp_nwwn;    /* switch node wwn  */
1211     u64 start_time; /* user/sw start time */
1212     u64 end_time;   /* timestamp  */
1213     u8  status;     /* bfa_diag_dport_test_status */
1214     u8  mode;       /* bfa_diag_dport_test_opmode */
1215     u8  rsvd;       /* 64bit align */
1216     u8  speed;      /* link speed for buf_reqd */
1217     u16 buffer_required;
1218     u16 frmsz;      /* frame size for buf_reqd */
1219     u32 lpcnt;      /* Frame count */
1220     u32 pat;        /* Pattern */
1221     u32 roundtrip_latency;  /* in nano sec */
1222     u32 est_cable_distance; /* in meter */
1223     struct bfa_diag_dport_subtest_result_s subtest[DPORT_TEST_MAX];
1224 };
1225 
1226 struct bfa_diag_ledtest_s {
1227     u32 cmd;    /* bfa_led_op_t */
1228     u32 color;  /* bfa_led_color_t */
1229     u16 freq;   /* no. of blinks every 10 secs */
1230     u8  led;    /* bitmap of LEDs to be tested */
1231     u8  rsvd[5];
1232 };
1233 
1234 struct bfa_diag_loopback_s {
1235     u32 loopcnt;
1236     u32 pattern;
1237     u8  lb_mode;    /* bfa_port_opmode_t */
1238     u8  speed;      /* bfa_port_speed_t */
1239     u8  rsvd[2];
1240 };
1241 
1242 /*
1243  *  PHY module specific
1244  */
1245 enum bfa_phy_status_e {
1246     BFA_PHY_STATUS_GOOD = 0, /* phy is good */
1247     BFA_PHY_STATUS_NOT_PRESENT  = 1, /* phy does not exist */
1248     BFA_PHY_STATUS_BAD  = 2, /* phy is bad */
1249 };
1250 
1251 /*
1252  * phy attributes for phy query
1253  */
1254 struct bfa_phy_attr_s {
1255     u32 status;         /* phy present/absent status */
1256     u32 length;         /* firmware length */
1257     u32 fw_ver;         /* firmware version */
1258     u32 an_status;      /* AN status */
1259     u32 pma_pmd_status; /* PMA/PMD link status */
1260     u32 pma_pmd_signal; /* PMA/PMD signal detect */
1261     u32 pcs_status;     /* PCS link status */
1262 };
1263 
1264 /*
1265  * phy stats
1266  */
1267 struct bfa_phy_stats_s {
1268     u32 status;         /* phy stats status */
1269     u32 link_breaks;    /* Num of link breaks after linkup */
1270     u32 pma_pmd_fault;  /* NPMA/PMD fault */
1271     u32 pcs_fault;      /* PCS fault */
1272     u32 speed_neg;      /* Num of speed negotiation */
1273     u32 tx_eq_training; /* Num of TX EQ training */
1274     u32 tx_eq_timeout;  /* Num of TX EQ timeout */
1275     u32 crc_error;      /* Num of CRC errors */
1276 };
1277 
1278 #pragma pack()
1279 
1280 #endif /* __BFA_DEFS_H__ */
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