drivers/scsi/atp870u.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  *  Copyright (C) 1997  Wu Ching Chen
0004  *  2.1.x update (C) 1998  Krzysztof G. Baranowski
0005  *  2.5.x update (C) 2002  Red Hat
0006  *  2.6.x update (C) 2004  Red Hat
0007  *
0008  * Marcelo Tosatti <marcelo@conectiva.com.br> : SMP fixes
0009  *
0010  * Wu Ching Chen : NULL pointer fixes  2000/06/02
0011  *         support atp876 chip
0012  *         enable 32 bit fifo transfer
0013  *         support cdrom & remove device run ultra speed
0014  *         fix disconnect bug  2000/12/21
0015  *         support atp880 chip lvd u160 2001/05/15
0016  *         fix prd table bug 2001/09/12 (7.1)
0017  *
0018  * atp885 support add by ACARD Hao Ping Lian 2005/01/05
0019  */
0020 #include <linux/module.h>
0021 #include <linux/init.h>
0022 #include <linux/interrupt.h>
0023 #include <linux/kernel.h>
0024 #include <linux/types.h>
0025 #include <linux/string.h>
0026 #include <linux/ioport.h>
0027 #include <linux/delay.h>
0028 #include <linux/proc_fs.h>
0029 #include <linux/spinlock.h>
0030 #include <linux/pci.h>
0031 #include <linux/blkdev.h>
0032 #include <linux/dma-mapping.h>
0033 #include <linux/slab.h>
0034 #include <asm/io.h>
0035
0036 #include <scsi/scsi.h>
0037 #include <scsi/scsi_cmnd.h>
0038 #include <scsi/scsi_device.h>
0039 #include <scsi/scsi_host.h>
0040
0041 #include "atp870u.h"
0042
0043 static struct scsi_host_template atp870u_template;
0044 static void send_s870(struct atp_unit *dev,unsigned char c);
0045 static void atp_is(struct atp_unit *dev, unsigned char c, bool wide_chip,
0046            unsigned char lvdmode);
0047
0048 static inline void atp_writeb_base(struct atp_unit *atp, u8 reg, u8 val)
0049 {
0050     outb(val, atp->baseport + reg);
0051 }
0052
0053 static inline void atp_writew_base(struct atp_unit *atp, u8 reg, u16 val)
0054 {
0055     outw(val, atp->baseport + reg);
0056 }
0057
0058 static inline void atp_writeb_io(struct atp_unit *atp, u8 channel, u8 reg, u8 val)
0059 {
0060     outb(val, atp->ioport[channel] + reg);
0061 }
0062
0063 static inline void atp_writew_io(struct atp_unit *atp, u8 channel, u8 reg, u16 val)
0064 {
0065     outw(val, atp->ioport[channel] + reg);
0066 }
0067
0068 static inline void atp_writeb_pci(struct atp_unit *atp, u8 channel, u8 reg, u8 val)
0069 {
0070     outb(val, atp->pciport[channel] + reg);
0071 }
0072
0073 static inline void atp_writel_pci(struct atp_unit *atp, u8 channel, u8 reg, u32 val)
0074 {
0075     outl(val, atp->pciport[channel] + reg);
0076 }
0077
0078 static inline u8 atp_readb_base(struct atp_unit *atp, u8 reg)
0079 {
0080     return inb(atp->baseport + reg);
0081 }
0082
0083 static inline u16 atp_readw_base(struct atp_unit *atp, u8 reg)
0084 {
0085     return inw(atp->baseport + reg);
0086 }
0087
0088 static inline u32 atp_readl_base(struct atp_unit *atp, u8 reg)
0089 {
0090     return inl(atp->baseport + reg);
0091 }
0092
0093 static inline u8 atp_readb_io(struct atp_unit *atp, u8 channel, u8 reg)
0094 {
0095     return inb(atp->ioport[channel] + reg);
0096 }
0097
0098 static inline u16 atp_readw_io(struct atp_unit *atp, u8 channel, u8 reg)
0099 {
0100     return inw(atp->ioport[channel] + reg);
0101 }
0102
0103 static inline u8 atp_readb_pci(struct atp_unit *atp, u8 channel, u8 reg)
0104 {
0105     return inb(atp->pciport[channel] + reg);
0106 }
0107
0108 static inline bool is880(struct atp_unit *atp)
0109 {
0110     return atp->pdev->device == ATP880_DEVID1 ||
0111            atp->pdev->device == ATP880_DEVID2;
0112 }
0113
0114 static inline bool is885(struct atp_unit *atp)
0115 {
0116     return atp->pdev->device == ATP885_DEVID;
0117 }
0118
0119 static irqreturn_t atp870u_intr_handle(int irq, void *dev_id)
0120 {
0121     unsigned long flags;
0122     unsigned short int id;
0123     unsigned char i, j, c, target_id, lun,cmdp;
0124     unsigned char *prd;
0125     struct scsi_cmnd *workreq;
0126     unsigned long adrcnt, k;
0127 #ifdef ED_DBGP
0128     unsigned long l;
0129 #endif
0130     struct Scsi_Host *host = dev_id;
0131     struct atp_unit *dev = (struct atp_unit *)&host->hostdata;
0132
0133     for (c = 0; c < 2; c++) {
0134         j = atp_readb_io(dev, c, 0x1f);
0135         if ((j & 0x80) != 0)
0136             break;
0137         dev->in_int[c] = 0;
0138     }
0139     if ((j & 0x80) == 0)
0140         return IRQ_NONE;
0141 #ifdef ED_DBGP
0142     printk("atp870u_intr_handle enter\n");
0143 #endif
0144     dev->in_int[c] = 1;
0145     cmdp = atp_readb_io(dev, c, 0x10);
0146     if (dev->working[c] != 0) {
0147         if (is885(dev)) {
0148             if ((atp_readb_io(dev, c, 0x16) & 0x80) == 0)
0149                 atp_writeb_io(dev, c, 0x16,
0150                           (atp_readb_io(dev, c, 0x16) | 0x80));
0151         }
0152         if ((atp_readb_pci(dev, c, 0x00) & 0x08) != 0)
0153         {
0154             for (k=0; k < 1000; k++) {
0155                 if ((atp_readb_pci(dev, c, 2) & 0x08) == 0)
0156                     break;
0157                 if ((atp_readb_pci(dev, c, 2) & 0x01) == 0)
0158                     break;
0159             }
0160         }
0161         atp_writeb_pci(dev, c, 0, 0x00);
0162
0163         i = atp_readb_io(dev, c, 0x17);
0164
0165         if (is885(dev))
0166             atp_writeb_pci(dev, c, 2, 0x06);
0167
0168         target_id = atp_readb_io(dev, c, 0x15);
0169
0170         /*
0171          *  Remap wide devices onto id numbers
0172          */
0173
0174         if ((target_id & 0x40) != 0) {
0175             target_id = (target_id & 0x07) | 0x08;
0176         } else {
0177             target_id &= 0x07;
0178         }
0179
0180         if ((j & 0x40) != 0) {
0181              if (dev->last_cmd[c] == 0xff) {
0182             dev->last_cmd[c] = target_id;
0183              }
0184              dev->last_cmd[c] |= 0x40;
0185         }
0186         if (is885(dev))
0187             dev->r1f[c][target_id] |= j;
0188 #ifdef ED_DBGP
0189         printk("atp870u_intr_handle status = %x\n",i);
0190 #endif
0191         if (i == 0x85) {
0192             if ((dev->last_cmd[c] & 0xf0) != 0x40) {
0193                dev->last_cmd[c] = 0xff;
0194             }
0195             if (is885(dev)) {
0196                 adrcnt = 0;
0197                 ((unsigned char *) &adrcnt)[2] =
0198                     atp_readb_io(dev, c, 0x12);
0199                 ((unsigned char *) &adrcnt)[1] =
0200                     atp_readb_io(dev, c, 0x13);
0201                 ((unsigned char *) &adrcnt)[0] =
0202                     atp_readb_io(dev, c, 0x14);
0203                 if (dev->id[c][target_id].last_len != adrcnt) {
0204                     k = dev->id[c][target_id].last_len;
0205                     k -= adrcnt;
0206                     dev->id[c][target_id].tran_len = k;
0207                     dev->id[c][target_id].last_len = adrcnt;
0208                 }
0209 #ifdef ED_DBGP
0210                 printk("dev->id[c][target_id].last_len = %d "
0211                        "dev->id[c][target_id].tran_len = %d\n",
0212                        dev->id[c][target_id].last_len,
0213                        dev->id[c][target_id].tran_len);
0214 #endif
0215             }
0216
0217             /*
0218              *      Flip wide
0219              */
0220             if (dev->wide_id[c] != 0) {
0221                 atp_writeb_io(dev, c, 0x1b, 0x01);
0222                 while ((atp_readb_io(dev, c, 0x1b) & 0x01) != 0x01)
0223                     atp_writeb_io(dev, c, 0x1b, 0x01);
0224             }
0225             /*
0226              *  Issue more commands
0227              */
0228             spin_lock_irqsave(dev->host->host_lock, flags);
0229             if (((dev->quhd[c] != dev->quend[c]) ||
0230                  (dev->last_cmd[c] != 0xff)) &&
0231                 (dev->in_snd[c] == 0)) {
0232 #ifdef ED_DBGP
0233                 printk("Call sent_s870\n");
0234 #endif
0235                 send_s870(dev,c);
0236             }
0237             spin_unlock_irqrestore(dev->host->host_lock, flags);
0238             /*
0239              *  Done
0240              */
0241             dev->in_int[c] = 0;
0242 #ifdef ED_DBGP
0243                 printk("Status 0x85 return\n");
0244 #endif
0245             return IRQ_HANDLED;
0246         }
0247
0248         if (i == 0x40) {
0249              dev->last_cmd[c] |= 0x40;
0250              dev->in_int[c] = 0;
0251              return IRQ_HANDLED;
0252         }
0253
0254         if (i == 0x21) {
0255             if ((dev->last_cmd[c] & 0xf0) != 0x40) {
0256                dev->last_cmd[c] = 0xff;
0257             }
0258             adrcnt = 0;
0259             ((unsigned char *) &adrcnt)[2] =
0260                 atp_readb_io(dev, c, 0x12);
0261             ((unsigned char *) &adrcnt)[1] =
0262                 atp_readb_io(dev, c, 0x13);
0263             ((unsigned char *) &adrcnt)[0] =
0264                 atp_readb_io(dev, c, 0x14);
0265             k = dev->id[c][target_id].last_len;
0266             k -= adrcnt;
0267             dev->id[c][target_id].tran_len = k;
0268             dev->id[c][target_id].last_len = adrcnt;
0269             atp_writeb_io(dev, c, 0x10, 0x41);
0270             atp_writeb_io(dev, c, 0x18, 0x08);
0271             dev->in_int[c] = 0;
0272             return IRQ_HANDLED;
0273         }
0274
0275         if (is885(dev)) {
0276             if ((i == 0x4c) || (i == 0x4d) || (i == 0x8c) || (i == 0x8d)) {
0277                 if ((i == 0x4c) || (i == 0x8c))
0278                     i=0x48;
0279                 else
0280                     i=0x49;
0281             }
0282         }
0283         if ((i == 0x80) || (i == 0x8f)) {
0284 #ifdef ED_DBGP
0285             printk(KERN_DEBUG "Device reselect\n");
0286 #endif
0287             lun = 0;
0288             if (cmdp == 0x44 || i == 0x80)
0289                 lun = atp_readb_io(dev, c, 0x1d) & 0x07;
0290             else {
0291                 if ((dev->last_cmd[c] & 0xf0) != 0x40) {
0292                    dev->last_cmd[c] = 0xff;
0293                 }
0294                 if (cmdp == 0x41) {
0295 #ifdef ED_DBGP
0296                     printk("cmdp = 0x41\n");
0297 #endif
0298                     adrcnt = 0;
0299                     ((unsigned char *) &adrcnt)[2] =
0300                         atp_readb_io(dev, c, 0x12);
0301                     ((unsigned char *) &adrcnt)[1] =
0302                         atp_readb_io(dev, c, 0x13);
0303                     ((unsigned char *) &adrcnt)[0] =
0304                         atp_readb_io(dev, c, 0x14);
0305                     k = dev->id[c][target_id].last_len;
0306                     k -= adrcnt;
0307                     dev->id[c][target_id].tran_len = k;
0308                     dev->id[c][target_id].last_len = adrcnt;
0309                     atp_writeb_io(dev, c, 0x18, 0x08);
0310                     dev->in_int[c] = 0;
0311                     return IRQ_HANDLED;
0312                 } else {
0313 #ifdef ED_DBGP
0314                     printk("cmdp != 0x41\n");
0315 #endif
0316                     atp_writeb_io(dev, c, 0x10, 0x46);
0317                     dev->id[c][target_id].dirct = 0x00;
0318                     atp_writeb_io(dev, c, 0x12, 0x00);
0319                     atp_writeb_io(dev, c, 0x13, 0x00);
0320                     atp_writeb_io(dev, c, 0x14, 0x00);
0321                     atp_writeb_io(dev, c, 0x18, 0x08);
0322                     dev->in_int[c] = 0;
0323                     return IRQ_HANDLED;
0324                 }
0325             }
0326             if (dev->last_cmd[c] != 0xff) {
0327                dev->last_cmd[c] |= 0x40;
0328             }
0329             if (is885(dev)) {
0330                 j = atp_readb_base(dev, 0x29) & 0xfe;
0331                 atp_writeb_base(dev, 0x29, j);
0332             } else
0333                 atp_writeb_io(dev, c, 0x10, 0x45);
0334
0335             target_id = atp_readb_io(dev, c, 0x16);
0336             /*
0337              *  Remap wide identifiers
0338              */
0339             if ((target_id & 0x10) != 0) {
0340                 target_id = (target_id & 0x07) | 0x08;
0341             } else {
0342                 target_id &= 0x07;
0343             }
0344             if (is885(dev))
0345                 atp_writeb_io(dev, c, 0x10, 0x45);
0346             workreq = dev->id[c][target_id].curr_req;
0347 #ifdef ED_DBGP
0348             scmd_printk(KERN_DEBUG, workreq, "CDB");
0349             for (l = 0; l < workreq->cmd_len; l++)
0350                 printk(KERN_DEBUG " %x",workreq->cmnd[l]);
0351             printk("\n");
0352 #endif
0353
0354             atp_writeb_io(dev, c, 0x0f, lun);
0355             atp_writeb_io(dev, c, 0x11, dev->id[c][target_id].devsp);
0356             adrcnt = dev->id[c][target_id].tran_len;
0357             k = dev->id[c][target_id].last_len;
0358
0359             atp_writeb_io(dev, c, 0x12, ((unsigned char *) &k)[2]);
0360             atp_writeb_io(dev, c, 0x13, ((unsigned char *) &k)[1]);
0361             atp_writeb_io(dev, c, 0x14, ((unsigned char *) &k)[0]);
0362 #ifdef ED_DBGP
0363             printk("k %x, k[0] 0x%x k[1] 0x%x k[2] 0x%x\n", k,
0364                    atp_readb_io(dev, c, 0x14),
0365                    atp_readb_io(dev, c, 0x13),
0366                    atp_readb_io(dev, c, 0x12));
0367 #endif
0368             /* Remap wide */
0369             j = target_id;
0370             if (target_id > 7) {
0371                 j = (j & 0x07) | 0x40;
0372             }
0373             /* Add direction */
0374             j |= dev->id[c][target_id].dirct;
0375             atp_writeb_io(dev, c, 0x15, j);
0376             atp_writeb_io(dev, c, 0x16, 0x80);
0377
0378             /* enable 32 bit fifo transfer */
0379             if (is885(dev)) {
0380                 i = atp_readb_pci(dev, c, 1) & 0xf3;
0381                 //j=workreq->cmnd[0];
0382                 if ((workreq->cmnd[0] == READ_6) ||
0383                     (workreq->cmnd[0] == READ_10) ||
0384                     (workreq->cmnd[0] == WRITE_6) ||
0385                     (workreq->cmnd[0] == WRITE_10)) {
0386                    i |= 0x0c;
0387                 }
0388                 atp_writeb_pci(dev, c, 1, i);
0389             } else if (is880(dev)) {
0390                 if ((workreq->cmnd[0] == READ_6) ||
0391                     (workreq->cmnd[0] == READ_10) ||
0392                     (workreq->cmnd[0] == WRITE_6) ||
0393                     (workreq->cmnd[0] == WRITE_10))
0394                     atp_writeb_base(dev, 0x3b,
0395                             (atp_readb_base(dev, 0x3b) & 0x3f) | 0xc0);
0396                 else
0397                     atp_writeb_base(dev, 0x3b,
0398                             atp_readb_base(dev, 0x3b) & 0x3f);
0399             } else {
0400                 if ((workreq->cmnd[0] == READ_6) ||
0401                     (workreq->cmnd[0] == READ_10) ||
0402                     (workreq->cmnd[0] == WRITE_6) ||
0403                     (workreq->cmnd[0] == WRITE_10))
0404                     atp_writeb_base(dev, 0x3a,
0405                             (atp_readb_base(dev, 0x3a) & 0xf3) | 0x08);
0406                 else
0407                     atp_writeb_base(dev, 0x3a,
0408                             atp_readb_base(dev, 0x3a) & 0xf3);
0409             }
0410             j = 0;
0411             id = 1;
0412             id = id << target_id;
0413             /*
0414              *  Is this a wide device
0415              */
0416             if ((id & dev->wide_id[c]) != 0) {
0417                 j |= 0x01;
0418             }
0419             atp_writeb_io(dev, c, 0x1b, j);
0420             while ((atp_readb_io(dev, c, 0x1b) & 0x01) != j)
0421                 atp_writeb_io(dev, c, 0x1b, j);
0422             if (dev->id[c][target_id].last_len == 0) {
0423                 atp_writeb_io(dev, c, 0x18, 0x08);
0424                 dev->in_int[c] = 0;
0425 #ifdef ED_DBGP
0426                 printk("dev->id[c][target_id].last_len = 0\n");
0427 #endif
0428                 return IRQ_HANDLED;
0429             }
0430 #ifdef ED_DBGP
0431             printk("target_id = %d adrcnt = %d\n",target_id,adrcnt);
0432 #endif
0433             prd = dev->id[c][target_id].prd_pos;
0434             while (adrcnt != 0) {
0435                 id = ((unsigned short int *)prd)[2];
0436                 if (id == 0) {
0437                     k = 0x10000;
0438                 } else {
0439                     k = id;
0440                 }
0441                 if (k > adrcnt) {
0442                     ((unsigned short int *)prd)[2] =
0443                         (unsigned short int)(k - adrcnt);
0444                     ((unsigned long *)prd)[0] += adrcnt;
0445                     adrcnt = 0;
0446                     dev->id[c][target_id].prd_pos = prd;
0447                 } else {
0448                     adrcnt -= k;
0449                     dev->id[c][target_id].prdaddr += 0x08;
0450                     prd += 0x08;
0451                     if (adrcnt == 0) {
0452                         dev->id[c][target_id].prd_pos = prd;
0453                     }
0454                 }
0455             }
0456             atp_writel_pci(dev, c, 0x04, dev->id[c][target_id].prdaddr);
0457 #ifdef ED_DBGP
0458             printk("dev->id[%d][%d].prdaddr 0x%8x\n",
0459                    c, target_id, dev->id[c][target_id].prdaddr);
0460 #endif
0461             if (!is885(dev)) {
0462                 atp_writeb_pci(dev, c, 2, 0x06);
0463                 atp_writeb_pci(dev, c, 2, 0x00);
0464             }
0465             /*
0466              *  Check transfer direction
0467              */
0468             if (dev->id[c][target_id].dirct != 0) {
0469                 atp_writeb_io(dev, c, 0x18, 0x08);
0470                 atp_writeb_pci(dev, c, 0, 0x01);
0471                 dev->in_int[c] = 0;
0472 #ifdef ED_DBGP
0473                 printk("status 0x80 return dirct != 0\n");
0474 #endif
0475                 return IRQ_HANDLED;
0476             }
0477             atp_writeb_io(dev, c, 0x18, 0x08);
0478             atp_writeb_pci(dev, c, 0, 0x09);
0479             dev->in_int[c] = 0;
0480 #ifdef ED_DBGP
0481             printk("status 0x80 return dirct = 0\n");
0482 #endif
0483             return IRQ_HANDLED;
0484         }
0485
0486         /*
0487          *  Current scsi request on this target
0488          */
0489
0490         workreq = dev->id[c][target_id].curr_req;
0491
0492         if (i == 0x42 || i == 0x16) {
0493             if ((dev->last_cmd[c] & 0xf0) != 0x40) {
0494                dev->last_cmd[c] = 0xff;
0495             }
0496             if (i == 0x16) {
0497                 workreq->result = atp_readb_io(dev, c, 0x0f);
0498                 if (((dev->r1f[c][target_id] & 0x10) != 0) && is885(dev)) {
0499                     printk(KERN_WARNING "AEC67162 CRC ERROR !\n");
0500                     workreq->result = SAM_STAT_CHECK_CONDITION;
0501                 }
0502             } else
0503                 workreq->result = SAM_STAT_CHECK_CONDITION;
0504
0505             if (is885(dev)) {
0506                 j = atp_readb_base(dev, 0x29) | 0x01;
0507                 atp_writeb_base(dev, 0x29, j);
0508             }
0509             /*
0510              *  Complete the command
0511              */
0512             scsi_dma_unmap(workreq);
0513
0514             spin_lock_irqsave(dev->host->host_lock, flags);
0515             scsi_done(workreq);
0516 #ifdef ED_DBGP
0517                printk("workreq->scsi_done\n");
0518 #endif
0519             /*
0520              *  Clear it off the queue
0521              */
0522             dev->id[c][target_id].curr_req = NULL;
0523             dev->working[c]--;
0524             spin_unlock_irqrestore(dev->host->host_lock, flags);
0525             /*
0526              *      Take it back wide
0527              */
0528             if (dev->wide_id[c] != 0) {
0529                 atp_writeb_io(dev, c, 0x1b, 0x01);
0530                 while ((atp_readb_io(dev, c, 0x1b) & 0x01) != 0x01)
0531                     atp_writeb_io(dev, c, 0x1b, 0x01);
0532             }
0533             /*
0534              *  If there is stuff to send and nothing going then send it
0535              */
0536             spin_lock_irqsave(dev->host->host_lock, flags);
0537             if (((dev->last_cmd[c] != 0xff) ||
0538                  (dev->quhd[c] != dev->quend[c])) &&
0539                 (dev->in_snd[c] == 0)) {
0540 #ifdef ED_DBGP
0541                printk("Call sent_s870(scsi_done)\n");
0542 #endif
0543                send_s870(dev,c);
0544             }
0545             spin_unlock_irqrestore(dev->host->host_lock, flags);
0546             dev->in_int[c] = 0;
0547             return IRQ_HANDLED;
0548         }
0549         if ((dev->last_cmd[c] & 0xf0) != 0x40) {
0550            dev->last_cmd[c] = 0xff;
0551         }
0552         if (i == 0x4f) {
0553             i = 0x89;
0554         }
0555         i &= 0x0f;
0556         if (i == 0x09) {
0557             atp_writel_pci(dev, c, 4, dev->id[c][target_id].prdaddr);
0558             atp_writeb_pci(dev, c, 2, 0x06);
0559             atp_writeb_pci(dev, c, 2, 0x00);
0560             atp_writeb_io(dev, c, 0x10, 0x41);
0561             if (is885(dev)) {
0562                 k = dev->id[c][target_id].last_len;
0563                 atp_writeb_io(dev, c, 0x12,
0564                           ((unsigned char *) (&k))[2]);
0565                 atp_writeb_io(dev, c, 0x13,
0566                           ((unsigned char *) (&k))[1]);
0567                 atp_writeb_io(dev, c, 0x14,
0568                           ((unsigned char *) (&k))[0]);
0569                 dev->id[c][target_id].dirct = 0x00;
0570             } else {
0571                 dev->id[c][target_id].dirct = 0x00;
0572             }
0573             atp_writeb_io(dev, c, 0x18, 0x08);
0574             atp_writeb_pci(dev, c, 0, 0x09);
0575             dev->in_int[c] = 0;
0576             return IRQ_HANDLED;
0577         }
0578         if (i == 0x08) {
0579             atp_writel_pci(dev, c, 4, dev->id[c][target_id].prdaddr);
0580             atp_writeb_pci(dev, c, 2, 0x06);
0581             atp_writeb_pci(dev, c, 2, 0x00);
0582             atp_writeb_io(dev, c, 0x10, 0x41);
0583             if (is885(dev)) {
0584                 k = dev->id[c][target_id].last_len;
0585                 atp_writeb_io(dev, c, 0x12,
0586                           ((unsigned char *) (&k))[2]);
0587                 atp_writeb_io(dev, c, 0x13,
0588                           ((unsigned char *) (&k))[1]);
0589                 atp_writeb_io(dev, c, 0x14,
0590                           ((unsigned char *) (&k))[0]);
0591             }
0592             atp_writeb_io(dev, c, 0x15,
0593                       atp_readb_io(dev, c, 0x15) | 0x20);
0594             dev->id[c][target_id].dirct = 0x20;
0595             atp_writeb_io(dev, c, 0x18, 0x08);
0596             atp_writeb_pci(dev, c, 0, 0x01);
0597             dev->in_int[c] = 0;
0598             return IRQ_HANDLED;
0599         }
0600         if (i == 0x0a)
0601             atp_writeb_io(dev, c, 0x10, 0x30);
0602         else
0603             atp_writeb_io(dev, c, 0x10, 0x46);
0604         dev->id[c][target_id].dirct = 0x00;
0605         atp_writeb_io(dev, c, 0x12, 0x00);
0606         atp_writeb_io(dev, c, 0x13, 0x00);
0607         atp_writeb_io(dev, c, 0x14, 0x00);
0608         atp_writeb_io(dev, c, 0x18, 0x08);
0609     }
0610     dev->in_int[c] = 0;
0611
0612     return IRQ_HANDLED;
0613 }
0614 /**
0615  *  atp870u_queuecommand_lck -  Queue SCSI command
0616  *  @req_p: request block
0617  *
0618  *  Queue a command to the ATP queue. Called with the host lock held.
0619  */
0620 static int atp870u_queuecommand_lck(struct scsi_cmnd *req_p)
0621 {
0622     void (*done)(struct scsi_cmnd *) = scsi_done;
0623     unsigned char c;
0624     unsigned int m;
0625     struct atp_unit *dev;
0626     struct Scsi_Host *host;
0627
0628     c = scmd_channel(req_p);
0629     req_p->sense_buffer[0]=0;
0630     scsi_set_resid(req_p, 0);
0631     if (scmd_channel(req_p) > 1) {
0632         req_p->result = DID_BAD_TARGET << 16;
0633         done(req_p);
0634 #ifdef ED_DBGP
0635         printk("atp870u_queuecommand : req_p->device->channel > 1\n");
0636 #endif
0637         return 0;
0638     }
0639
0640     host = req_p->device->host;
0641     dev = (struct atp_unit *)&host->hostdata;
0642
0643     m = 1;
0644     m = m << scmd_id(req_p);
0645
0646     /*
0647      *      Fake a timeout for missing targets
0648      */
0649
0650     if ((m & dev->active_id[c]) == 0) {
0651         req_p->result = DID_BAD_TARGET << 16;
0652         done(req_p);
0653         return 0;
0654     }
0655
0656     /*
0657      *  Count new command
0658      */
0659     dev->quend[c]++;
0660     if (dev->quend[c] >= qcnt) {
0661         dev->quend[c] = 0;
0662     }
0663
0664     /*
0665      *  Check queue state
0666      */
0667     if (dev->quhd[c] == dev->quend[c]) {
0668         if (dev->quend[c] == 0) {
0669             dev->quend[c] = qcnt;
0670         }
0671 #ifdef ED_DBGP
0672         printk("atp870u_queuecommand : dev->quhd[c] == dev->quend[c]\n");
0673 #endif
0674         dev->quend[c]--;
0675         req_p->result = DID_BUS_BUSY << 16;
0676         done(req_p);
0677         return 0;
0678     }
0679     dev->quereq[c][dev->quend[c]] = req_p;
0680 #ifdef ED_DBGP
0681     printk("dev->ioport[c] = %x atp_readb_io(dev, c, 0x1c) = %x "
0682            "dev->in_int[%d] = %d dev->in_snd[%d] = %d\n",
0683            dev->ioport[c], atp_readb_io(dev, c, 0x1c), c,
0684            dev->in_int[c],c,dev->in_snd[c]);
0685 #endif
0686     if ((atp_readb_io(dev, c, 0x1c) == 0) &&
0687         (dev->in_int[c] == 0) &&
0688         (dev->in_snd[c] == 0)) {
0689 #ifdef ED_DBGP
0690         printk("Call sent_s870(atp870u_queuecommand)\n");
0691 #endif
0692         send_s870(dev,c);
0693     }
0694 #ifdef ED_DBGP
0695     printk("atp870u_queuecommand : exit\n");
0696 #endif
0697     return 0;
0698 }
0699
0700 static DEF_SCSI_QCMD(atp870u_queuecommand)
0701
0702 /*
0703  *  send_s870   -   send a command to the controller
0704  *
0705  *  On entry there is work queued to be done. We move some of that work to the
0706  *  controller itself.
0707  *
0708  *  Caller holds the host lock.
0709  */
0710 static void send_s870(struct atp_unit *dev, unsigned char c)
0711 {
0712     struct scsi_cmnd *workreq = NULL;
0713     unsigned int i;//,k;
0714     unsigned char  j, target_id;
0715     unsigned char *prd;
0716     unsigned short int w;
0717     unsigned long l, bttl = 0;
0718     unsigned long  sg_count;
0719
0720     if (dev->in_snd[c] != 0) {
0721 #ifdef ED_DBGP
0722         printk("cmnd in_snd\n");
0723 #endif
0724         return;
0725     }
0726 #ifdef ED_DBGP
0727     printk("Sent_s870 enter\n");
0728 #endif
0729     dev->in_snd[c] = 1;
0730     if ((dev->last_cmd[c] != 0xff) && ((dev->last_cmd[c] & 0x40) != 0)) {
0731         dev->last_cmd[c] &= 0x0f;
0732         workreq = dev->id[c][dev->last_cmd[c]].curr_req;
0733         if (!workreq) {
0734             dev->last_cmd[c] = 0xff;
0735             if (dev->quhd[c] == dev->quend[c]) {
0736                 dev->in_snd[c] = 0;
0737                 return;
0738             }
0739         }
0740     }
0741     if (!workreq) {
0742         if ((dev->last_cmd[c] != 0xff) && (dev->working[c] != 0)) {
0743             dev->in_snd[c] = 0;
0744             return;
0745         }
0746         dev->working[c]++;
0747         j = dev->quhd[c];
0748         dev->quhd[c]++;
0749         if (dev->quhd[c] >= qcnt)
0750             dev->quhd[c] = 0;
0751         workreq = dev->quereq[c][dev->quhd[c]];
0752         if (dev->id[c][scmd_id(workreq)].curr_req != NULL) {
0753             dev->quhd[c] = j;
0754             dev->working[c]--;
0755             dev->in_snd[c] = 0;
0756             return;
0757         }
0758         dev->id[c][scmd_id(workreq)].curr_req = workreq;
0759         dev->last_cmd[c] = scmd_id(workreq);
0760     }
0761     if ((atp_readb_io(dev, c, 0x1f) & 0xb0) != 0 ||
0762         atp_readb_io(dev, c, 0x1c) != 0) {
0763 #ifdef ED_DBGP
0764         printk("Abort to Send\n");
0765 #endif
0766         dev->last_cmd[c] |= 0x40;
0767         dev->in_snd[c] = 0;
0768         return;
0769     }
0770 #ifdef ED_DBGP
0771     printk("OK to Send\n");
0772     scmd_printk(KERN_DEBUG, workreq, "CDB");
0773     for(i=0;i<workreq->cmd_len;i++) {
0774         printk(" %x",workreq->cmnd[i]);
0775     }
0776     printk("\n");
0777 #endif
0778     l = scsi_bufflen(workreq);
0779
0780     if (is885(dev)) {
0781         j = atp_readb_base(dev, 0x29) & 0xfe;
0782         atp_writeb_base(dev, 0x29, j);
0783         dev->r1f[c][scmd_id(workreq)] = 0;
0784     }
0785
0786     if (workreq->cmnd[0] == READ_CAPACITY) {
0787         if (l > 8)
0788             l = 8;
0789     }
0790     if (workreq->cmnd[0] == TEST_UNIT_READY) {
0791         l = 0;
0792     }
0793
0794     j = 0;
0795     target_id = scmd_id(workreq);
0796
0797     /*
0798      *  Wide ?
0799      */
0800     w = 1;
0801     w = w << target_id;
0802     if ((w & dev->wide_id[c]) != 0) {
0803         j |= 0x01;
0804     }
0805     atp_writeb_io(dev, c, 0x1b, j);
0806     while ((atp_readb_io(dev, c, 0x1b) & 0x01) != j) {
0807         atp_writeb_pci(dev, c, 0x1b, j);
0808 #ifdef ED_DBGP
0809         printk("send_s870 while loop 1\n");
0810 #endif
0811     }
0812     /*
0813      *  Write the command
0814      */
0815
0816     atp_writeb_io(dev, c, 0x00, workreq->cmd_len);
0817     atp_writeb_io(dev, c, 0x01, 0x2c);
0818     if (is885(dev))
0819         atp_writeb_io(dev, c, 0x02, 0x7f);
0820     else
0821         atp_writeb_io(dev, c, 0x02, 0xcf);
0822     for (i = 0; i < workreq->cmd_len; i++)
0823         atp_writeb_io(dev, c, 0x03 + i, workreq->cmnd[i]);
0824     atp_writeb_io(dev, c, 0x0f, workreq->device->lun);
0825     /*
0826      *  Write the target
0827      */
0828     atp_writeb_io(dev, c, 0x11, dev->id[c][target_id].devsp);
0829 #ifdef ED_DBGP
0830     printk("dev->id[%d][%d].devsp = %2x\n",c,target_id,
0831            dev->id[c][target_id].devsp);
0832 #endif
0833
0834     sg_count = scsi_dma_map(workreq);
0835     /*
0836      *  Write transfer size
0837      */
0838     atp_writeb_io(dev, c, 0x12, ((unsigned char *) (&l))[2]);
0839     atp_writeb_io(dev, c, 0x13, ((unsigned char *) (&l))[1]);
0840     atp_writeb_io(dev, c, 0x14, ((unsigned char *) (&l))[0]);
0841     j = target_id;
0842     dev->id[c][j].last_len = l;
0843     dev->id[c][j].tran_len = 0;
0844 #ifdef ED_DBGP
0845     printk("dev->id[%2d][%2d].last_len = %d\n",c,j,dev->id[c][j].last_len);
0846 #endif
0847     /*
0848      *  Flip the wide bits
0849      */
0850     if ((j & 0x08) != 0) {
0851         j = (j & 0x07) | 0x40;
0852     }
0853     /*
0854      *  Check transfer direction
0855      */
0856     if (workreq->sc_data_direction == DMA_TO_DEVICE)
0857         atp_writeb_io(dev, c, 0x15, j | 0x20);
0858     else
0859         atp_writeb_io(dev, c, 0x15, j);
0860     atp_writeb_io(dev, c, 0x16, atp_readb_io(dev, c, 0x16) | 0x80);
0861     atp_writeb_io(dev, c, 0x16, 0x80);
0862     dev->id[c][target_id].dirct = 0;
0863     if (l == 0) {
0864         if (atp_readb_io(dev, c, 0x1c) == 0) {
0865 #ifdef ED_DBGP
0866             printk("change SCSI_CMD_REG 0x08\n");
0867 #endif
0868             atp_writeb_io(dev, c, 0x18, 0x08);
0869         } else
0870             dev->last_cmd[c] |= 0x40;
0871         dev->in_snd[c] = 0;
0872         return;
0873     }
0874     prd = dev->id[c][target_id].prd_table;
0875     dev->id[c][target_id].prd_pos = prd;
0876
0877     /*
0878      *  Now write the request list. Either as scatter/gather or as
0879      *  a linear chain.
0880      */
0881
0882     if (l) {
0883         struct scatterlist *sgpnt;
0884         i = 0;
0885         scsi_for_each_sg(workreq, sgpnt, sg_count, j) {
0886             bttl = sg_dma_address(sgpnt);
0887             l=sg_dma_len(sgpnt);
0888 #ifdef ED_DBGP
0889             printk("1. bttl %x, l %x\n",bttl, l);
0890 #endif
0891             while (l > 0x10000) {
0892                 (((u16 *) (prd))[i + 3]) = 0x0000;
0893                 (((u16 *) (prd))[i + 2]) = 0x0000;
0894                 (((u32 *) (prd))[i >> 1]) = cpu_to_le32(bttl);
0895                 l -= 0x10000;
0896                 bttl += 0x10000;
0897                 i += 0x04;
0898             }
0899             (((u32 *) (prd))[i >> 1]) = cpu_to_le32(bttl);
0900             (((u16 *) (prd))[i + 2]) = cpu_to_le16(l);
0901             (((u16 *) (prd))[i + 3]) = 0;
0902             i += 0x04;
0903         }
0904         (((u16 *) (prd))[i - 1]) = cpu_to_le16(0x8000);
0905 #ifdef ED_DBGP
0906         printk("prd %4x %4x %4x %4x\n",
0907                (((unsigned short int *)prd)[0]),
0908                (((unsigned short int *)prd)[1]),
0909                (((unsigned short int *)prd)[2]),
0910                (((unsigned short int *)prd)[3]));
0911         printk("2. bttl %x, l %x\n",bttl, l);
0912 #endif
0913     }
0914 #ifdef ED_DBGP
0915     printk("send_s870: prdaddr_2 0x%8x target_id %d\n",
0916            dev->id[c][target_id].prdaddr,target_id);
0917 #endif
0918     dev->id[c][target_id].prdaddr = dev->id[c][target_id].prd_bus;
0919     atp_writel_pci(dev, c, 4, dev->id[c][target_id].prdaddr);
0920     atp_writeb_pci(dev, c, 2, 0x06);
0921     atp_writeb_pci(dev, c, 2, 0x00);
0922     if (is885(dev)) {
0923         j = atp_readb_pci(dev, c, 1) & 0xf3;
0924         if ((workreq->cmnd[0] == READ_6) ||
0925             (workreq->cmnd[0] == READ_10) ||
0926             (workreq->cmnd[0] == WRITE_6) ||
0927             (workreq->cmnd[0] == WRITE_10)) {
0928             j |= 0x0c;
0929         }
0930         atp_writeb_pci(dev, c, 1, j);
0931     } else if (is880(dev)) {
0932         if ((workreq->cmnd[0] == READ_6) ||
0933             (workreq->cmnd[0] == READ_10) ||
0934             (workreq->cmnd[0] == WRITE_6) ||
0935             (workreq->cmnd[0] == WRITE_10))
0936             atp_writeb_base(dev, 0x3b,
0937                     (atp_readb_base(dev, 0x3b) & 0x3f) | 0xc0);
0938         else
0939             atp_writeb_base(dev, 0x3b,
0940                     atp_readb_base(dev, 0x3b) & 0x3f);
0941     } else {
0942         if ((workreq->cmnd[0] == READ_6) ||
0943             (workreq->cmnd[0] == READ_10) ||
0944             (workreq->cmnd[0] == WRITE_6) ||
0945             (workreq->cmnd[0] == WRITE_10))
0946             atp_writeb_base(dev, 0x3a,
0947                     (atp_readb_base(dev, 0x3a) & 0xf3) | 0x08);
0948         else
0949             atp_writeb_base(dev, 0x3a,
0950                     atp_readb_base(dev, 0x3a) & 0xf3);
0951     }
0952
0953     if(workreq->sc_data_direction == DMA_TO_DEVICE) {
0954         dev->id[c][target_id].dirct = 0x20;
0955         if (atp_readb_io(dev, c, 0x1c) == 0) {
0956             atp_writeb_io(dev, c, 0x18, 0x08);
0957             atp_writeb_pci(dev, c, 0, 0x01);
0958 #ifdef ED_DBGP
0959         printk( "start DMA(to target)\n");
0960 #endif
0961         } else {
0962             dev->last_cmd[c] |= 0x40;
0963         }
0964         dev->in_snd[c] = 0;
0965         return;
0966     }
0967     if (atp_readb_io(dev, c, 0x1c) == 0) {
0968         atp_writeb_io(dev, c, 0x18, 0x08);
0969         atp_writeb_pci(dev, c, 0, 0x09);
0970 #ifdef ED_DBGP
0971         printk( "start DMA(to host)\n");
0972 #endif
0973     } else {
0974         dev->last_cmd[c] |= 0x40;
0975     }
0976     dev->in_snd[c] = 0;
0977     return;
0978
0979 }
0980
0981 static unsigned char fun_scam(struct atp_unit *dev, unsigned short int *val)
0982 {
0983     unsigned short int i, k;
0984     unsigned char j;
0985
0986     atp_writew_io(dev, 0, 0x1c, *val);
0987     for (i = 0; i < 10; i++) {  /* stable >= bus settle delay(400 ns)  */
0988         k = atp_readw_io(dev, 0, 0x1c);
0989         j = (unsigned char) (k >> 8);
0990         if ((k & 0x8000) != 0)  /* DB7 all release?    */
0991             i = 0;
0992     }
0993     *val |= 0x4000;     /* assert DB6           */
0994     atp_writew_io(dev, 0, 0x1c, *val);
0995     *val &= 0xdfff;     /* assert DB5           */
0996     atp_writew_io(dev, 0, 0x1c, *val);
0997     for (i = 0; i < 10; i++) {  /* stable >= bus settle delay(400 ns) */
0998         if ((atp_readw_io(dev, 0, 0x1c) & 0x2000) != 0) /* DB5 all release?       */
0999             i = 0;
1000     }
1001     *val |= 0x8000;     /* no DB4-0, assert DB7    */
1002     *val &= 0xe0ff;
1003     atp_writew_io(dev, 0, 0x1c, *val);
1004     *val &= 0xbfff;     /* release DB6             */
1005     atp_writew_io(dev, 0, 0x1c, *val);
1006     for (i = 0; i < 10; i++) {  /* stable >= bus settle delay(400 ns)  */
1007         if ((atp_readw_io(dev, 0, 0x1c) & 0x4000) != 0) /* DB6 all release?  */
1008             i = 0;
1009     }
1010
1011     return j;
1012 }
1013
1014 static void tscam(struct Scsi_Host *host, bool wide_chip, u8 scam_on)
1015 {
1016
1017     unsigned char i, j, k;
1018     unsigned long n;
1019     unsigned short int m, assignid_map, val;
1020     unsigned char mbuf[33], quintet[2];
1021     struct atp_unit *dev = (struct atp_unit *)&host->hostdata;
1022     static unsigned char g2q_tab[8] = {
1023         0x38, 0x31, 0x32, 0x2b, 0x34, 0x2d, 0x2e, 0x27
1024     };
1025
1026 /*  I can't believe we need this before we've even done anything.  Remove it
1027  *  and see if anyone bitches.
1028     for (i = 0; i < 0x10; i++) {
1029         udelay(0xffff);
1030     }
1031  */
1032
1033     atp_writeb_io(dev, 0, 1, 0x08);
1034     atp_writeb_io(dev, 0, 2, 0x7f);
1035     atp_writeb_io(dev, 0, 0x11, 0x20);
1036
1037     if ((scam_on & 0x40) == 0) {
1038         return;
1039     }
1040     m = 1;
1041     m <<= dev->host_id[0];
1042     j = 16;
1043     if (!wide_chip) {
1044         m |= 0xff00;
1045         j = 8;
1046     }
1047     assignid_map = m;
1048     atp_writeb_io(dev, 0, 0x02, 0x02);  /* 2*2=4ms,3EH 2/32*3E=3.9ms */
1049     atp_writeb_io(dev, 0, 0x03, 0);
1050     atp_writeb_io(dev, 0, 0x04, 0);
1051     atp_writeb_io(dev, 0, 0x05, 0);
1052     atp_writeb_io(dev, 0, 0x06, 0);
1053     atp_writeb_io(dev, 0, 0x07, 0);
1054     atp_writeb_io(dev, 0, 0x08, 0);
1055
1056     for (i = 0; i < j; i++) {
1057         m = 1;
1058         m = m << i;
1059         if ((m & assignid_map) != 0) {
1060             continue;
1061         }
1062         atp_writeb_io(dev, 0, 0x0f, 0);
1063         atp_writeb_io(dev, 0, 0x12, 0);
1064         atp_writeb_io(dev, 0, 0x13, 0);
1065         atp_writeb_io(dev, 0, 0x14, 0);
1066         if (i > 7) {
1067             k = (i & 0x07) | 0x40;
1068         } else {
1069             k = i;
1070         }
1071         atp_writeb_io(dev, 0, 0x15, k);
1072         if (wide_chip)
1073             atp_writeb_io(dev, 0, 0x1b, 0x01);
1074         else
1075             atp_writeb_io(dev, 0, 0x1b, 0x00);
1076         do {
1077             atp_writeb_io(dev, 0, 0x18, 0x09);
1078
1079             while ((atp_readb_io(dev, 0, 0x1f) & 0x80) == 0x00)
1080                 cpu_relax();
1081             k = atp_readb_io(dev, 0, 0x17);
1082             if ((k == 0x85) || (k == 0x42))
1083                 break;
1084             if (k != 0x16)
1085                 atp_writeb_io(dev, 0, 0x10, 0x41);
1086         } while (k != 0x16);
1087         if ((k == 0x85) || (k == 0x42))
1088             continue;
1089         assignid_map |= m;
1090
1091     }
1092     atp_writeb_io(dev, 0, 0x02, 0x7f);
1093     atp_writeb_io(dev, 0, 0x1b, 0x02);
1094
1095     udelay(2);
1096
1097     val = 0x0080;       /* bsy  */
1098     atp_writew_io(dev, 0, 0x1c, val);
1099     val |= 0x0040;      /* sel  */
1100     atp_writew_io(dev, 0, 0x1c, val);
1101     val |= 0x0004;      /* msg  */
1102     atp_writew_io(dev, 0, 0x1c, val);
1103     udelay(2);      /* 2 deskew delay(45ns*2=90ns) */
1104     val &= 0x007f;      /* no bsy  */
1105     atp_writew_io(dev, 0, 0x1c, val);
1106     msleep(128);
1107     val &= 0x00fb;      /* after 1ms no msg */
1108     atp_writew_io(dev, 0, 0x1c, val);
1109     while ((atp_readb_io(dev, 0, 0x1c) & 0x04) != 0)
1110         ;
1111     udelay(2);
1112     udelay(100);
1113     for (n = 0; n < 0x30000; n++)
1114         if ((atp_readb_io(dev, 0, 0x1c) & 0x80) != 0)   /* bsy ? */
1115             break;
1116     if (n < 0x30000)
1117         for (n = 0; n < 0x30000; n++)
1118             if ((atp_readb_io(dev, 0, 0x1c) & 0x81) == 0x0081) {
1119                 udelay(2);
1120                 val |= 0x8003;      /* io,cd,db7  */
1121                 atp_writew_io(dev, 0, 0x1c, val);
1122                 udelay(2);
1123                 val &= 0x00bf;      /* no sel     */
1124                 atp_writew_io(dev, 0, 0x1c, val);
1125                 udelay(2);
1126                 break;
1127             }
1128     while (1) {
1129     /*
1130      * The funny division into multiple delays is to accomodate
1131      * arches like ARM where udelay() multiplies its argument by
1132      * a large number to initialize a loop counter.  To avoid
1133      * overflow, the maximum supported udelay is 2000 microseconds.
1134      *
1135      * XXX it would be more polite to find a way to use msleep()
1136      */
1137     mdelay(2);
1138     udelay(48);
1139     if ((atp_readb_io(dev, 0, 0x1c) & 0x80) == 0x00) {  /* bsy ? */
1140         atp_writew_io(dev, 0, 0x1c, 0);
1141         atp_writeb_io(dev, 0, 0x1b, 0);
1142         atp_writeb_io(dev, 0, 0x15, 0);
1143         atp_writeb_io(dev, 0, 0x18, 0x09);
1144         while ((atp_readb_io(dev, 0, 0x1f) & 0x80) == 0)
1145             cpu_relax();
1146         atp_readb_io(dev, 0, 0x17);
1147         return;
1148     }
1149     val &= 0x00ff;      /* synchronization  */
1150     val |= 0x3f00;
1151     fun_scam(dev, &val);
1152     udelay(2);
1153     val &= 0x00ff;      /* isolation        */
1154     val |= 0x2000;
1155     fun_scam(dev, &val);
1156     udelay(2);
1157     i = 8;
1158     j = 0;
1159
1160     while (1) {
1161         if ((atp_readw_io(dev, 0, 0x1c) & 0x2000) == 0)
1162             continue;
1163         udelay(2);
1164         val &= 0x00ff;      /* get ID_STRING */
1165         val |= 0x2000;
1166         k = fun_scam(dev, &val);
1167         if ((k & 0x03) == 0)
1168             break;
1169         mbuf[j] <<= 0x01;
1170         mbuf[j] &= 0xfe;
1171         if ((k & 0x02) != 0)
1172             mbuf[j] |= 0x01;
1173         i--;
1174         if (i > 0)
1175             continue;
1176         j++;
1177         i = 8;
1178     }
1179
1180     /* isolation complete..  */
1181 /*    mbuf[32]=0;
1182     printk(" \n%x %x %x %s\n ",assignid_map,mbuf[0],mbuf[1],&mbuf[2]); */
1183     i = 15;
1184     j = mbuf[0];
1185     if ((j & 0x20) != 0) {  /* bit5=1:ID up to 7      */
1186         i = 7;
1187     }
1188     if ((j & 0x06) != 0) {  /* IDvalid?             */
1189         k = mbuf[1];
1190         while (1) {
1191             m = 1;
1192             m <<= k;
1193             if ((m & assignid_map) == 0)
1194                 break;
1195             if (k > 0)
1196                 k--;
1197             else
1198                 break;
1199         }
1200     }
1201     if ((m & assignid_map) != 0) {  /* srch from max acceptable ID#  */
1202         k = i;          /* max acceptable ID#            */
1203         while (1) {
1204             m = 1;
1205             m <<= k;
1206             if ((m & assignid_map) == 0)
1207                 break;
1208             if (k > 0)
1209                 k--;
1210             else
1211                 break;
1212         }
1213     }
1214     /* k=binID#,       */
1215     assignid_map |= m;
1216     if (k < 8) {
1217         quintet[0] = 0x38;  /* 1st dft ID<8    */
1218     } else {
1219         quintet[0] = 0x31;  /* 1st  ID>=8      */
1220     }
1221     k &= 0x07;
1222     quintet[1] = g2q_tab[k];
1223
1224     val &= 0x00ff;      /* AssignID 1stQuintet,AH=001xxxxx  */
1225     m = quintet[0] << 8;
1226     val |= m;
1227     fun_scam(dev, &val);
1228     val &= 0x00ff;      /* AssignID 2ndQuintet,AH=001xxxxx */
1229     m = quintet[1] << 8;
1230     val |= m;
1231     fun_scam(dev, &val);
1232
1233     }
1234 }
1235
1236 static void atp870u_free_tables(struct Scsi_Host *host)
1237 {
1238     struct atp_unit *atp_dev = (struct atp_unit *)&host->hostdata;
1239     int j, k;
1240     for (j=0; j < 2; j++) {
1241         for (k = 0; k < 16; k++) {
1242             if (!atp_dev->id[j][k].prd_table)
1243                 continue;
1244             dma_free_coherent(&atp_dev->pdev->dev, 1024,
1245                       atp_dev->id[j][k].prd_table,
1246                       atp_dev->id[j][k].prd_bus);
1247             atp_dev->id[j][k].prd_table = NULL;
1248         }
1249     }
1250 }
1251
1252 static int atp870u_init_tables(struct Scsi_Host *host)
1253 {
1254     struct atp_unit *atp_dev = (struct atp_unit *)&host->hostdata;
1255     int c,k;
1256     for(c=0;c < 2;c++) {
1257         for(k=0;k<16;k++) {
1258             atp_dev->id[c][k].prd_table =
1259                 dma_alloc_coherent(&atp_dev->pdev->dev, 1024,
1260                            &(atp_dev->id[c][k].prd_bus),
1261                            GFP_KERNEL);
1262             if (!atp_dev->id[c][k].prd_table) {
1263                 printk("atp870u_init_tables fail\n");
1264                 atp870u_free_tables(host);
1265                 return -ENOMEM;
1266             }
1267             atp_dev->id[c][k].prdaddr = atp_dev->id[c][k].prd_bus;
1268             atp_dev->id[c][k].devsp=0x20;
1269             atp_dev->id[c][k].devtype = 0x7f;
1270             atp_dev->id[c][k].curr_req = NULL;
1271         }
1272
1273         atp_dev->active_id[c] = 0;
1274         atp_dev->wide_id[c] = 0;
1275         atp_dev->host_id[c] = 0x07;
1276         atp_dev->quhd[c] = 0;
1277         atp_dev->quend[c] = 0;
1278         atp_dev->last_cmd[c] = 0xff;
1279         atp_dev->in_snd[c] = 0;
1280         atp_dev->in_int[c] = 0;
1281
1282         for (k = 0; k < qcnt; k++) {
1283             atp_dev->quereq[c][k] = NULL;
1284         }
1285         for (k = 0; k < 16; k++) {
1286                atp_dev->id[c][k].curr_req = NULL;
1287                atp_dev->sp[c][k] = 0x04;
1288         }
1289     }
1290     return 0;
1291 }
1292
1293 static void atp_set_host_id(struct atp_unit *atp, u8 c, u8 host_id)
1294 {
1295     atp_writeb_io(atp, c, 0, host_id | 0x08);
1296     atp_writeb_io(atp, c, 0x18, 0);
1297     while ((atp_readb_io(atp, c, 0x1f) & 0x80) == 0)
1298         mdelay(1);
1299     atp_readb_io(atp, c, 0x17);
1300     atp_writeb_io(atp, c, 1, 8);
1301     atp_writeb_io(atp, c, 2, 0x7f);
1302     atp_writeb_io(atp, c, 0x11, 0x20);
1303 }
1304
1305 static void atp870_init(struct Scsi_Host *shpnt)
1306 {
1307     struct atp_unit *atpdev = shost_priv(shpnt);
1308     struct pci_dev *pdev = atpdev->pdev;
1309     unsigned char k, host_id;
1310     u8 scam_on;
1311     bool wide_chip =
1312         (pdev->device == PCI_DEVICE_ID_ARTOP_AEC7610 &&
1313          pdev->revision == 4) ||
1314         (pdev->device == PCI_DEVICE_ID_ARTOP_AEC7612UW) ||
1315         (pdev->device == PCI_DEVICE_ID_ARTOP_AEC7612SUW);
1316
1317     pci_read_config_byte(pdev, 0x49, &host_id);
1318
1319     dev_info(&pdev->dev, "ACARD AEC-671X PCI Ultra/W SCSI-2/3 "
1320          "Host Adapter: IO:%lx, IRQ:%d.\n",
1321          shpnt->io_port, shpnt->irq);
1322
1323     atpdev->ioport[0] = shpnt->io_port;
1324     atpdev->pciport[0] = shpnt->io_port + 0x20;
1325     host_id &= 0x07;
1326     atpdev->host_id[0] = host_id;
1327     scam_on = atp_readb_pci(atpdev, 0, 2);
1328     atpdev->global_map[0] = atp_readb_base(atpdev, 0x2d);
1329     atpdev->ultra_map[0] = atp_readw_base(atpdev, 0x2e);
1330
1331     if (atpdev->ultra_map[0] == 0) {
1332         scam_on = 0x00;
1333         atpdev->global_map[0] = 0x20;
1334         atpdev->ultra_map[0] = 0xffff;
1335     }
1336
1337     if (pdev->revision > 0x07)  /* check if atp876 chip */
1338         atp_writeb_base(atpdev, 0x3e, 0x00); /* enable terminator */
1339
1340     k = (atp_readb_base(atpdev, 0x3a) & 0xf3) | 0x10;
1341     atp_writeb_base(atpdev, 0x3a, k);
1342     atp_writeb_base(atpdev, 0x3a, k & 0xdf);
1343     msleep(32);
1344     atp_writeb_base(atpdev, 0x3a, k);
1345     msleep(32);
1346     atp_set_host_id(atpdev, 0, host_id);
1347
1348     tscam(shpnt, wide_chip, scam_on);
1349     atp_writeb_base(atpdev, 0x3a, atp_readb_base(atpdev, 0x3a) | 0x10);
1350     atp_is(atpdev, 0, wide_chip, 0);
1351     atp_writeb_base(atpdev, 0x3a, atp_readb_base(atpdev, 0x3a) & 0xef);
1352     atp_writeb_base(atpdev, 0x3b, atp_readb_base(atpdev, 0x3b) | 0x20);
1353     shpnt->max_id = wide_chip ? 16 : 8;
1354     shpnt->this_id = host_id;
1355 }
1356
1357 static void atp880_init(struct Scsi_Host *shpnt)
1358 {
1359     struct atp_unit *atpdev = shost_priv(shpnt);
1360     struct pci_dev *pdev = atpdev->pdev;
1361     unsigned char k, m, host_id;
1362     unsigned int n;
1363
1364     pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x80);
1365
1366     atpdev->ioport[0] = shpnt->io_port + 0x40;
1367     atpdev->pciport[0] = shpnt->io_port + 0x28;
1368
1369     host_id = atp_readb_base(atpdev, 0x39) >> 4;
1370
1371     dev_info(&pdev->dev, "ACARD AEC-67160 PCI Ultra3 LVD "
1372          "Host Adapter: IO:%lx, IRQ:%d.\n",
1373          shpnt->io_port, shpnt->irq);
1374     atpdev->host_id[0] = host_id;
1375
1376     atpdev->global_map[0] = atp_readb_base(atpdev, 0x35);
1377     atpdev->ultra_map[0] = atp_readw_base(atpdev, 0x3c);
1378
1379     n = 0x3f09;
1380     while (n < 0x4000) {
1381         m = 0;
1382         atp_writew_base(atpdev, 0x34, n);
1383         n += 0x0002;
1384         if (atp_readb_base(atpdev, 0x30) == 0xff)
1385             break;
1386
1387         atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x30);
1388         atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x31);
1389         atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x32);
1390         atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x33);
1391         atp_writew_base(atpdev, 0x34, n);
1392         n += 0x0002;
1393         atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x30);
1394         atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x31);
1395         atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x32);
1396         atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x33);
1397         atp_writew_base(atpdev, 0x34, n);
1398         n += 0x0002;
1399         atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x30);
1400         atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x31);
1401         atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x32);
1402         atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x33);
1403         atp_writew_base(atpdev, 0x34, n);
1404         n += 0x0002;
1405         atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x30);
1406         atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x31);
1407         atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x32);
1408         atpdev->sp[0][m++] = atp_readb_base(atpdev, 0x33);
1409         n += 0x0018;
1410     }
1411     atp_writew_base(atpdev, 0x34, 0);
1412     atpdev->ultra_map[0] = 0;
1413     atpdev->async[0] = 0;
1414     for (k = 0; k < 16; k++) {
1415         n = 1 << k;
1416         if (atpdev->sp[0][k] > 1)
1417             atpdev->ultra_map[0] |= n;
1418         else
1419             if (atpdev->sp[0][k] == 0)
1420                 atpdev->async[0] |= n;
1421     }
1422     atpdev->async[0] = ~(atpdev->async[0]);
1423     atp_writeb_base(atpdev, 0x35, atpdev->global_map[0]);
1424
1425     k = atp_readb_base(atpdev, 0x38) & 0x80;
1426     atp_writeb_base(atpdev, 0x38, k);
1427     atp_writeb_base(atpdev, 0x3b, 0x20);
1428     msleep(32);
1429     atp_writeb_base(atpdev, 0x3b, 0);
1430     msleep(32);
1431     atp_readb_io(atpdev, 0, 0x1b);
1432     atp_readb_io(atpdev, 0, 0x17);
1433
1434     atp_set_host_id(atpdev, 0, host_id);
1435
1436     tscam(shpnt, true, atp_readb_base(atpdev, 0x22));
1437     atp_is(atpdev, 0, true, atp_readb_base(atpdev, 0x3f) & 0x40);
1438     atp_writeb_base(atpdev, 0x38, 0xb0);
1439     shpnt->max_id = 16;
1440     shpnt->this_id = host_id;
1441 }
1442
1443 static void atp885_init(struct Scsi_Host *shpnt)
1444 {
1445     struct atp_unit *atpdev = shost_priv(shpnt);
1446     struct pci_dev *pdev = atpdev->pdev;
1447     unsigned char k, m, c;
1448     unsigned int n;
1449     unsigned char setupdata[2][16];
1450
1451     dev_info(&pdev->dev, "ACARD AEC-67162 PCI Ultra3 LVD "
1452          "Host Adapter: IO:%lx, IRQ:%d.\n",
1453          shpnt->io_port, shpnt->irq);
1454
1455     atpdev->ioport[0] = shpnt->io_port + 0x80;
1456     atpdev->ioport[1] = shpnt->io_port + 0xc0;
1457     atpdev->pciport[0] = shpnt->io_port + 0x40;
1458     atpdev->pciport[1] = shpnt->io_port + 0x50;
1459
1460     c = atp_readb_base(atpdev, 0x29);
1461     atp_writeb_base(atpdev, 0x29, c | 0x04);
1462
1463     n = 0x1f80;
1464     while (n < 0x2000) {
1465         atp_writew_base(atpdev, 0x3c, n);
1466         if (atp_readl_base(atpdev, 0x38) == 0xffffffff)
1467             break;
1468         for (m = 0; m < 2; m++) {
1469             atpdev->global_map[m] = 0;
1470             for (k = 0; k < 4; k++) {
1471                 atp_writew_base(atpdev, 0x3c, n++);
1472                 ((u32 *)&setupdata[m][0])[k] =
1473                     atp_readl_base(atpdev, 0x38);
1474             }
1475             for (k = 0; k < 4; k++) {
1476                 atp_writew_base(atpdev, 0x3c, n++);
1477                 ((u32 *)&atpdev->sp[m][0])[k] =
1478                     atp_readl_base(atpdev, 0x38);
1479             }
1480             n += 8;
1481         }
1482     }
1483     c = atp_readb_base(atpdev, 0x29);
1484     atp_writeb_base(atpdev, 0x29, c & 0xfb);
1485     for (c = 0; c < 2; c++) {
1486         atpdev->ultra_map[c] = 0;
1487         atpdev->async[c] = 0;
1488         for (k = 0; k < 16; k++) {
1489             n = 1 << k;
1490             if (atpdev->sp[c][k] > 1)
1491                 atpdev->ultra_map[c] |= n;
1492             else
1493                 if (atpdev->sp[c][k] == 0)
1494                     atpdev->async[c] |= n;
1495         }
1496         atpdev->async[c] = ~(atpdev->async[c]);
1497
1498         if (atpdev->global_map[c] == 0) {
1499             k = setupdata[c][1];
1500             if ((k & 0x40) != 0)
1501                 atpdev->global_map[c] |= 0x20;
1502             k &= 0x07;
1503             atpdev->global_map[c] |= k;
1504             if ((setupdata[c][2] & 0x04) != 0)
1505                 atpdev->global_map[c] |= 0x08;
1506             atpdev->host_id[c] = setupdata[c][0] & 0x07;
1507         }
1508     }
1509
1510     k = atp_readb_base(atpdev, 0x28) & 0x8f;
1511     k |= 0x10;
1512     atp_writeb_base(atpdev, 0x28, k);
1513     atp_writeb_pci(atpdev, 0, 1, 0x80);
1514     atp_writeb_pci(atpdev, 1, 1, 0x80);
1515     msleep(100);
1516     atp_writeb_pci(atpdev, 0, 1, 0);
1517     atp_writeb_pci(atpdev, 1, 1, 0);
1518     msleep(1000);
1519     atp_readb_io(atpdev, 0, 0x1b);
1520     atp_readb_io(atpdev, 0, 0x17);
1521     atp_readb_io(atpdev, 1, 0x1b);
1522     atp_readb_io(atpdev, 1, 0x17);
1523
1524     k = atpdev->host_id[0];
1525     if (k > 7)
1526         k = (k & 0x07) | 0x40;
1527     atp_set_host_id(atpdev, 0, k);
1528
1529     k = atpdev->host_id[1];
1530     if (k > 7)
1531         k = (k & 0x07) | 0x40;
1532     atp_set_host_id(atpdev, 1, k);
1533
1534     msleep(600); /* this delay used to be called tscam_885() */
1535     dev_info(&pdev->dev, "Scanning Channel A SCSI Device ...\n");
1536     atp_is(atpdev, 0, true, atp_readb_io(atpdev, 0, 0x1b) >> 7);
1537     atp_writeb_io(atpdev, 0, 0x16, 0x80);
1538     dev_info(&pdev->dev, "Scanning Channel B SCSI Device ...\n");
1539     atp_is(atpdev, 1, true, atp_readb_io(atpdev, 1, 0x1b) >> 7);
1540     atp_writeb_io(atpdev, 1, 0x16, 0x80);
1541     k = atp_readb_base(atpdev, 0x28) & 0xcf;
1542     k |= 0xc0;
1543     atp_writeb_base(atpdev, 0x28, k);
1544     k = atp_readb_base(atpdev, 0x1f) | 0x80;
1545     atp_writeb_base(atpdev, 0x1f, k);
1546     k = atp_readb_base(atpdev, 0x29) | 0x01;
1547     atp_writeb_base(atpdev, 0x29, k);
1548     shpnt->max_id = 16;
1549     shpnt->max_lun = (atpdev->global_map[0] & 0x07) + 1;
1550     shpnt->max_channel = 1;
1551     shpnt->this_id = atpdev->host_id[0];
1552 }
1553
1554 /* return non-zero on detection */
1555 static int atp870u_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1556 {
1557     struct Scsi_Host *shpnt = NULL;
1558     struct atp_unit *atpdev;
1559     int err;
1560
1561     if (ent->device == PCI_DEVICE_ID_ARTOP_AEC7610 && pdev->revision < 2) {
1562         dev_err(&pdev->dev, "ATP850S chips (AEC6710L/F cards) are not supported.\n");
1563         return -ENODEV;
1564     }
1565
1566     err = pci_enable_device(pdev);
1567     if (err)
1568         goto fail;
1569
1570     if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) {
1571         printk(KERN_ERR "atp870u: DMA mask required but not available.\n");
1572         err = -EIO;
1573         goto disable_device;
1574     }
1575
1576     err = pci_request_regions(pdev, "atp870u");
1577     if (err)
1578         goto disable_device;
1579     pci_set_master(pdev);
1580
1581     err = -ENOMEM;
1582     shpnt = scsi_host_alloc(&atp870u_template, sizeof(struct atp_unit));
1583     if (!shpnt)
1584         goto release_region;
1585
1586     atpdev = shost_priv(shpnt);
1587
1588     atpdev->host = shpnt;
1589     atpdev->pdev = pdev;
1590     pci_set_drvdata(pdev, atpdev);
1591
1592     shpnt->io_port = pci_resource_start(pdev, 0);
1593     shpnt->io_port &= 0xfffffff8;
1594     shpnt->n_io_port = pci_resource_len(pdev, 0);
1595     atpdev->baseport = shpnt->io_port;
1596     shpnt->unique_id = shpnt->io_port;
1597     shpnt->irq = pdev->irq;
1598
1599     err = atp870u_init_tables(shpnt);
1600     if (err) {
1601         dev_err(&pdev->dev, "Unable to allocate tables for Acard controller\n");
1602         goto unregister;
1603     }
1604
1605     if (is880(atpdev))
1606         atp880_init(shpnt);
1607     else if (is885(atpdev))
1608         atp885_init(shpnt);
1609     else
1610         atp870_init(shpnt);
1611
1612     err = request_irq(shpnt->irq, atp870u_intr_handle, IRQF_SHARED, "atp870u", shpnt);
1613     if (err) {
1614         dev_err(&pdev->dev, "Unable to allocate IRQ %d.\n", shpnt->irq);
1615         goto free_tables;
1616     }
1617
1618     err = scsi_add_host(shpnt, &pdev->dev);
1619     if (err)
1620         goto scsi_add_fail;
1621     scsi_scan_host(shpnt);
1622
1623     return 0;
1624
1625 scsi_add_fail:
1626     free_irq(shpnt->irq, shpnt);
1627 free_tables:
1628     atp870u_free_tables(shpnt);
1629 unregister:
1630     scsi_host_put(shpnt);
1631 release_region:
1632     pci_release_regions(pdev);
1633 disable_device:
1634     pci_disable_device(pdev);
1635 fail:
1636     return err;
1637 }
1638
1639 /* The abort command does not leave the device in a clean state where
1640    it is available to be used again.  Until this gets worked out, we will
1641    leave it commented out.  */
1642
1643 static int atp870u_abort(struct scsi_cmnd * SCpnt)
1644 {
1645     unsigned char  j, k, c;
1646     struct scsi_cmnd *workrequ;
1647     struct atp_unit *dev;
1648     struct Scsi_Host *host;
1649     host = SCpnt->device->host;
1650
1651     dev = (struct atp_unit *)&host->hostdata;
1652     c = scmd_channel(SCpnt);
1653     printk(" atp870u: abort Channel = %x \n", c);
1654     printk("working=%x last_cmd=%x ", dev->working[c], dev->last_cmd[c]);
1655     printk(" quhdu=%x quendu=%x ", dev->quhd[c], dev->quend[c]);
1656     for (j = 0; j < 0x18; j++) {
1657         printk(" r%2x=%2x", j, atp_readb_io(dev, c, j));
1658     }
1659     printk(" r1c=%2x", atp_readb_io(dev, c, 0x1c));
1660     printk(" r1f=%2x in_snd=%2x ", atp_readb_io(dev, c, 0x1f), dev->in_snd[c]);
1661     printk(" d00=%2x", atp_readb_pci(dev, c, 0x00));
1662     printk(" d02=%2x", atp_readb_pci(dev, c, 0x02));
1663     for(j=0;j<16;j++) {
1664        if (dev->id[c][j].curr_req != NULL) {
1665         workrequ = dev->id[c][j].curr_req;
1666         printk("\n que cdb= ");
1667         for (k=0; k < workrequ->cmd_len; k++) {
1668             printk(" %2x ",workrequ->cmnd[k]);
1669         }
1670         printk(" last_lenu= %x ",(unsigned int)dev->id[c][j].last_len);
1671        }
1672     }
1673     return SUCCESS;
1674 }
1675
1676 static const char *atp870u_info(struct Scsi_Host *notused)
1677 {
1678     static char buffer[128];
1679
1680     strcpy(buffer, "ACARD AEC-6710/6712/67160 PCI Ultra/W/LVD SCSI-3 Adapter Driver V2.6+ac ");
1681
1682     return buffer;
1683 }
1684
1685 static int atp870u_show_info(struct seq_file *m, struct Scsi_Host *HBAptr)
1686 {
1687     seq_puts(m, "ACARD AEC-671X Driver Version: 2.6+ac\n\n"
1688         "Adapter Configuration:\n");
1689     seq_printf(m, "               Base IO: %#.4lx\n", HBAptr->io_port);
1690     seq_printf(m, "                   IRQ: %d\n", HBAptr->irq);
1691     return 0;
1692 }
1693
1694
1695 static int atp870u_biosparam(struct scsi_device *disk, struct block_device *dev,
1696             sector_t capacity, int *ip)
1697 {
1698     int heads, sectors, cylinders;
1699
1700     heads = 64;
1701     sectors = 32;
1702     cylinders = (unsigned long)capacity / (heads * sectors);
1703     if (cylinders > 1024) {
1704         heads = 255;
1705         sectors = 63;
1706         cylinders = (unsigned long)capacity / (heads * sectors);
1707     }
1708     ip[0] = heads;
1709     ip[1] = sectors;
1710     ip[2] = cylinders;
1711
1712     return 0;
1713 }
1714
1715 static void atp870u_remove (struct pci_dev *pdev)
1716 {
1717     struct atp_unit *devext = pci_get_drvdata(pdev);
1718     struct Scsi_Host *pshost = devext->host;
1719
1720     scsi_remove_host(pshost);
1721     free_irq(pshost->irq, pshost);
1722     pci_release_regions(pdev);
1723     pci_disable_device(pdev);
1724     atp870u_free_tables(pshost);
1725     scsi_host_put(pshost);
1726 }
1727 MODULE_LICENSE("GPL");
1728
1729 static struct scsi_host_template atp870u_template = {
1730      .module            = THIS_MODULE,
1731      .name          = "atp870u"     /* name */,
1732      .proc_name         = "atp870u",
1733      .show_info         = atp870u_show_info,
1734      .info          = atp870u_info      /* info */,
1735      .queuecommand      = atp870u_queuecommand  /* queuecommand */,
1736      .eh_abort_handler      = atp870u_abort     /* abort */,
1737      .bios_param        = atp870u_biosparam /* biosparm */,
1738      .can_queue         = qcnt          /* can_queue */,
1739      .this_id           = 7         /* SCSI ID */,
1740      .sg_tablesize      = ATP870U_SCATTER   /*SG_ALL*/,
1741      .max_sectors       = ATP870U_MAX_SECTORS,
1742 };
1743
1744 static struct pci_device_id atp870u_id_table[] = {
1745     { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, ATP885_DEVID)           },
1746     { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, ATP880_DEVID1)          },
1747     { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, ATP880_DEVID2)          },
1748     { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7610)    },
1749     { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612UW)  },
1750     { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612U)   },
1751     { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612S)   },
1752     { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612D)   },
1753     { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_AEC7612SUW) },
1754     { PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_8060)   },
1755     { 0, },
1756 };
1757
1758 MODULE_DEVICE_TABLE(pci, atp870u_id_table);
1759
1760 static struct pci_driver atp870u_driver = {
1761     .id_table   = atp870u_id_table,
1762     .name       = "atp870u",
1763     .probe      = atp870u_probe,
1764     .remove     = atp870u_remove,
1765 };
1766
1767 module_pci_driver(atp870u_driver);
1768
1769 static void atp_is(struct atp_unit *dev, unsigned char c, bool wide_chip,
1770            unsigned char lvdmode)
1771 {
1772     unsigned char i, j, k, rmb, n;
1773     unsigned short int m;
1774     static unsigned char mbuf[512];
1775     static unsigned char satn[9] = { 0, 0, 0, 0, 0, 0, 0, 6, 6 };
1776     static unsigned char inqd[9] = { 0x12, 0, 0, 0, 0x24, 0, 0, 0x24, 6 };
1777     static unsigned char synn[6] = { 0x80, 1, 3, 1, 0x19, 0x0e };
1778     unsigned char synu[6] = { 0x80, 1, 3, 1, 0x0a, 0x0e };
1779     static unsigned char synw[6] = { 0x80, 1, 3, 1, 0x19, 0x0e };
1780     static unsigned char synw_870[6] = { 0x80, 1, 3, 1, 0x0c, 0x07 };
1781     unsigned char synuw[6] = { 0x80, 1, 3, 1, 0x0a, 0x0e };
1782     static unsigned char wide[6] = { 0x80, 1, 2, 3, 1, 0 };
1783     static unsigned char u3[9] = { 0x80, 1, 6, 4, 0x09, 00, 0x0e, 0x01, 0x02 };
1784
1785     for (i = 0; i < 16; i++) {
1786         if (!wide_chip && (i > 7))
1787             break;
1788         m = 1;
1789         m = m << i;
1790         if ((m & dev->active_id[c]) != 0) {
1791             continue;
1792         }
1793         if (i == dev->host_id[c]) {
1794             printk(KERN_INFO "         ID: %2d  Host Adapter\n", dev->host_id[c]);
1795             continue;
1796         }
1797         atp_writeb_io(dev, c, 0x1b, wide_chip ? 0x01 : 0x00);
1798         atp_writeb_io(dev, c, 1, 0x08);
1799         atp_writeb_io(dev, c, 2, 0x7f);
1800         atp_writeb_io(dev, c, 3, satn[0]);
1801         atp_writeb_io(dev, c, 4, satn[1]);
1802         atp_writeb_io(dev, c, 5, satn[2]);
1803         atp_writeb_io(dev, c, 6, satn[3]);
1804         atp_writeb_io(dev, c, 7, satn[4]);
1805         atp_writeb_io(dev, c, 8, satn[5]);
1806         atp_writeb_io(dev, c, 0x0f, 0);
1807         atp_writeb_io(dev, c, 0x11, dev->id[c][i].devsp);
1808         atp_writeb_io(dev, c, 0x12, 0);
1809         atp_writeb_io(dev, c, 0x13, satn[6]);
1810         atp_writeb_io(dev, c, 0x14, satn[7]);
1811         j = i;
1812         if ((j & 0x08) != 0) {
1813             j = (j & 0x07) | 0x40;
1814         }
1815         atp_writeb_io(dev, c, 0x15, j);
1816         atp_writeb_io(dev, c, 0x18, satn[8]);
1817
1818         while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1819             cpu_relax();
1820
1821         if (atp_readb_io(dev, c, 0x17) != 0x11 && atp_readb_io(dev, c, 0x17) != 0x8e)
1822             continue;
1823
1824         while (atp_readb_io(dev, c, 0x17) != 0x8e)
1825             cpu_relax();
1826
1827         dev->active_id[c] |= m;
1828
1829         atp_writeb_io(dev, c, 0x10, 0x30);
1830         if (is885(dev) || is880(dev))
1831             atp_writeb_io(dev, c, 0x14, 0x00);
1832         else /* result of is870() merge - is this a bug? */
1833             atp_writeb_io(dev, c, 0x04, 0x00);
1834
1835 phase_cmd:
1836         atp_writeb_io(dev, c, 0x18, 0x08);
1837
1838         while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1839             cpu_relax();
1840
1841         j = atp_readb_io(dev, c, 0x17);
1842         if (j != 0x16) {
1843             atp_writeb_io(dev, c, 0x10, 0x41);
1844             goto phase_cmd;
1845         }
1846 sel_ok:
1847         atp_writeb_io(dev, c, 3, inqd[0]);
1848         atp_writeb_io(dev, c, 4, inqd[1]);
1849         atp_writeb_io(dev, c, 5, inqd[2]);
1850         atp_writeb_io(dev, c, 6, inqd[3]);
1851         atp_writeb_io(dev, c, 7, inqd[4]);
1852         atp_writeb_io(dev, c, 8, inqd[5]);
1853         atp_writeb_io(dev, c, 0x0f, 0);
1854         atp_writeb_io(dev, c, 0x11, dev->id[c][i].devsp);
1855         atp_writeb_io(dev, c, 0x12, 0);
1856         atp_writeb_io(dev, c, 0x13, inqd[6]);
1857         atp_writeb_io(dev, c, 0x14, inqd[7]);
1858         atp_writeb_io(dev, c, 0x18, inqd[8]);
1859
1860         while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1861             cpu_relax();
1862
1863         if (atp_readb_io(dev, c, 0x17) != 0x11 && atp_readb_io(dev, c, 0x17) != 0x8e)
1864             continue;
1865
1866         while (atp_readb_io(dev, c, 0x17) != 0x8e)
1867             cpu_relax();
1868
1869         if (wide_chip)
1870             atp_writeb_io(dev, c, 0x1b, 0x00);
1871
1872         atp_writeb_io(dev, c, 0x18, 0x08);
1873         j = 0;
1874 rd_inq_data:
1875         k = atp_readb_io(dev, c, 0x1f);
1876         if ((k & 0x01) != 0) {
1877             mbuf[j++] = atp_readb_io(dev, c, 0x19);
1878             goto rd_inq_data;
1879         }
1880         if ((k & 0x80) == 0) {
1881             goto rd_inq_data;
1882         }
1883         j = atp_readb_io(dev, c, 0x17);
1884         if (j == 0x16) {
1885             goto inq_ok;
1886         }
1887         atp_writeb_io(dev, c, 0x10, 0x46);
1888         atp_writeb_io(dev, c, 0x12, 0);
1889         atp_writeb_io(dev, c, 0x13, 0);
1890         atp_writeb_io(dev, c, 0x14, 0);
1891         atp_writeb_io(dev, c, 0x18, 0x08);
1892
1893         while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1894             cpu_relax();
1895
1896         if (atp_readb_io(dev, c, 0x17) != 0x16)
1897             goto sel_ok;
1898
1899 inq_ok:
1900         mbuf[36] = 0;
1901         printk(KERN_INFO "         ID: %2d  %s\n", i, &mbuf[8]);
1902         dev->id[c][i].devtype = mbuf[0];
1903         rmb = mbuf[1];
1904         n = mbuf[7];
1905         if (!wide_chip)
1906             goto not_wide;
1907         if ((mbuf[7] & 0x60) == 0) {
1908             goto not_wide;
1909         }
1910         if (is885(dev) || is880(dev)) {
1911             if ((i < 8) && ((dev->global_map[c] & 0x20) == 0))
1912                 goto not_wide;
1913         } else { /* result of is870() merge - is this a bug? */
1914             if ((dev->global_map[c] & 0x20) == 0)
1915                 goto not_wide;
1916         }
1917         if (lvdmode == 0) {
1918             goto chg_wide;
1919         }
1920         if (dev->sp[c][i] != 0x04)  // force u2
1921         {
1922             goto chg_wide;
1923         }
1924
1925         atp_writeb_io(dev, c, 0x1b, 0x01);
1926         atp_writeb_io(dev, c, 3, satn[0]);
1927         atp_writeb_io(dev, c, 4, satn[1]);
1928         atp_writeb_io(dev, c, 5, satn[2]);
1929         atp_writeb_io(dev, c, 6, satn[3]);
1930         atp_writeb_io(dev, c, 7, satn[4]);
1931         atp_writeb_io(dev, c, 8, satn[5]);
1932         atp_writeb_io(dev, c, 0x0f, 0);
1933         atp_writeb_io(dev, c, 0x11, dev->id[c][i].devsp);
1934         atp_writeb_io(dev, c, 0x12, 0);
1935         atp_writeb_io(dev, c, 0x13, satn[6]);
1936         atp_writeb_io(dev, c, 0x14, satn[7]);
1937         atp_writeb_io(dev, c, 0x18, satn[8]);
1938
1939         while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
1940             cpu_relax();
1941
1942         if (atp_readb_io(dev, c, 0x17) != 0x11 && atp_readb_io(dev, c, 0x17) != 0x8e)
1943             continue;
1944
1945         while (atp_readb_io(dev, c, 0x17) != 0x8e)
1946             cpu_relax();
1947
1948 try_u3:
1949         j = 0;
1950         atp_writeb_io(dev, c, 0x14, 0x09);
1951         atp_writeb_io(dev, c, 0x18, 0x20);
1952
1953         while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0) {
1954             if ((atp_readb_io(dev, c, 0x1f) & 0x01) != 0)
1955                 atp_writeb_io(dev, c, 0x19, u3[j++]);
1956             cpu_relax();
1957         }
1958
1959         while ((atp_readb_io(dev, c, 0x17) & 0x80) == 0x00)
1960             cpu_relax();
1961
1962         j = atp_readb_io(dev, c, 0x17) & 0x0f;
1963         if (j == 0x0f) {
1964             goto u3p_in;
1965         }
1966         if (j == 0x0a) {
1967             goto u3p_cmd;
1968         }
1969         if (j == 0x0e) {
1970             goto try_u3;
1971         }
1972         continue;
1973 u3p_out:
1974         atp_writeb_io(dev, c, 0x18, 0x20);
1975         while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0) {
1976             if ((atp_readb_io(dev, c, 0x1f) & 0x01) != 0)
1977                 atp_writeb_io(dev, c, 0x19, 0);
1978             cpu_relax();
1979         }
1980         j = atp_readb_io(dev, c, 0x17) & 0x0f;
1981         if (j == 0x0f) {
1982             goto u3p_in;
1983         }
1984         if (j == 0x0a) {
1985             goto u3p_cmd;
1986         }
1987         if (j == 0x0e) {
1988             goto u3p_out;
1989         }
1990         continue;
1991 u3p_in:
1992         atp_writeb_io(dev, c, 0x14, 0x09);
1993         atp_writeb_io(dev, c, 0x18, 0x20);
1994         k = 0;
1995 u3p_in1:
1996         j = atp_readb_io(dev, c, 0x1f);
1997         if ((j & 0x01) != 0) {
1998             mbuf[k++] = atp_readb_io(dev, c, 0x19);
1999             goto u3p_in1;
2000         }
2001         if ((j & 0x80) == 0x00) {
2002             goto u3p_in1;
2003         }
2004         j = atp_readb_io(dev, c, 0x17) & 0x0f;
2005         if (j == 0x0f) {
2006             goto u3p_in;
2007         }
2008         if (j == 0x0a) {
2009             goto u3p_cmd;
2010         }
2011         if (j == 0x0e) {
2012             goto u3p_out;
2013         }
2014         continue;
2015 u3p_cmd:
2016         atp_writeb_io(dev, c, 0x10, 0x30);
2017         atp_writeb_io(dev, c, 0x14, 0x00);
2018         atp_writeb_io(dev, c, 0x18, 0x08);
2019
2020         while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00);
2021
2022         j = atp_readb_io(dev, c, 0x17);
2023         if (j != 0x16) {
2024             if (j == 0x4e) {
2025                 goto u3p_out;
2026             }
2027             continue;
2028         }
2029         if (mbuf[0] != 0x01) {
2030             goto chg_wide;
2031         }
2032         if (mbuf[1] != 0x06) {
2033             goto chg_wide;
2034         }
2035         if (mbuf[2] != 0x04) {
2036             goto chg_wide;
2037         }
2038         if (mbuf[3] == 0x09) {
2039             m = 1;
2040             m = m << i;
2041             dev->wide_id[c] |= m;
2042             dev->id[c][i].devsp = 0xce;
2043 #ifdef ED_DBGP
2044             printk("dev->id[%2d][%2d].devsp = %2x\n",
2045                    c, i, dev->id[c][i].devsp);
2046 #endif
2047             continue;
2048         }
2049 chg_wide:
2050         atp_writeb_io(dev, c, 0x1b, 0x01);
2051         atp_writeb_io(dev, c, 3, satn[0]);
2052         atp_writeb_io(dev, c, 4, satn[1]);
2053         atp_writeb_io(dev, c, 5, satn[2]);
2054         atp_writeb_io(dev, c, 6, satn[3]);
2055         atp_writeb_io(dev, c, 7, satn[4]);
2056         atp_writeb_io(dev, c, 8, satn[5]);
2057         atp_writeb_io(dev, c, 0x0f, 0);
2058         atp_writeb_io(dev, c, 0x11, dev->id[c][i].devsp);
2059         atp_writeb_io(dev, c, 0x12, 0);
2060         atp_writeb_io(dev, c, 0x13, satn[6]);
2061         atp_writeb_io(dev, c, 0x14, satn[7]);
2062         atp_writeb_io(dev, c, 0x18, satn[8]);
2063
2064         while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
2065             cpu_relax();
2066
2067         if (atp_readb_io(dev, c, 0x17) != 0x11 &&
2068             atp_readb_io(dev, c, 0x17) != 0x8e)
2069             continue;
2070
2071         while (atp_readb_io(dev, c, 0x17) != 0x8e)
2072             cpu_relax();
2073
2074 try_wide:
2075         j = 0;
2076         atp_writeb_io(dev, c, 0x14, 0x05);
2077         atp_writeb_io(dev, c, 0x18, 0x20);
2078
2079         while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0) {
2080             if ((atp_readb_io(dev, c, 0x1f) & 0x01) != 0)
2081                 atp_writeb_io(dev, c, 0x19, wide[j++]);
2082             cpu_relax();
2083         }
2084
2085         while ((atp_readb_io(dev, c, 0x17) & 0x80) == 0x00)
2086             cpu_relax();
2087
2088         j = atp_readb_io(dev, c, 0x17) & 0x0f;
2089         if (j == 0x0f) {
2090             goto widep_in;
2091         }
2092         if (j == 0x0a) {
2093             goto widep_cmd;
2094         }
2095         if (j == 0x0e) {
2096             goto try_wide;
2097         }
2098         continue;
2099 widep_out:
2100         atp_writeb_io(dev, c, 0x18, 0x20);
2101         while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0) {
2102             if ((atp_readb_io(dev, c, 0x1f) & 0x01) != 0)
2103                 atp_writeb_io(dev, c, 0x19, 0);
2104             cpu_relax();
2105         }
2106         j = atp_readb_io(dev, c, 0x17) & 0x0f;
2107         if (j == 0x0f) {
2108             goto widep_in;
2109         }
2110         if (j == 0x0a) {
2111             goto widep_cmd;
2112         }
2113         if (j == 0x0e) {
2114             goto widep_out;
2115         }
2116         continue;
2117 widep_in:
2118         atp_writeb_io(dev, c, 0x14, 0xff);
2119         atp_writeb_io(dev, c, 0x18, 0x20);
2120         k = 0;
2121 widep_in1:
2122         j = atp_readb_io(dev, c, 0x1f);
2123         if ((j & 0x01) != 0) {
2124             mbuf[k++] = atp_readb_io(dev, c, 0x19);
2125             goto widep_in1;
2126         }
2127         if ((j & 0x80) == 0x00) {
2128             goto widep_in1;
2129         }
2130         j = atp_readb_io(dev, c, 0x17) & 0x0f;
2131         if (j == 0x0f) {
2132             goto widep_in;
2133         }
2134         if (j == 0x0a) {
2135             goto widep_cmd;
2136         }
2137         if (j == 0x0e) {
2138             goto widep_out;
2139         }
2140         continue;
2141 widep_cmd:
2142         atp_writeb_io(dev, c, 0x10, 0x30);
2143         atp_writeb_io(dev, c, 0x14, 0x00);
2144         atp_writeb_io(dev, c, 0x18, 0x08);
2145
2146         while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
2147             cpu_relax();
2148
2149         j = atp_readb_io(dev, c, 0x17);
2150         if (j != 0x16) {
2151             if (j == 0x4e) {
2152                 goto widep_out;
2153             }
2154             continue;
2155         }
2156         if (mbuf[0] != 0x01) {
2157             goto not_wide;
2158         }
2159         if (mbuf[1] != 0x02) {
2160             goto not_wide;
2161         }
2162         if (mbuf[2] != 0x03) {
2163             goto not_wide;
2164         }
2165         if (mbuf[3] != 0x01) {
2166             goto not_wide;
2167         }
2168         m = 1;
2169         m = m << i;
2170         dev->wide_id[c] |= m;
2171 not_wide:
2172         if ((dev->id[c][i].devtype == 0x00) ||
2173             (dev->id[c][i].devtype == 0x07) ||
2174             ((dev->id[c][i].devtype == 0x05) && ((n & 0x10) != 0))) {
2175             m = 1;
2176             m = m << i;
2177             if ((dev->async[c] & m) != 0) {
2178                 goto set_sync;
2179             }
2180         }
2181         continue;
2182 set_sync:
2183         if ((!is885(dev) && !is880(dev)) || (dev->sp[c][i] == 0x02)) {
2184             synu[4] = 0x0c;
2185             synuw[4] = 0x0c;
2186         } else {
2187             if (dev->sp[c][i] >= 0x03) {
2188                 synu[4] = 0x0a;
2189                 synuw[4] = 0x0a;
2190             }
2191         }
2192         j = 0;
2193         if ((m & dev->wide_id[c]) != 0) {
2194             j |= 0x01;
2195         }
2196         atp_writeb_io(dev, c, 0x1b, j);
2197         atp_writeb_io(dev, c, 3, satn[0]);
2198         atp_writeb_io(dev, c, 4, satn[1]);
2199         atp_writeb_io(dev, c, 5, satn[2]);
2200         atp_writeb_io(dev, c, 6, satn[3]);
2201         atp_writeb_io(dev, c, 7, satn[4]);
2202         atp_writeb_io(dev, c, 8, satn[5]);
2203         atp_writeb_io(dev, c, 0x0f, 0);
2204         atp_writeb_io(dev, c, 0x11, dev->id[c][i].devsp);
2205         atp_writeb_io(dev, c, 0x12, 0);
2206         atp_writeb_io(dev, c, 0x13, satn[6]);
2207         atp_writeb_io(dev, c, 0x14, satn[7]);
2208         atp_writeb_io(dev, c, 0x18, satn[8]);
2209
2210         while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
2211             cpu_relax();
2212
2213         if (atp_readb_io(dev, c, 0x17) != 0x11 &&
2214             atp_readb_io(dev, c, 0x17) != 0x8e)
2215             continue;
2216
2217         while (atp_readb_io(dev, c, 0x17) != 0x8e)
2218             cpu_relax();
2219
2220 try_sync:
2221         j = 0;
2222         atp_writeb_io(dev, c, 0x14, 0x06);
2223         atp_writeb_io(dev, c, 0x18, 0x20);
2224
2225         while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0) {
2226             if ((atp_readb_io(dev, c, 0x1f) & 0x01) != 0) {
2227                 if ((m & dev->wide_id[c]) != 0) {
2228                     if (is885(dev) || is880(dev)) {
2229                         if ((m & dev->ultra_map[c]) != 0) {
2230                             atp_writeb_io(dev, c, 0x19, synuw[j++]);
2231                         } else {
2232                             atp_writeb_io(dev, c, 0x19, synw[j++]);
2233                         }
2234                     } else
2235                         atp_writeb_io(dev, c, 0x19, synw_870[j++]);
2236                 } else {
2237                     if ((m & dev->ultra_map[c]) != 0) {
2238                         atp_writeb_io(dev, c, 0x19, synu[j++]);
2239                     } else {
2240                         atp_writeb_io(dev, c, 0x19, synn[j++]);
2241                     }
2242                 }
2243             }
2244         }
2245
2246         while ((atp_readb_io(dev, c, 0x17) & 0x80) == 0x00)
2247             cpu_relax();
2248
2249         j = atp_readb_io(dev, c, 0x17) & 0x0f;
2250         if (j == 0x0f) {
2251             goto phase_ins;
2252         }
2253         if (j == 0x0a) {
2254             goto phase_cmds;
2255         }
2256         if (j == 0x0e) {
2257             goto try_sync;
2258         }
2259         continue;
2260 phase_outs:
2261         atp_writeb_io(dev, c, 0x18, 0x20);
2262         while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00) {
2263             if ((atp_readb_io(dev, c, 0x1f) & 0x01) != 0x00)
2264                 atp_writeb_io(dev, c, 0x19, 0x00);
2265             cpu_relax();
2266         }
2267         j = atp_readb_io(dev, c, 0x17);
2268         if (j == 0x85) {
2269             goto tar_dcons;
2270         }
2271         j &= 0x0f;
2272         if (j == 0x0f) {
2273             goto phase_ins;
2274         }
2275         if (j == 0x0a) {
2276             goto phase_cmds;
2277         }
2278         if (j == 0x0e) {
2279             goto phase_outs;
2280         }
2281         continue;
2282 phase_ins:
2283         if (is885(dev) || is880(dev))
2284             atp_writeb_io(dev, c, 0x14, 0x06);
2285         else
2286             atp_writeb_io(dev, c, 0x14, 0xff);
2287         atp_writeb_io(dev, c, 0x18, 0x20);
2288         k = 0;
2289 phase_ins1:
2290         j = atp_readb_io(dev, c, 0x1f);
2291         if ((j & 0x01) != 0x00) {
2292             mbuf[k++] = atp_readb_io(dev, c, 0x19);
2293             goto phase_ins1;
2294         }
2295         if ((j & 0x80) == 0x00) {
2296             goto phase_ins1;
2297         }
2298
2299         while ((atp_readb_io(dev, c, 0x17) & 0x80) == 0x00);
2300
2301         j = atp_readb_io(dev, c, 0x17);
2302         if (j == 0x85) {
2303             goto tar_dcons;
2304         }
2305         j &= 0x0f;
2306         if (j == 0x0f) {
2307             goto phase_ins;
2308         }
2309         if (j == 0x0a) {
2310             goto phase_cmds;
2311         }
2312         if (j == 0x0e) {
2313             goto phase_outs;
2314         }
2315         continue;
2316 phase_cmds:
2317         atp_writeb_io(dev, c, 0x10, 0x30);
2318 tar_dcons:
2319         atp_writeb_io(dev, c, 0x14, 0x00);
2320         atp_writeb_io(dev, c, 0x18, 0x08);
2321
2322         while ((atp_readb_io(dev, c, 0x1f) & 0x80) == 0x00)
2323             cpu_relax();
2324
2325         j = atp_readb_io(dev, c, 0x17);
2326         if (j != 0x16) {
2327             continue;
2328         }
2329         if (mbuf[0] != 0x01) {
2330             continue;
2331         }
2332         if (mbuf[1] != 0x03) {
2333             continue;
2334         }
2335         if (mbuf[4] == 0x00) {
2336             continue;
2337         }
2338         if (mbuf[3] > 0x64) {
2339             continue;
2340         }
2341         if (is885(dev) || is880(dev)) {
2342             if (mbuf[4] > 0x0e) {
2343                 mbuf[4] = 0x0e;
2344             }
2345         } else {
2346             if (mbuf[4] > 0x0c) {
2347                 mbuf[4] = 0x0c;
2348             }
2349         }
2350         dev->id[c][i].devsp = mbuf[4];
2351         if (is885(dev) || is880(dev))
2352             if (mbuf[3] < 0x0c) {
2353                 j = 0xb0;
2354                 goto set_syn_ok;
2355             }
2356         if ((mbuf[3] < 0x0d) && (rmb == 0)) {
2357             j = 0xa0;
2358             goto set_syn_ok;
2359         }
2360         if (mbuf[3] < 0x1a) {
2361             j = 0x20;
2362             goto set_syn_ok;
2363         }
2364         if (mbuf[3] < 0x33) {
2365             j = 0x40;
2366             goto set_syn_ok;
2367         }
2368         if (mbuf[3] < 0x4c) {
2369             j = 0x50;
2370             goto set_syn_ok;
2371         }
2372         j = 0x60;
2373 set_syn_ok:
2374         dev->id[c][i].devsp = (dev->id[c][i].devsp & 0x0f) | j;
2375 #ifdef ED_DBGP
2376         printk("dev->id[%2d][%2d].devsp = %2x\n",
2377                c,i,dev->id[c][i].devsp);
2378 #endif
2379     }
2380 }