aic7xxx/aicasm/aicasm_insformat.h

0001 /*
0002  * Instruction formats for the sequencer program downloaded to
0003  * Aic7xxx SCSI host adapters
0004  *
0005  * Copyright (c) 1997, 1998, 2000 Justin T. Gibbs.
0006  * All rights reserved.
0007  *
0008  * Redistribution and use in source and binary forms, with or without
0009  * modification, are permitted provided that the following conditions
0010  * are met:
0011  * 1. Redistributions of source code must retain the above copyright
0012  *    notice, this list of conditions, and the following disclaimer,
0013  *    without modification.
0014  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
0015  *    substantially similar to the "NO WARRANTY" disclaimer below
0016  *    ("Disclaimer") and any redistribution must be conditioned upon
0017  *    including a substantially similar Disclaimer requirement for further
0018  *    binary redistribution.
0019  * 3. Neither the names of the above-listed copyright holders nor the names
0020  *    of any contributors may be used to endorse or promote products derived
0021  *    from this software without specific prior written permission.
0022  *
0023  * Alternatively, this software may be distributed under the terms of the
0024  * GNU General Public License ("GPL") version 2 as published by the Free
0025  * Software Foundation.
0026  *
0027  * NO WARRANTY
0028  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
0029  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
0030  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
0031  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
0032  * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
0033  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
0034  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
0035  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
0036  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
0037  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
0038  * POSSIBILITY OF SUCH DAMAGES.
0039  *
0040  * $Id: //depot/aic7xxx/aic7xxx/aicasm/aicasm_insformat.h#12 $
0041  *
0042  * $FreeBSD$
0043  */
0044
0045 #include <asm/byteorder.h>
0046
0047 /* 8bit ALU logic operations */
0048 struct ins_format1 {
0049 #ifdef __LITTLE_ENDIAN
0050     uint32_t    immediate   : 8,
0051             source      : 9,
0052             destination : 9,
0053             ret     : 1,
0054             opcode      : 4,
0055             parity      : 1;
0056 #else
0057     uint32_t    parity      : 1,
0058             opcode      : 4,
0059             ret     : 1,
0060             destination : 9,
0061             source      : 9,
0062             immediate   : 8;
0063 #endif
0064 };
0065
0066 /* 8bit ALU shift/rotate operations */
0067 struct ins_format2 {
0068 #ifdef __LITTLE_ENDIAN
0069     uint32_t    shift_control   : 8,
0070             source      : 9,
0071             destination : 9,
0072             ret     : 1,
0073             opcode      : 4,
0074             parity      : 1;
0075 #else
0076     uint32_t    parity      : 1,
0077             opcode      : 4,
0078             ret     : 1,
0079             destination : 9,
0080             source      : 9,
0081             shift_control   : 8;
0082 #endif
0083 };
0084
0085 /* 8bit branch control operations */
0086 struct ins_format3 {
0087 #ifdef __LITTLE_ENDIAN
0088     uint32_t    immediate   : 8,
0089             source      : 9,
0090             address     : 10,
0091             opcode      : 4,
0092             parity      : 1;
0093 #else
0094     uint32_t    parity      : 1,
0095             opcode      : 4,
0096             address     : 10,
0097             source      : 9,
0098             immediate   : 8;
0099 #endif
0100 };
0101
0102 /* 16bit ALU logic operations */
0103 struct ins_format4 {
0104 #ifdef __LITTLE_ENDIAN
0105     uint32_t    opcode_ext  : 8,
0106             source      : 9,
0107             destination : 9,
0108             ret     : 1,
0109             opcode      : 4,
0110             parity      : 1;
0111 #else
0112     uint32_t    parity      : 1,
0113             opcode      : 4,
0114             ret     : 1,
0115             destination : 9,
0116             source      : 9,
0117             opcode_ext  : 8;
0118 #endif
0119 };
0120
0121 /* 16bit branch control operations */
0122 struct ins_format5 {
0123 #ifdef __LITTLE_ENDIAN
0124     uint32_t    opcode_ext  : 8,
0125             source      : 9,
0126             address     : 10,
0127             opcode      : 4,
0128             parity      : 1;
0129 #else
0130     uint32_t    parity      : 1,
0131             opcode      : 4,
0132             address     : 10,
0133             source      : 9,
0134             opcode_ext  : 8;
0135 #endif
0136 };
0137
0138 /*  Far branch operations */
0139 struct ins_format6 {
0140 #ifdef __LITTLE_ENDIAN
0141     uint32_t    page        : 3,
0142             opcode_ext  : 5,
0143             source      : 9,
0144             address     : 10,
0145             opcode      : 4,
0146             parity      : 1;
0147 #else
0148     uint32_t    parity      : 1,
0149             opcode      : 4,
0150             address     : 10,
0151             source      : 9,
0152             opcode_ext  : 5,
0153             page        : 3;
0154 #endif
0155 };
0156
0157 union ins_formats {
0158         struct ins_format1 format1;
0159         struct ins_format2 format2;
0160         struct ins_format3 format3;
0161         struct ins_format4 format4;
0162         struct ins_format5 format5;
0163         struct ins_format6 format6;
0164         uint8_t        bytes[4];
0165         uint32_t       integer;
0166 };
0167 struct instruction {
0168     union   ins_formats format;
0169     u_int   srcline;
0170     struct symbol *patch_label;
0171     STAILQ_ENTRY(instruction) links;
0172 };
0173
0174 #define AIC_OP_OR   0x0
0175 #define AIC_OP_AND  0x1
0176 #define AIC_OP_XOR  0x2
0177 #define AIC_OP_ADD  0x3
0178 #define AIC_OP_ADC  0x4
0179 #define AIC_OP_ROL  0x5
0180 #define AIC_OP_BMOV 0x6
0181
0182 #define AIC_OP_MVI16    0x7
0183
0184 #define AIC_OP_JMP  0x8
0185 #define AIC_OP_JC   0x9
0186 #define AIC_OP_JNC  0xa
0187 #define AIC_OP_CALL 0xb
0188 #define AIC_OP_JNE  0xc
0189 #define AIC_OP_JNZ  0xd
0190 #define AIC_OP_JE   0xe
0191 #define AIC_OP_JZ   0xf
0192
0193 /* Pseudo Ops */
0194 #define AIC_OP_SHL  0x10
0195 #define AIC_OP_SHR  0x20
0196 #define AIC_OP_ROR  0x30
0197
0198 /* 16bit Ops. Low byte main opcode.  High byte extended opcode. */
0199 #define AIC_OP_OR16 0x8005
0200 #define AIC_OP_AND16    0x8105
0201 #define AIC_OP_XOR16    0x8205
0202 #define AIC_OP_ADD16    0x8305
0203 #define AIC_OP_ADC16    0x8405
0204 #define AIC_OP_JNE16    0x8805
0205 #define AIC_OP_JNZ16    0x8905
0206 #define AIC_OP_JE16 0x8C05
0207 #define AIC_OP_JZ16 0x8B05
0208 #define AIC_OP_JMP16    0x9005
0209 #define AIC_OP_JC16 0x9105
0210 #define AIC_OP_JNC16    0x9205
0211 #define AIC_OP_CALL16   0x9305
0212
0213 /* Page extension is low three bits of second opcode byte. */
0214 #define AIC_OP_JMPF 0xA005
0215 #define AIC_OP_CALLF    0xB005
0216 #define AIC_OP_JCF  0xC005
0217 #define AIC_OP_JNCF 0xD005
0218 #define AIC_OP_CMPXCHG  0xE005