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0001 /*
0002  * DO NOT EDIT - This file is automatically generated
0003  *               from the following source files:
0004  *
0005  * $Id: //depot/aic7xxx/aic7xxx/aic7xxx.seq#58 $
0006  * $Id: //depot/aic7xxx/aic7xxx/aic7xxx.reg#40 $
0007  */
0008 
0009 #include "aic7xxx_osm.h"
0010 
0011 static const ahc_reg_parse_entry_t SCSISEQ_parse_table[] = {
0012         { "SCSIRSTO",           0x01, 0x01 },
0013         { "ENAUTOATNP",         0x02, 0x02 },
0014         { "ENAUTOATNI",         0x04, 0x04 },
0015         { "ENAUTOATNO",         0x08, 0x08 },
0016         { "ENRSELI",            0x10, 0x10 },
0017         { "ENSELI",             0x20, 0x20 },
0018         { "ENSELO",             0x40, 0x40 },
0019         { "TEMODE",             0x80, 0x80 }
0020 };
0021 
0022 int
0023 ahc_scsiseq_print(u_int regvalue, u_int *cur_col, u_int wrap)
0024 {
0025         return (ahc_print_register(SCSISEQ_parse_table, 8, "SCSISEQ",
0026             0x00, regvalue, cur_col, wrap));
0027 }
0028 
0029 static const ahc_reg_parse_entry_t SXFRCTL0_parse_table[] = {
0030         { "CLRCHN",             0x02, 0x02 },
0031         { "SCAMEN",             0x04, 0x04 },
0032         { "SPIOEN",             0x08, 0x08 },
0033         { "CLRSTCNT",           0x10, 0x10 },
0034         { "FAST20",             0x20, 0x20 },
0035         { "DFPEXP",             0x40, 0x40 },
0036         { "DFON",               0x80, 0x80 }
0037 };
0038 
0039 int
0040 ahc_sxfrctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
0041 {
0042         return (ahc_print_register(SXFRCTL0_parse_table, 7, "SXFRCTL0",
0043             0x01, regvalue, cur_col, wrap));
0044 }
0045 
0046 static const ahc_reg_parse_entry_t SCSISIGI_parse_table[] = {
0047         { "ACKI",               0x01, 0x01 },
0048         { "REQI",               0x02, 0x02 },
0049         { "BSYI",               0x04, 0x04 },
0050         { "SELI",               0x08, 0x08 },
0051         { "ATNI",               0x10, 0x10 },
0052         { "MSGI",               0x20, 0x20 },
0053         { "IOI",                0x40, 0x40 },
0054         { "CDI",                0x80, 0x80 },
0055         { "P_DATAOUT",          0x00, 0x00 },
0056         { "P_DATAOUT_DT",       0x20, 0x20 },
0057         { "P_DATAIN",           0x40, 0x40 },
0058         { "P_DATAIN_DT",        0x60, 0x60 },
0059         { "P_COMMAND",          0x80, 0x80 },
0060         { "P_MESGOUT",          0xa0, 0xa0 },
0061         { "P_STATUS",           0xc0, 0xc0 },
0062         { "PHASE_MASK",         0xe0, 0xe0 },
0063         { "P_MESGIN",           0xe0, 0xe0 }
0064 };
0065 
0066 int
0067 ahc_scsisigi_print(u_int regvalue, u_int *cur_col, u_int wrap)
0068 {
0069         return (ahc_print_register(SCSISIGI_parse_table, 17, "SCSISIGI",
0070             0x03, regvalue, cur_col, wrap));
0071 }
0072 
0073 static const ahc_reg_parse_entry_t SCSIRATE_parse_table[] = {
0074         { "SINGLE_EDGE",        0x10, 0x10 },
0075         { "ENABLE_CRC",         0x40, 0x40 },
0076         { "WIDEXFER",           0x80, 0x80 },
0077         { "SXFR_ULTRA2",        0x0f, 0x0f },
0078         { "SOFS",               0x0f, 0x0f },
0079         { "SXFR",               0x70, 0x70 }
0080 };
0081 
0082 int
0083 ahc_scsirate_print(u_int regvalue, u_int *cur_col, u_int wrap)
0084 {
0085         return (ahc_print_register(SCSIRATE_parse_table, 6, "SCSIRATE",
0086             0x04, regvalue, cur_col, wrap));
0087 }
0088 
0089 static const ahc_reg_parse_entry_t SSTAT0_parse_table[] = {
0090         { "DMADONE",            0x01, 0x01 },
0091         { "SPIORDY",            0x02, 0x02 },
0092         { "SDONE",              0x04, 0x04 },
0093         { "SWRAP",              0x08, 0x08 },
0094         { "IOERR",              0x08, 0x08 },
0095         { "SELINGO",            0x10, 0x10 },
0096         { "SELDI",              0x20, 0x20 },
0097         { "SELDO",              0x40, 0x40 },
0098         { "TARGET",             0x80, 0x80 }
0099 };
0100 
0101 int
0102 ahc_sstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
0103 {
0104         return (ahc_print_register(SSTAT0_parse_table, 9, "SSTAT0",
0105             0x0b, regvalue, cur_col, wrap));
0106 }
0107 
0108 static const ahc_reg_parse_entry_t SSTAT1_parse_table[] = {
0109         { "REQINIT",            0x01, 0x01 },
0110         { "PHASECHG",           0x02, 0x02 },
0111         { "SCSIPERR",           0x04, 0x04 },
0112         { "BUSFREE",            0x08, 0x08 },
0113         { "PHASEMIS",           0x10, 0x10 },
0114         { "SCSIRSTI",           0x20, 0x20 },
0115         { "ATNTARG",            0x40, 0x40 },
0116         { "SELTO",              0x80, 0x80 }
0117 };
0118 
0119 int
0120 ahc_sstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
0121 {
0122         return (ahc_print_register(SSTAT1_parse_table, 8, "SSTAT1",
0123             0x0c, regvalue, cur_col, wrap));
0124 }
0125 
0126 static const ahc_reg_parse_entry_t SSTAT2_parse_table[] = {
0127         { "DUAL_EDGE_ERR",      0x01, 0x01 },
0128         { "CRCREQERR",          0x02, 0x02 },
0129         { "CRCENDERR",          0x04, 0x04 },
0130         { "CRCVALERR",          0x08, 0x08 },
0131         { "EXP_ACTIVE",         0x10, 0x10 },
0132         { "SHVALID",            0x40, 0x40 },
0133         { "OVERRUN",            0x80, 0x80 },
0134         { "SFCNT",              0x1f, 0x1f }
0135 };
0136 
0137 int
0138 ahc_sstat2_print(u_int regvalue, u_int *cur_col, u_int wrap)
0139 {
0140         return (ahc_print_register(SSTAT2_parse_table, 8, "SSTAT2",
0141             0x0d, regvalue, cur_col, wrap));
0142 }
0143 
0144 static const ahc_reg_parse_entry_t SSTAT3_parse_table[] = {
0145         { "OFFCNT",             0x0f, 0x0f },
0146         { "U2OFFCNT",           0x7f, 0x7f },
0147         { "SCSICNT",            0xf0, 0xf0 }
0148 };
0149 
0150 int
0151 ahc_sstat3_print(u_int regvalue, u_int *cur_col, u_int wrap)
0152 {
0153         return (ahc_print_register(SSTAT3_parse_table, 3, "SSTAT3",
0154             0x0e, regvalue, cur_col, wrap));
0155 }
0156 
0157 static const ahc_reg_parse_entry_t SIMODE0_parse_table[] = {
0158         { "ENDMADONE",          0x01, 0x01 },
0159         { "ENSPIORDY",          0x02, 0x02 },
0160         { "ENSDONE",            0x04, 0x04 },
0161         { "ENSWRAP",            0x08, 0x08 },
0162         { "ENIOERR",            0x08, 0x08 },
0163         { "ENSELINGO",          0x10, 0x10 },
0164         { "ENSELDI",            0x20, 0x20 },
0165         { "ENSELDO",            0x40, 0x40 }
0166 };
0167 
0168 int
0169 ahc_simode0_print(u_int regvalue, u_int *cur_col, u_int wrap)
0170 {
0171         return (ahc_print_register(SIMODE0_parse_table, 8, "SIMODE0",
0172             0x10, regvalue, cur_col, wrap));
0173 }
0174 
0175 static const ahc_reg_parse_entry_t SIMODE1_parse_table[] = {
0176         { "ENREQINIT",          0x01, 0x01 },
0177         { "ENPHASECHG",         0x02, 0x02 },
0178         { "ENSCSIPERR",         0x04, 0x04 },
0179         { "ENBUSFREE",          0x08, 0x08 },
0180         { "ENPHASEMIS",         0x10, 0x10 },
0181         { "ENSCSIRST",          0x20, 0x20 },
0182         { "ENATNTARG",          0x40, 0x40 },
0183         { "ENSELTIMO",          0x80, 0x80 }
0184 };
0185 
0186 int
0187 ahc_simode1_print(u_int regvalue, u_int *cur_col, u_int wrap)
0188 {
0189         return (ahc_print_register(SIMODE1_parse_table, 8, "SIMODE1",
0190             0x11, regvalue, cur_col, wrap));
0191 }
0192 
0193 int
0194 ahc_scsibusl_print(u_int regvalue, u_int *cur_col, u_int wrap)
0195 {
0196         return (ahc_print_register(NULL, 0, "SCSIBUSL",
0197             0x12, regvalue, cur_col, wrap));
0198 }
0199 
0200 static const ahc_reg_parse_entry_t SBLKCTL_parse_table[] = {
0201         { "XCVR",               0x01, 0x01 },
0202         { "SELWIDE",            0x02, 0x02 },
0203         { "ENAB20",             0x04, 0x04 },
0204         { "SELBUSB",            0x08, 0x08 },
0205         { "ENAB40",             0x08, 0x08 },
0206         { "AUTOFLUSHDIS",       0x20, 0x20 },
0207         { "DIAGLEDON",          0x40, 0x40 },
0208         { "DIAGLEDEN",          0x80, 0x80 }
0209 };
0210 
0211 int
0212 ahc_sblkctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
0213 {
0214         return (ahc_print_register(SBLKCTL_parse_table, 8, "SBLKCTL",
0215             0x1f, regvalue, cur_col, wrap));
0216 }
0217 
0218 static const ahc_reg_parse_entry_t SEQ_FLAGS_parse_table[] = {
0219         { "NO_DISCONNECT",      0x01, 0x01 },
0220         { "SPHASE_PENDING",     0x02, 0x02 },
0221         { "DPHASE_PENDING",     0x04, 0x04 },
0222         { "CMDPHASE_PENDING",   0x08, 0x08 },
0223         { "TARG_CMD_PENDING",   0x10, 0x10 },
0224         { "DPHASE",             0x20, 0x20 },
0225         { "NO_CDB_SENT",        0x40, 0x40 },
0226         { "TARGET_CMD_IS_TAGGED",0x40, 0x40 },
0227         { "NOT_IDENTIFIED",     0x80, 0x80 }
0228 };
0229 
0230 int
0231 ahc_seq_flags_print(u_int regvalue, u_int *cur_col, u_int wrap)
0232 {
0233         return (ahc_print_register(SEQ_FLAGS_parse_table, 9, "SEQ_FLAGS",
0234             0x3c, regvalue, cur_col, wrap));
0235 }
0236 
0237 static const ahc_reg_parse_entry_t LASTPHASE_parse_table[] = {
0238         { "MSGI",               0x20, 0x20 },
0239         { "IOI",                0x40, 0x40 },
0240         { "CDI",                0x80, 0x80 },
0241         { "P_DATAOUT",          0x00, 0x00 },
0242         { "P_BUSFREE",          0x01, 0x01 },
0243         { "P_DATAIN",           0x40, 0x40 },
0244         { "P_COMMAND",          0x80, 0x80 },
0245         { "P_MESGOUT",          0xa0, 0xa0 },
0246         { "P_STATUS",           0xc0, 0xc0 },
0247         { "PHASE_MASK",         0xe0, 0xe0 },
0248         { "P_MESGIN",           0xe0, 0xe0 }
0249 };
0250 
0251 int
0252 ahc_lastphase_print(u_int regvalue, u_int *cur_col, u_int wrap)
0253 {
0254         return (ahc_print_register(LASTPHASE_parse_table, 11, "LASTPHASE",
0255             0x3f, regvalue, cur_col, wrap));
0256 }
0257 
0258 static const ahc_reg_parse_entry_t SEQCTL_parse_table[] = {
0259         { "LOADRAM",            0x01, 0x01 },
0260         { "SEQRESET",           0x02, 0x02 },
0261         { "STEP",               0x04, 0x04 },
0262         { "BRKADRINTEN",        0x08, 0x08 },
0263         { "FASTMODE",           0x10, 0x10 },
0264         { "FAILDIS",            0x20, 0x20 },
0265         { "PAUSEDIS",           0x40, 0x40 },
0266         { "PERRORDIS",          0x80, 0x80 }
0267 };
0268 
0269 int
0270 ahc_seqctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
0271 {
0272         return (ahc_print_register(SEQCTL_parse_table, 8, "SEQCTL",
0273             0x60, regvalue, cur_col, wrap));
0274 }
0275 
0276 int
0277 ahc_sram_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
0278 {
0279         return (ahc_print_register(NULL, 0, "SRAM_BASE",
0280             0x70, regvalue, cur_col, wrap));
0281 }
0282 
0283 static const ahc_reg_parse_entry_t ERROR_parse_table[] = {
0284         { "ILLHADDR",           0x01, 0x01 },
0285         { "ILLSADDR",           0x02, 0x02 },
0286         { "ILLOPCODE",          0x04, 0x04 },
0287         { "SQPARERR",           0x08, 0x08 },
0288         { "DPARERR",            0x10, 0x10 },
0289         { "MPARERR",            0x20, 0x20 },
0290         { "PCIERRSTAT",         0x40, 0x40 },
0291         { "CIOPARERR",          0x80, 0x80 }
0292 };
0293 
0294 int
0295 ahc_error_print(u_int regvalue, u_int *cur_col, u_int wrap)
0296 {
0297         return (ahc_print_register(ERROR_parse_table, 8, "ERROR",
0298             0x92, regvalue, cur_col, wrap));
0299 }
0300 
0301 static const ahc_reg_parse_entry_t DFCNTRL_parse_table[] = {
0302         { "FIFORESET",          0x01, 0x01 },
0303         { "FIFOFLUSH",          0x02, 0x02 },
0304         { "DIRECTION",          0x04, 0x04 },
0305         { "HDMAEN",             0x08, 0x08 },
0306         { "HDMAENACK",          0x08, 0x08 },
0307         { "SDMAEN",             0x10, 0x10 },
0308         { "SDMAENACK",          0x10, 0x10 },
0309         { "SCSIEN",             0x20, 0x20 },
0310         { "WIDEODD",            0x40, 0x40 },
0311         { "PRELOADEN",          0x80, 0x80 }
0312 };
0313 
0314 int
0315 ahc_dfcntrl_print(u_int regvalue, u_int *cur_col, u_int wrap)
0316 {
0317         return (ahc_print_register(DFCNTRL_parse_table, 10, "DFCNTRL",
0318             0x93, regvalue, cur_col, wrap));
0319 }
0320 
0321 static const ahc_reg_parse_entry_t DFSTATUS_parse_table[] = {
0322         { "FIFOEMP",            0x01, 0x01 },
0323         { "FIFOFULL",           0x02, 0x02 },
0324         { "DFTHRESH",           0x04, 0x04 },
0325         { "HDONE",              0x08, 0x08 },
0326         { "MREQPEND",           0x10, 0x10 },
0327         { "FIFOQWDEMP",         0x20, 0x20 },
0328         { "DFCACHETH",          0x40, 0x40 },
0329         { "PRELOAD_AVAIL",      0x80, 0x80 }
0330 };
0331 
0332 int
0333 ahc_dfstatus_print(u_int regvalue, u_int *cur_col, u_int wrap)
0334 {
0335         return (ahc_print_register(DFSTATUS_parse_table, 8, "DFSTATUS",
0336             0x94, regvalue, cur_col, wrap));
0337 }
0338 
0339 static const ahc_reg_parse_entry_t SCSIPHASE_parse_table[] = {
0340         { "DATA_OUT_PHASE",     0x01, 0x01 },
0341         { "DATA_IN_PHASE",      0x02, 0x02 },
0342         { "MSG_OUT_PHASE",      0x04, 0x04 },
0343         { "MSG_IN_PHASE",       0x08, 0x08 },
0344         { "COMMAND_PHASE",      0x10, 0x10 },
0345         { "STATUS_PHASE",       0x20, 0x20 },
0346         { "DATA_PHASE_MASK",    0x03, 0x03 }
0347 };
0348 
0349 int
0350 ahc_scsiphase_print(u_int regvalue, u_int *cur_col, u_int wrap)
0351 {
0352         return (ahc_print_register(SCSIPHASE_parse_table, 7, "SCSIPHASE",
0353             0x9e, regvalue, cur_col, wrap));
0354 }
0355 
0356 int
0357 ahc_scb_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
0358 {
0359         return (ahc_print_register(NULL, 0, "SCB_BASE",
0360             0xa0, regvalue, cur_col, wrap));
0361 }
0362 
0363 static const ahc_reg_parse_entry_t SCB_CONTROL_parse_table[] = {
0364         { "DISCONNECTED",       0x04, 0x04 },
0365         { "ULTRAENB",           0x08, 0x08 },
0366         { "MK_MESSAGE",         0x10, 0x10 },
0367         { "TAG_ENB",            0x20, 0x20 },
0368         { "DISCENB",            0x40, 0x40 },
0369         { "TARGET_SCB",         0x80, 0x80 },
0370         { "STATUS_RCVD",        0x80, 0x80 },
0371         { "SCB_TAG_TYPE",       0x03, 0x03 }
0372 };
0373 
0374 int
0375 ahc_scb_control_print(u_int regvalue, u_int *cur_col, u_int wrap)
0376 {
0377         return (ahc_print_register(SCB_CONTROL_parse_table, 8, "SCB_CONTROL",
0378             0xb8, regvalue, cur_col, wrap));
0379 }
0380 
0381 static const ahc_reg_parse_entry_t SCB_SCSIID_parse_table[] = {
0382         { "TWIN_CHNLB",         0x80, 0x80 },
0383         { "OID",                0x0f, 0x0f },
0384         { "TWIN_TID",           0x70, 0x70 },
0385         { "TID",                0xf0, 0xf0 }
0386 };
0387 
0388 int
0389 ahc_scb_scsiid_print(u_int regvalue, u_int *cur_col, u_int wrap)
0390 {
0391         return (ahc_print_register(SCB_SCSIID_parse_table, 4, "SCB_SCSIID",
0392             0xb9, regvalue, cur_col, wrap));
0393 }
0394 
0395 static const ahc_reg_parse_entry_t SCB_LUN_parse_table[] = {
0396         { "SCB_XFERLEN_ODD",    0x80, 0x80 },
0397         { "LID",                0x3f, 0x3f }
0398 };
0399 
0400 int
0401 ahc_scb_lun_print(u_int regvalue, u_int *cur_col, u_int wrap)
0402 {
0403         return (ahc_print_register(SCB_LUN_parse_table, 2, "SCB_LUN",
0404             0xba, regvalue, cur_col, wrap));
0405 }
0406 
0407 int
0408 ahc_scb_tag_print(u_int regvalue, u_int *cur_col, u_int wrap)
0409 {
0410         return (ahc_print_register(NULL, 0, "SCB_TAG",
0411             0xbb, regvalue, cur_col, wrap));
0412 }
0413