drivers/scsi/aha152x.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef _AHA152X_H
0003 #define _AHA152X_H
0004
0005 /*
0006  * $Id: aha152x.h,v 2.7 2004/01/24 11:39:03 fischer Exp $
0007  */
0008
0009 /* number of queueable commands
0010    (unless we support more than 1 cmd_per_lun this should do) */
0011 #define AHA152X_MAXQUEUE 7
0012
0013 #define AHA152X_REVID "Adaptec 152x SCSI driver; $Revision: 2.7 $"
0014
0015 /* port addresses */
0016 #define SCSISEQ      (HOSTIOPORT0+0x00)    /* SCSI sequence control */
0017 #define SXFRCTL0     (HOSTIOPORT0+0x01)    /* SCSI transfer control 0 */
0018 #define SXFRCTL1     (HOSTIOPORT0+0x02)    /* SCSI transfer control 1 */
0019 #define SCSISIG      (HOSTIOPORT0+0x03)    /* SCSI signal in/out */
0020 #define SCSIRATE     (HOSTIOPORT0+0x04)    /* SCSI rate control */
0021 #define SELID        (HOSTIOPORT0+0x05)    /* selection/reselection ID */
0022 #define SCSIID       SELID                 /* SCSI ID */
0023 #define SCSIDAT      (HOSTIOPORT0+0x06)    /* SCSI latched data */
0024 #define SCSIBUS      (HOSTIOPORT0+0x07)    /* SCSI data bus */
0025 #define STCNT0       (HOSTIOPORT0+0x08)    /* SCSI transfer count 0 */
0026 #define STCNT1       (HOSTIOPORT0+0x09)    /* SCSI transfer count 1 */
0027 #define STCNT2       (HOSTIOPORT0+0x0a)    /* SCSI transfer count 2 */
0028 #define SSTAT0       (HOSTIOPORT0+0x0b)    /* SCSI interrupt status 0 */
0029 #define SSTAT1       (HOSTIOPORT0+0x0c)    /* SCSI interrupt status 1 */
0030 #define SSTAT2       (HOSTIOPORT0+0x0d)    /* SCSI interrupt status 2 */
0031 #define SCSITEST     (HOSTIOPORT0+0x0e)    /* SCSI test control */
0032 #define SSTAT3       SCSITEST              /* SCSI interrupt status 3 */
0033 #define SSTAT4       (HOSTIOPORT0+0x0f)    /* SCSI status 4 */
0034 #define SIMODE0      (HOSTIOPORT1+0x10)    /* SCSI interrupt mode 0 */
0035 #define SIMODE1      (HOSTIOPORT1+0x11)    /* SCSI interrupt mode 1 */
0036 #define DMACNTRL0    (HOSTIOPORT1+0x12)    /* DMA control 0 */
0037 #define DMACNTRL1    (HOSTIOPORT1+0x13)    /* DMA control 1 */
0038 #define DMASTAT      (HOSTIOPORT1+0x14)    /* DMA status */
0039 #define FIFOSTAT     (HOSTIOPORT1+0x15)    /* FIFO status */
0040 #define DATAPORT     (HOSTIOPORT1+0x16)    /* DATA port */
0041 #define BRSTCNTRL    (HOSTIOPORT1+0x18)    /* burst control */
0042 #define PORTA        (HOSTIOPORT1+0x1a)    /* PORT A */
0043 #define PORTB        (HOSTIOPORT1+0x1b)    /* PORT B */
0044 #define REV          (HOSTIOPORT1+0x1c)    /* revision */
0045 #define STACK        (HOSTIOPORT1+0x1d)    /* stack */
0046 #define TEST         (HOSTIOPORT1+0x1e)    /* test register */
0047
0048 #define IO_RANGE        0x20
0049
0050 /* used in aha152x_porttest */
0051 #define O_PORTA         0x1a               /* PORT A */
0052 #define O_PORTB         0x1b               /* PORT B */
0053 #define O_DMACNTRL1     0x13               /* DMA control 1 */
0054 #define O_STACK         0x1d               /* stack */
0055
0056 /* used in tc1550_porttest */
0057 #define O_TC_PORTA      0x0a               /* PORT A */
0058 #define O_TC_PORTB      0x0b               /* PORT B */
0059 #define O_TC_DMACNTRL1  0x03               /* DMA control 1 */
0060 #define O_TC_STACK      0x0d               /* stack */
0061
0062 /* bits and bitmasks to ports */
0063
0064 /* SCSI sequence control */
0065 #define TEMODEO      0x80
0066 #define ENSELO       0x40
0067 #define ENSELI       0x20
0068 #define ENRESELI     0x10
0069 #define ENAUTOATNO   0x08
0070 #define ENAUTOATNI   0x04
0071 #define ENAUTOATNP   0x02
0072 #define SCSIRSTO     0x01
0073
0074 /* SCSI transfer control 0 */
0075 #define SCSIEN       0x80
0076 #define DMAEN        0x40
0077 #define CH1          0x20
0078 #define CLRSTCNT     0x10
0079 #define SPIOEN       0x08
0080 #define CLRCH1       0x02
0081
0082 /* SCSI transfer control 1 */
0083 #define BITBUCKET    0x80
0084 #define SWRAPEN      0x40
0085 #define ENSPCHK      0x20
0086 #define STIMESEL     0x18    /* mask */
0087 #define STIMESEL_    3
0088 #define ENSTIMER     0x04
0089 #define BYTEALIGN    0x02
0090
0091 /* SCSI signal IN */
0092 #define SIG_CDI          0x80
0093 #define SIG_IOI          0x40
0094 #define SIG_MSGI         0x20
0095 #define SIG_ATNI         0x10
0096 #define SIG_SELI         0x08
0097 #define SIG_BSYI         0x04
0098 #define SIG_REQI         0x02
0099 #define SIG_ACKI         0x01
0100
0101 /* SCSI Phases */
0102 #define P_MASK       (SIG_MSGI|SIG_CDI|SIG_IOI)
0103 #define P_DATAO      (0)
0104 #define P_DATAI      (SIG_IOI)
0105 #define P_CMD        (SIG_CDI)
0106 #define P_STATUS     (SIG_CDI|SIG_IOI)
0107 #define P_MSGO       (SIG_MSGI|SIG_CDI)
0108 #define P_MSGI       (SIG_MSGI|SIG_CDI|SIG_IOI)
0109
0110 /* SCSI signal OUT */
0111 #define SIG_CDO          0x80
0112 #define SIG_IOO          0x40
0113 #define SIG_MSGO         0x20
0114 #define SIG_ATNO         0x10
0115 #define SIG_SELO         0x08
0116 #define SIG_BSYO         0x04
0117 #define SIG_REQO         0x02
0118 #define SIG_ACKO         0x01
0119
0120 /* SCSI rate control */
0121 #define SXFR         0x70    /* mask */
0122 #define SXFR_        4
0123 #define SOFS         0x0f    /* mask */
0124
0125 /* SCSI ID */
0126 #define OID          0x70
0127 #define OID_         4
0128 #define TID          0x07
0129
0130 /* SCSI transfer count */
0131 #define GETSTCNT() ( (GETPORT(STCNT2)<<16) \
0132                    + (GETPORT(STCNT1)<< 8) \
0133                    + GETPORT(STCNT0) )
0134
0135 #define SETSTCNT(X) { SETPORT(STCNT2, ((X) & 0xFF0000) >> 16); \
0136                       SETPORT(STCNT1, ((X) & 0x00FF00) >>  8); \
0137                       SETPORT(STCNT0, ((X) & 0x0000FF) ); }
0138
0139 /* SCSI interrupt status */
0140 #define TARGET       0x80
0141 #define SELDO        0x40
0142 #define SELDI        0x20
0143 #define SELINGO      0x10
0144 #define SWRAP        0x08
0145 #define SDONE        0x04
0146 #define SPIORDY      0x02
0147 #define DMADONE      0x01
0148
0149 #define SETSDONE     0x80
0150 #define CLRSELDO     0x40
0151 #define CLRSELDI     0x20
0152 #define CLRSELINGO   0x10
0153 #define CLRSWRAP     0x08
0154 #define CLRSDONE     0x04
0155 #define CLRSPIORDY   0x02
0156 #define CLRDMADONE   0x01
0157
0158 /* SCSI status 1 */
0159 #define SELTO        0x80
0160 #define ATNTARG      0x40
0161 #define SCSIRSTI     0x20
0162 #define PHASEMIS     0x10
0163 #define BUSFREE      0x08
0164 #define SCSIPERR     0x04
0165 #define PHASECHG     0x02
0166 #define REQINIT      0x01
0167
0168 #define CLRSELTIMO   0x80
0169 #define CLRATNO      0x40
0170 #define CLRSCSIRSTI  0x20
0171 #define CLRBUSFREE   0x08
0172 #define CLRSCSIPERR  0x04
0173 #define CLRPHASECHG  0x02
0174 #define CLRREQINIT   0x01
0175
0176 /* SCSI status 2 */
0177 #define SOFFSET      0x20
0178 #define SEMPTY       0x10
0179 #define SFULL        0x08
0180 #define SFCNT        0x07    /* mask */
0181
0182 /* SCSI status 3 */
0183 #define SCSICNT      0xf0    /* mask */
0184 #define SCSICNT_     4
0185 #define OFFCNT       0x0f    /* mask */
0186
0187 /* SCSI TEST control */
0188 #define SCTESTU      0x08
0189 #define SCTESTD      0x04
0190 #define STCTEST      0x01
0191
0192 /* SCSI status 4 */
0193 #define SYNCERR      0x04
0194 #define FWERR        0x02
0195 #define FRERR        0x01
0196
0197 #define CLRSYNCERR   0x04
0198 #define CLRFWERR     0x02
0199 #define CLRFRERR     0x01
0200
0201 /* SCSI interrupt mode 0 */
0202 #define ENSELDO      0x40
0203 #define ENSELDI      0x20
0204 #define ENSELINGO    0x10
0205 #define ENSWRAP      0x08
0206 #define ENSDONE      0x04
0207 #define ENSPIORDY    0x02
0208 #define ENDMADONE    0x01
0209
0210 /* SCSI interrupt mode 1 */
0211 #define ENSELTIMO    0x80
0212 #define ENATNTARG    0x40
0213 #define ENSCSIRST    0x20
0214 #define ENPHASEMIS   0x10
0215 #define ENBUSFREE    0x08
0216 #define ENSCSIPERR   0x04
0217 #define ENPHASECHG   0x02
0218 #define ENREQINIT    0x01
0219
0220 /* DMA control 0 */
0221 #define ENDMA        0x80
0222 #define _8BIT        0x40
0223 #define DMA          0x20
0224 #define WRITE_READ   0x08
0225 #define INTEN        0x04
0226 #define RSTFIFO      0x02
0227 #define SWINT        0x01
0228
0229 /* DMA control 1 */
0230 #define PWRDWN       0x80
0231 #define STK          0x07    /* mask */
0232
0233 /* DMA status */
0234 #define ATDONE       0x80
0235 #define WORDRDY      0x40
0236 #define INTSTAT      0x20
0237 #define DFIFOFULL    0x10
0238 #define DFIFOEMP     0x08
0239
0240 /* BURST control */
0241 #define BON          0xf0
0242 #define BOFF         0x0f
0243
0244 /* TEST REGISTER */
0245 #define BOFFTMR      0x40
0246 #define BONTMR       0x20
0247 #define STCNTH       0x10
0248 #define STCNTM       0x08
0249 #define STCNTL       0x04
0250 #define SCSIBLK      0x02
0251 #define DMABLK       0x01
0252
0253 /* On the AHA-152x board PORTA and PORTB contain
0254    some information about the board's configuration. */
0255 typedef union {
0256   struct {
0257     unsigned reserved:2;    /* reserved */
0258     unsigned tardisc:1;     /* Target disconnect: 0=disabled, 1=enabled */
0259     unsigned syncneg:1;     /* Initial sync neg: 0=disabled, 1=enabled */
0260     unsigned msgclasses:2;  /* Message classes
0261                                  0=#4
0262                                  1=#0, #1, #2, #3, #4
0263                                  2=#0, #3, #4
0264                                  3=#0, #4
0265                              */
0266     unsigned boot:1;        /* boot: 0=disabled, 1=enabled */
0267     unsigned dma:1;         /* Transfer mode: 0=PIO; 1=DMA */
0268     unsigned id:3;          /* SCSI-id */
0269     unsigned irq:2;         /* IRQ-Channel: 0,3=12, 1=10, 2=11 */
0270     unsigned dmachan:2;     /* DMA-Channel: 0=0, 1=5, 2=6, 3=7 */
0271     unsigned parity:1;      /* SCSI-parity: 1=enabled 0=disabled */
0272   } fields;
0273   unsigned short port;
0274 } aha152x_config ;
0275
0276 #define cf_parity     fields.parity
0277 #define cf_dmachan    fields.dmachan
0278 #define cf_irq        fields.irq
0279 #define cf_id         fields.id
0280 #define cf_dma        fields.dma
0281 #define cf_boot       fields.boot
0282 #define cf_msgclasses fields.msgclasses
0283 #define cf_syncneg    fields.syncneg
0284 #define cf_tardisc    fields.tardisc
0285 #define cf_port       port
0286
0287 /* Some macros to manipulate ports and their bits */
0288
0289 #define SETPORT(PORT, VAL)  outb( (VAL), (PORT) )
0290 #define GETPORT(PORT)       inb( PORT )
0291 #define SETBITS(PORT, BITS) outb( (inb(PORT) | (BITS)), (PORT) )
0292 #define CLRBITS(PORT, BITS) outb( (inb(PORT) & ~(BITS)), (PORT) )
0293 #define TESTHI(PORT, BITS)  ((inb(PORT) & (BITS)) == (BITS))
0294 #define TESTLO(PORT, BITS)  ((inb(PORT) & (BITS)) == 0)
0295
0296 #define SETRATE(RATE)       SETPORT(SCSIRATE,(RATE) & 0x7f)
0297
0298 #if defined(AHA152X_DEBUG)
0299 enum {
0300   debug_procinfo  = 0x0001,
0301   debug_queue     = 0x0002,
0302   debug_locking   = 0x0004,
0303   debug_intr      = 0x0008,
0304   debug_selection = 0x0010,
0305   debug_msgo      = 0x0020,
0306   debug_msgi      = 0x0040,
0307   debug_status    = 0x0080,
0308   debug_cmd       = 0x0100,
0309   debug_datai     = 0x0200,
0310   debug_datao     = 0x0400,
0311   debug_eh    = 0x0800,
0312   debug_done      = 0x1000,
0313   debug_phases    = 0x2000,
0314 };
0315 #endif
0316
0317 /* for the pcmcia stub */
0318 struct aha152x_setup {
0319     int io_port;
0320     int irq;
0321     int scsiid;
0322     int reconnect;
0323     int parity;
0324     int synchronous;
0325     int delay;
0326     int ext_trans;
0327     int tc1550;
0328 #if defined(AHA152X_DEBUG)
0329     int debug;
0330 #endif
0331     char *conf;
0332 };
0333
0334 struct Scsi_Host *aha152x_probe_one(struct aha152x_setup *);
0335 void aha152x_release(struct Scsi_Host *);
0336 int aha152x_host_reset_host(struct Scsi_Host *);
0337
0338 #endif /* _AHA152X_H */