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0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * NCR 5380 generic driver routines.  These should make it *trivial*
0004  * to implement 5380 SCSI drivers under Linux with a non-trantor
0005  * architecture.
0006  *
0007  * Note that these routines also work with NR53c400 family chips.
0008  *
0009  * Copyright 1993, Drew Eckhardt
0010  * Visionary Computing
0011  * (Unix and Linux consulting and custom programming)
0012  * drew@colorado.edu
0013  * +1 (303) 666-5836
0014  *
0015  * For more information, please consult
0016  *
0017  * NCR 5380 Family
0018  * SCSI Protocol Controller
0019  * Databook
0020  *
0021  * NCR Microelectronics
0022  * 1635 Aeroplaza Drive
0023  * Colorado Springs, CO 80916
0024  * 1+ (719) 578-3400
0025  * 1+ (800) 334-5454
0026  */
0027 
0028 /*
0029  * With contributions from Ray Van Tassle, Ingmar Baumgart,
0030  * Ronald van Cuijlenborg, Alan Cox and others.
0031  */
0032 
0033 /* Ported to Atari by Roman Hodek and others. */
0034 
0035 /* Adapted for the Sun 3 by Sam Creasey. */
0036 
0037 /*
0038  * Design
0039  *
0040  * This is a generic 5380 driver.  To use it on a different platform,
0041  * one simply writes appropriate system specific macros (ie, data
0042  * transfer - some PC's will use the I/O bus, 68K's must use
0043  * memory mapped) and drops this file in their 'C' wrapper.
0044  *
0045  * As far as command queueing, two queues are maintained for
0046  * each 5380 in the system - commands that haven't been issued yet,
0047  * and commands that are currently executing.  This means that an
0048  * unlimited number of commands may be queued, letting
0049  * more commands propagate from the higher driver levels giving higher
0050  * throughput.  Note that both I_T_L and I_T_L_Q nexuses are supported,
0051  * allowing multiple commands to propagate all the way to a SCSI-II device
0052  * while a command is already executing.
0053  *
0054  *
0055  * Issues specific to the NCR5380 :
0056  *
0057  * When used in a PIO or pseudo-dma mode, the NCR5380 is a braindead
0058  * piece of hardware that requires you to sit in a loop polling for
0059  * the REQ signal as long as you are connected.  Some devices are
0060  * brain dead (ie, many TEXEL CD ROM drives) and won't disconnect
0061  * while doing long seek operations. [...] These
0062  * broken devices are the exception rather than the rule and I'd rather
0063  * spend my time optimizing for the normal case.
0064  *
0065  * Architecture :
0066  *
0067  * At the heart of the design is a coroutine, NCR5380_main,
0068  * which is started from a workqueue for each NCR5380 host in the
0069  * system.  It attempts to establish I_T_L or I_T_L_Q nexuses by
0070  * removing the commands from the issue queue and calling
0071  * NCR5380_select() if a nexus is not established.
0072  *
0073  * Once a nexus is established, the NCR5380_information_transfer()
0074  * phase goes through the various phases as instructed by the target.
0075  * if the target goes into MSG IN and sends a DISCONNECT message,
0076  * the command structure is placed into the per instance disconnected
0077  * queue, and NCR5380_main tries to find more work.  If the target is
0078  * idle for too long, the system will try to sleep.
0079  *
0080  * If a command has disconnected, eventually an interrupt will trigger,
0081  * calling NCR5380_intr()  which will in turn call NCR5380_reselect
0082  * to reestablish a nexus.  This will run main if necessary.
0083  *
0084  * On command termination, the done function will be called as
0085  * appropriate.
0086  *
0087  * The command data pointer is initialized after the command is connected
0088  * in NCR5380_select, and set as appropriate in NCR5380_information_transfer.
0089  * Note that in violation of the standard, an implicit SAVE POINTERS operation
0090  * is done, since some BROKEN disks fail to issue an explicit SAVE POINTERS.
0091  */
0092 
0093 /*
0094  * Using this file :
0095  * This file a skeleton Linux SCSI driver for the NCR 5380 series
0096  * of chips.  To use it, you write an architecture specific functions
0097  * and macros and include this file in your driver.
0098  *
0099  * These macros MUST be defined :
0100  *
0101  * NCR5380_read(register)  - read from the specified register
0102  *
0103  * NCR5380_write(register, value) - write to the specific register
0104  *
0105  * NCR5380_implementation_fields  - additional fields needed for this
0106  * specific implementation of the NCR5380
0107  *
0108  * Either real DMA *or* pseudo DMA may be implemented
0109  *
0110  * NCR5380_dma_xfer_len   - determine size of DMA/PDMA transfer
0111  * NCR5380_dma_send_setup - execute DMA/PDMA from memory to 5380
0112  * NCR5380_dma_recv_setup - execute DMA/PDMA from 5380 to memory
0113  * NCR5380_dma_residual   - residual byte count
0114  *
0115  * The generic driver is initialized by calling NCR5380_init(instance),
0116  * after setting the appropriate host specific fields and ID.
0117  */
0118 
0119 #ifndef NCR5380_io_delay
0120 #define NCR5380_io_delay(x)
0121 #endif
0122 
0123 #ifndef NCR5380_acquire_dma_irq
0124 #define NCR5380_acquire_dma_irq(x)  (1)
0125 #endif
0126 
0127 #ifndef NCR5380_release_dma_irq
0128 #define NCR5380_release_dma_irq(x)
0129 #endif
0130 
0131 static unsigned int disconnect_mask = ~0;
0132 module_param(disconnect_mask, int, 0444);
0133 
0134 static int do_abort(struct Scsi_Host *, unsigned int);
0135 static void do_reset(struct Scsi_Host *);
0136 static void bus_reset_cleanup(struct Scsi_Host *);
0137 
0138 /**
0139  * initialize_SCp - init the scsi pointer field
0140  * @cmd: command block to set up
0141  *
0142  * Set up the internal fields in the SCSI command.
0143  */
0144 
0145 static inline void initialize_SCp(struct scsi_cmnd *cmd)
0146 {
0147     struct NCR5380_cmd *ncmd = NCR5380_to_ncmd(cmd);
0148 
0149     if (scsi_bufflen(cmd)) {
0150         ncmd->buffer = scsi_sglist(cmd);
0151         ncmd->ptr = sg_virt(ncmd->buffer);
0152         ncmd->this_residual = ncmd->buffer->length;
0153     } else {
0154         ncmd->buffer = NULL;
0155         ncmd->ptr = NULL;
0156         ncmd->this_residual = 0;
0157     }
0158 
0159     ncmd->status = 0;
0160     ncmd->message = 0;
0161 }
0162 
0163 static inline void advance_sg_buffer(struct NCR5380_cmd *ncmd)
0164 {
0165     struct scatterlist *s = ncmd->buffer;
0166 
0167     if (!ncmd->this_residual && s && !sg_is_last(s)) {
0168         ncmd->buffer = sg_next(s);
0169         ncmd->ptr = sg_virt(ncmd->buffer);
0170         ncmd->this_residual = ncmd->buffer->length;
0171     }
0172 }
0173 
0174 static inline void set_resid_from_SCp(struct scsi_cmnd *cmd)
0175 {
0176     struct NCR5380_cmd *ncmd = NCR5380_to_ncmd(cmd);
0177     int resid = ncmd->this_residual;
0178     struct scatterlist *s = ncmd->buffer;
0179 
0180     if (s)
0181         while (!sg_is_last(s)) {
0182             s = sg_next(s);
0183             resid += s->length;
0184         }
0185     scsi_set_resid(cmd, resid);
0186 }
0187 
0188 /**
0189  * NCR5380_poll_politely2 - wait for two chip register values
0190  * @hostdata: host private data
0191  * @reg1: 5380 register to poll
0192  * @bit1: Bitmask to check
0193  * @val1: Expected value
0194  * @reg2: Second 5380 register to poll
0195  * @bit2: Second bitmask to check
0196  * @val2: Second expected value
0197  * @wait: Time-out in jiffies, 0 if sleeping is not allowed
0198  *
0199  * Polls the chip in a reasonably efficient manner waiting for an
0200  * event to occur. After a short quick poll we begin to yield the CPU
0201  * (if possible). In irq contexts the time-out is arbitrarily limited.
0202  * Callers may hold locks as long as they are held in irq mode.
0203  *
0204  * Returns 0 if either or both event(s) occurred otherwise -ETIMEDOUT.
0205  */
0206 
0207 static int NCR5380_poll_politely2(struct NCR5380_hostdata *hostdata,
0208                                   unsigned int reg1, u8 bit1, u8 val1,
0209                                   unsigned int reg2, u8 bit2, u8 val2,
0210                                   unsigned long wait)
0211 {
0212     unsigned long n = hostdata->poll_loops;
0213     unsigned long deadline = jiffies + wait;
0214 
0215     do {
0216         if ((NCR5380_read(reg1) & bit1) == val1)
0217             return 0;
0218         if ((NCR5380_read(reg2) & bit2) == val2)
0219             return 0;
0220         cpu_relax();
0221     } while (n--);
0222 
0223     if (!wait)
0224         return -ETIMEDOUT;
0225 
0226     /* Repeatedly sleep for 1 ms until deadline */
0227     while (time_is_after_jiffies(deadline)) {
0228         schedule_timeout_uninterruptible(1);
0229         if ((NCR5380_read(reg1) & bit1) == val1)
0230             return 0;
0231         if ((NCR5380_read(reg2) & bit2) == val2)
0232             return 0;
0233     }
0234 
0235     return -ETIMEDOUT;
0236 }
0237 
0238 #if NDEBUG
0239 static struct {
0240     unsigned char mask;
0241     const char *name;
0242 } signals[] = {
0243     {SR_DBP, "PARITY"},
0244     {SR_RST, "RST"},
0245     {SR_BSY, "BSY"},
0246     {SR_REQ, "REQ"},
0247     {SR_MSG, "MSG"},
0248     {SR_CD, "CD"},
0249     {SR_IO, "IO"},
0250     {SR_SEL, "SEL"},
0251     {0, NULL}
0252 },
0253 basrs[] = {
0254     {BASR_END_DMA_TRANSFER, "END OF DMA"},
0255     {BASR_DRQ, "DRQ"},
0256     {BASR_PARITY_ERROR, "PARITY ERROR"},
0257     {BASR_IRQ, "IRQ"},
0258     {BASR_PHASE_MATCH, "PHASE MATCH"},
0259     {BASR_BUSY_ERROR, "BUSY ERROR"},
0260     {BASR_ATN, "ATN"},
0261     {BASR_ACK, "ACK"},
0262     {0, NULL}
0263 },
0264 icrs[] = {
0265     {ICR_ASSERT_RST, "ASSERT RST"},
0266     {ICR_ARBITRATION_PROGRESS, "ARB. IN PROGRESS"},
0267     {ICR_ARBITRATION_LOST, "LOST ARB."},
0268     {ICR_ASSERT_ACK, "ASSERT ACK"},
0269     {ICR_ASSERT_BSY, "ASSERT BSY"},
0270     {ICR_ASSERT_SEL, "ASSERT SEL"},
0271     {ICR_ASSERT_ATN, "ASSERT ATN"},
0272     {ICR_ASSERT_DATA, "ASSERT DATA"},
0273     {0, NULL}
0274 },
0275 mrs[] = {
0276     {MR_BLOCK_DMA_MODE, "BLOCK DMA MODE"},
0277     {MR_TARGET, "TARGET"},
0278     {MR_ENABLE_PAR_CHECK, "PARITY CHECK"},
0279     {MR_ENABLE_PAR_INTR, "PARITY INTR"},
0280     {MR_ENABLE_EOP_INTR, "EOP INTR"},
0281     {MR_MONITOR_BSY, "MONITOR BSY"},
0282     {MR_DMA_MODE, "DMA MODE"},
0283     {MR_ARBITRATE, "ARBITRATE"},
0284     {0, NULL}
0285 };
0286 
0287 /**
0288  * NCR5380_print - print scsi bus signals
0289  * @instance: adapter state to dump
0290  *
0291  * Print the SCSI bus signals for debugging purposes
0292  */
0293 
0294 static void NCR5380_print(struct Scsi_Host *instance)
0295 {
0296     struct NCR5380_hostdata *hostdata = shost_priv(instance);
0297     unsigned char status, basr, mr, icr, i;
0298 
0299     status = NCR5380_read(STATUS_REG);
0300     mr = NCR5380_read(MODE_REG);
0301     icr = NCR5380_read(INITIATOR_COMMAND_REG);
0302     basr = NCR5380_read(BUS_AND_STATUS_REG);
0303 
0304     printk(KERN_DEBUG "SR =   0x%02x : ", status);
0305     for (i = 0; signals[i].mask; ++i)
0306         if (status & signals[i].mask)
0307             printk(KERN_CONT "%s, ", signals[i].name);
0308     printk(KERN_CONT "\nBASR = 0x%02x : ", basr);
0309     for (i = 0; basrs[i].mask; ++i)
0310         if (basr & basrs[i].mask)
0311             printk(KERN_CONT "%s, ", basrs[i].name);
0312     printk(KERN_CONT "\nICR =  0x%02x : ", icr);
0313     for (i = 0; icrs[i].mask; ++i)
0314         if (icr & icrs[i].mask)
0315             printk(KERN_CONT "%s, ", icrs[i].name);
0316     printk(KERN_CONT "\nMR =   0x%02x : ", mr);
0317     for (i = 0; mrs[i].mask; ++i)
0318         if (mr & mrs[i].mask)
0319             printk(KERN_CONT "%s, ", mrs[i].name);
0320     printk(KERN_CONT "\n");
0321 }
0322 
0323 static struct {
0324     unsigned char value;
0325     const char *name;
0326 } phases[] = {
0327     {PHASE_DATAOUT, "DATAOUT"},
0328     {PHASE_DATAIN, "DATAIN"},
0329     {PHASE_CMDOUT, "CMDOUT"},
0330     {PHASE_STATIN, "STATIN"},
0331     {PHASE_MSGOUT, "MSGOUT"},
0332     {PHASE_MSGIN, "MSGIN"},
0333     {PHASE_UNKNOWN, "UNKNOWN"}
0334 };
0335 
0336 /**
0337  * NCR5380_print_phase - show SCSI phase
0338  * @instance: adapter to dump
0339  *
0340  * Print the current SCSI phase for debugging purposes
0341  */
0342 
0343 static void NCR5380_print_phase(struct Scsi_Host *instance)
0344 {
0345     struct NCR5380_hostdata *hostdata = shost_priv(instance);
0346     unsigned char status;
0347     int i;
0348 
0349     status = NCR5380_read(STATUS_REG);
0350     if (!(status & SR_REQ))
0351         shost_printk(KERN_DEBUG, instance, "REQ not asserted, phase unknown.\n");
0352     else {
0353         for (i = 0; (phases[i].value != PHASE_UNKNOWN) &&
0354              (phases[i].value != (status & PHASE_MASK)); ++i)
0355             ;
0356         shost_printk(KERN_DEBUG, instance, "phase %s\n", phases[i].name);
0357     }
0358 }
0359 #endif
0360 
0361 /**
0362  * NCR5380_info - report driver and host information
0363  * @instance: relevant scsi host instance
0364  *
0365  * For use as the host template info() handler.
0366  */
0367 
0368 static const char *NCR5380_info(struct Scsi_Host *instance)
0369 {
0370     struct NCR5380_hostdata *hostdata = shost_priv(instance);
0371 
0372     return hostdata->info;
0373 }
0374 
0375 /**
0376  * NCR5380_init - initialise an NCR5380
0377  * @instance: adapter to configure
0378  * @flags: control flags
0379  *
0380  * Initializes *instance and corresponding 5380 chip,
0381  * with flags OR'd into the initial flags value.
0382  *
0383  * Notes : I assume that the host, hostno, and id bits have been
0384  * set correctly. I don't care about the irq and other fields.
0385  *
0386  * Returns 0 for success
0387  */
0388 
0389 static int NCR5380_init(struct Scsi_Host *instance, int flags)
0390 {
0391     struct NCR5380_hostdata *hostdata = shost_priv(instance);
0392     int i;
0393     unsigned long deadline;
0394     unsigned long accesses_per_ms;
0395 
0396     instance->max_lun = 7;
0397 
0398     hostdata->host = instance;
0399     hostdata->id_mask = 1 << instance->this_id;
0400     hostdata->id_higher_mask = 0;
0401     for (i = hostdata->id_mask; i <= 0x80; i <<= 1)
0402         if (i > hostdata->id_mask)
0403             hostdata->id_higher_mask |= i;
0404     for (i = 0; i < 8; ++i)
0405         hostdata->busy[i] = 0;
0406     hostdata->dma_len = 0;
0407 
0408     spin_lock_init(&hostdata->lock);
0409     hostdata->connected = NULL;
0410     hostdata->sensing = NULL;
0411     INIT_LIST_HEAD(&hostdata->autosense);
0412     INIT_LIST_HEAD(&hostdata->unissued);
0413     INIT_LIST_HEAD(&hostdata->disconnected);
0414 
0415     hostdata->flags = flags;
0416 
0417     INIT_WORK(&hostdata->main_task, NCR5380_main);
0418     hostdata->work_q = alloc_workqueue("ncr5380_%d",
0419                             WQ_UNBOUND | WQ_MEM_RECLAIM,
0420                             1, instance->host_no);
0421     if (!hostdata->work_q)
0422         return -ENOMEM;
0423 
0424     snprintf(hostdata->info, sizeof(hostdata->info),
0425         "%s, irq %d, io_port 0x%lx, base 0x%lx, can_queue %d, cmd_per_lun %d, sg_tablesize %d, this_id %d, flags { %s%s%s}",
0426         instance->hostt->name, instance->irq, hostdata->io_port,
0427         hostdata->base, instance->can_queue, instance->cmd_per_lun,
0428         instance->sg_tablesize, instance->this_id,
0429         hostdata->flags & FLAG_DMA_FIXUP     ? "DMA_FIXUP "     : "",
0430         hostdata->flags & FLAG_NO_PSEUDO_DMA ? "NO_PSEUDO_DMA " : "",
0431         hostdata->flags & FLAG_TOSHIBA_DELAY ? "TOSHIBA_DELAY " : "");
0432 
0433     NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
0434     NCR5380_write(MODE_REG, MR_BASE);
0435     NCR5380_write(TARGET_COMMAND_REG, 0);
0436     NCR5380_write(SELECT_ENABLE_REG, 0);
0437 
0438     /* Calibrate register polling loop */
0439     i = 0;
0440     deadline = jiffies + 1;
0441     do {
0442         cpu_relax();
0443     } while (time_is_after_jiffies(deadline));
0444     deadline += msecs_to_jiffies(256);
0445     do {
0446         NCR5380_read(STATUS_REG);
0447         ++i;
0448         cpu_relax();
0449     } while (time_is_after_jiffies(deadline));
0450     accesses_per_ms = i / 256;
0451     hostdata->poll_loops = NCR5380_REG_POLL_TIME * accesses_per_ms / 2;
0452 
0453     return 0;
0454 }
0455 
0456 /**
0457  * NCR5380_maybe_reset_bus - Detect and correct bus wedge problems.
0458  * @instance: adapter to check
0459  *
0460  * If the system crashed, it may have crashed with a connected target and
0461  * the SCSI bus busy. Check for BUS FREE phase. If not, try to abort the
0462  * currently established nexus, which we know nothing about. Failing that
0463  * do a bus reset.
0464  *
0465  * Note that a bus reset will cause the chip to assert IRQ.
0466  *
0467  * Returns 0 if successful, otherwise -ENXIO.
0468  */
0469 
0470 static int NCR5380_maybe_reset_bus(struct Scsi_Host *instance)
0471 {
0472     struct NCR5380_hostdata *hostdata = shost_priv(instance);
0473     int pass;
0474 
0475     for (pass = 1; (NCR5380_read(STATUS_REG) & SR_BSY) && pass <= 6; ++pass) {
0476         switch (pass) {
0477         case 1:
0478         case 3:
0479         case 5:
0480             shost_printk(KERN_ERR, instance, "SCSI bus busy, waiting up to five seconds\n");
0481             NCR5380_poll_politely(hostdata,
0482                                   STATUS_REG, SR_BSY, 0, 5 * HZ);
0483             break;
0484         case 2:
0485             shost_printk(KERN_ERR, instance, "bus busy, attempting abort\n");
0486             do_abort(instance, 1);
0487             break;
0488         case 4:
0489             shost_printk(KERN_ERR, instance, "bus busy, attempting reset\n");
0490             do_reset(instance);
0491             /* Wait after a reset; the SCSI standard calls for
0492              * 250ms, we wait 500ms to be on the safe side.
0493              * But some Toshiba CD-ROMs need ten times that.
0494              */
0495             if (hostdata->flags & FLAG_TOSHIBA_DELAY)
0496                 msleep(2500);
0497             else
0498                 msleep(500);
0499             break;
0500         case 6:
0501             shost_printk(KERN_ERR, instance, "bus locked solid\n");
0502             return -ENXIO;
0503         }
0504     }
0505     return 0;
0506 }
0507 
0508 /**
0509  * NCR5380_exit - remove an NCR5380
0510  * @instance: adapter to remove
0511  *
0512  * Assumes that no more work can be queued (e.g. by NCR5380_intr).
0513  */
0514 
0515 static void NCR5380_exit(struct Scsi_Host *instance)
0516 {
0517     struct NCR5380_hostdata *hostdata = shost_priv(instance);
0518 
0519     cancel_work_sync(&hostdata->main_task);
0520     destroy_workqueue(hostdata->work_q);
0521 }
0522 
0523 /**
0524  * complete_cmd - finish processing a command and return it to the SCSI ML
0525  * @instance: the host instance
0526  * @cmd: command to complete
0527  */
0528 
0529 static void complete_cmd(struct Scsi_Host *instance,
0530                          struct scsi_cmnd *cmd)
0531 {
0532     struct NCR5380_hostdata *hostdata = shost_priv(instance);
0533 
0534     dsprintk(NDEBUG_QUEUES, instance, "complete_cmd: cmd %p\n", cmd);
0535 
0536     if (hostdata->sensing == cmd) {
0537         /* Autosense processing ends here */
0538         if (get_status_byte(cmd) != SAM_STAT_GOOD) {
0539             scsi_eh_restore_cmnd(cmd, &hostdata->ses);
0540         } else {
0541             scsi_eh_restore_cmnd(cmd, &hostdata->ses);
0542             set_status_byte(cmd, SAM_STAT_CHECK_CONDITION);
0543         }
0544         hostdata->sensing = NULL;
0545     }
0546 
0547     scsi_done(cmd);
0548 }
0549 
0550 /**
0551  * NCR5380_queue_command - queue a command
0552  * @instance: the relevant SCSI adapter
0553  * @cmd: SCSI command
0554  *
0555  * cmd is added to the per-instance issue queue, with minor
0556  * twiddling done to the host specific fields of cmd.  If the
0557  * main coroutine is not running, it is restarted.
0558  */
0559 
0560 static int NCR5380_queue_command(struct Scsi_Host *instance,
0561                                  struct scsi_cmnd *cmd)
0562 {
0563     struct NCR5380_hostdata *hostdata = shost_priv(instance);
0564     struct NCR5380_cmd *ncmd = NCR5380_to_ncmd(cmd);
0565     unsigned long flags;
0566 
0567 #if (NDEBUG & NDEBUG_NO_WRITE)
0568     switch (cmd->cmnd[0]) {
0569     case WRITE_6:
0570     case WRITE_10:
0571         shost_printk(KERN_DEBUG, instance, "WRITE attempted with NDEBUG_NO_WRITE set\n");
0572         cmd->result = (DID_ERROR << 16);
0573         scsi_done(cmd);
0574         return 0;
0575     }
0576 #endif /* (NDEBUG & NDEBUG_NO_WRITE) */
0577 
0578     cmd->result = 0;
0579 
0580     spin_lock_irqsave(&hostdata->lock, flags);
0581 
0582     if (!NCR5380_acquire_dma_irq(instance)) {
0583         spin_unlock_irqrestore(&hostdata->lock, flags);
0584 
0585         return SCSI_MLQUEUE_HOST_BUSY;
0586     }
0587 
0588     /*
0589      * Insert the cmd into the issue queue. Note that REQUEST SENSE
0590      * commands are added to the head of the queue since any command will
0591      * clear the contingent allegiance condition that exists and the
0592      * sense data is only guaranteed to be valid while the condition exists.
0593      */
0594 
0595     if (cmd->cmnd[0] == REQUEST_SENSE)
0596         list_add(&ncmd->list, &hostdata->unissued);
0597     else
0598         list_add_tail(&ncmd->list, &hostdata->unissued);
0599 
0600     spin_unlock_irqrestore(&hostdata->lock, flags);
0601 
0602     dsprintk(NDEBUG_QUEUES, instance, "command %p added to %s of queue\n",
0603              cmd, (cmd->cmnd[0] == REQUEST_SENSE) ? "head" : "tail");
0604 
0605     /* Kick off command processing */
0606     queue_work(hostdata->work_q, &hostdata->main_task);
0607     return 0;
0608 }
0609 
0610 static inline void maybe_release_dma_irq(struct Scsi_Host *instance)
0611 {
0612     struct NCR5380_hostdata *hostdata = shost_priv(instance);
0613 
0614     /* Caller does the locking needed to set & test these data atomically */
0615     if (list_empty(&hostdata->disconnected) &&
0616         list_empty(&hostdata->unissued) &&
0617         list_empty(&hostdata->autosense) &&
0618         !hostdata->connected &&
0619         !hostdata->selecting) {
0620         NCR5380_release_dma_irq(instance);
0621     }
0622 }
0623 
0624 /**
0625  * dequeue_next_cmd - dequeue a command for processing
0626  * @instance: the scsi host instance
0627  *
0628  * Priority is given to commands on the autosense queue. These commands
0629  * need autosense because of a CHECK CONDITION result.
0630  *
0631  * Returns a command pointer if a command is found for a target that is
0632  * not already busy. Otherwise returns NULL.
0633  */
0634 
0635 static struct scsi_cmnd *dequeue_next_cmd(struct Scsi_Host *instance)
0636 {
0637     struct NCR5380_hostdata *hostdata = shost_priv(instance);
0638     struct NCR5380_cmd *ncmd;
0639     struct scsi_cmnd *cmd;
0640 
0641     if (hostdata->sensing || list_empty(&hostdata->autosense)) {
0642         list_for_each_entry(ncmd, &hostdata->unissued, list) {
0643             cmd = NCR5380_to_scmd(ncmd);
0644             dsprintk(NDEBUG_QUEUES, instance, "dequeue: cmd=%p target=%d busy=0x%02x lun=%llu\n",
0645                      cmd, scmd_id(cmd), hostdata->busy[scmd_id(cmd)], cmd->device->lun);
0646 
0647             if (!(hostdata->busy[scmd_id(cmd)] & (1 << cmd->device->lun))) {
0648                 list_del(&ncmd->list);
0649                 dsprintk(NDEBUG_QUEUES, instance,
0650                          "dequeue: removed %p from issue queue\n", cmd);
0651                 return cmd;
0652             }
0653         }
0654     } else {
0655         /* Autosense processing begins here */
0656         ncmd = list_first_entry(&hostdata->autosense,
0657                                 struct NCR5380_cmd, list);
0658         list_del(&ncmd->list);
0659         cmd = NCR5380_to_scmd(ncmd);
0660         dsprintk(NDEBUG_QUEUES, instance,
0661                  "dequeue: removed %p from autosense queue\n", cmd);
0662         scsi_eh_prep_cmnd(cmd, &hostdata->ses, NULL, 0, ~0);
0663         hostdata->sensing = cmd;
0664         return cmd;
0665     }
0666     return NULL;
0667 }
0668 
0669 static void requeue_cmd(struct Scsi_Host *instance, struct scsi_cmnd *cmd)
0670 {
0671     struct NCR5380_hostdata *hostdata = shost_priv(instance);
0672     struct NCR5380_cmd *ncmd = NCR5380_to_ncmd(cmd);
0673 
0674     if (hostdata->sensing == cmd) {
0675         scsi_eh_restore_cmnd(cmd, &hostdata->ses);
0676         list_add(&ncmd->list, &hostdata->autosense);
0677         hostdata->sensing = NULL;
0678     } else
0679         list_add(&ncmd->list, &hostdata->unissued);
0680 }
0681 
0682 /**
0683  * NCR5380_main - NCR state machines
0684  *
0685  * NCR5380_main is a coroutine that runs as long as more work can
0686  * be done on the NCR5380 host adapters in a system.  Both
0687  * NCR5380_queue_command() and NCR5380_intr() will try to start it
0688  * in case it is not running.
0689  */
0690 
0691 static void NCR5380_main(struct work_struct *work)
0692 {
0693     struct NCR5380_hostdata *hostdata =
0694         container_of(work, struct NCR5380_hostdata, main_task);
0695     struct Scsi_Host *instance = hostdata->host;
0696     int done;
0697 
0698     do {
0699         done = 1;
0700 
0701         spin_lock_irq(&hostdata->lock);
0702         while (!hostdata->connected && !hostdata->selecting) {
0703             struct scsi_cmnd *cmd = dequeue_next_cmd(instance);
0704 
0705             if (!cmd)
0706                 break;
0707 
0708             dsprintk(NDEBUG_MAIN, instance, "main: dequeued %p\n", cmd);
0709 
0710             /*
0711              * Attempt to establish an I_T_L nexus here.
0712              * On success, instance->hostdata->connected is set.
0713              * On failure, we must add the command back to the
0714              * issue queue so we can keep trying.
0715              */
0716             /*
0717              * REQUEST SENSE commands are issued without tagged
0718              * queueing, even on SCSI-II devices because the
0719              * contingent allegiance condition exists for the
0720              * entire unit.
0721              */
0722 
0723             if (!NCR5380_select(instance, cmd)) {
0724                 dsprintk(NDEBUG_MAIN, instance, "main: select complete\n");
0725             } else {
0726                 dsprintk(NDEBUG_MAIN | NDEBUG_QUEUES, instance,
0727                          "main: select failed, returning %p to queue\n", cmd);
0728                 requeue_cmd(instance, cmd);
0729             }
0730         }
0731         if (hostdata->connected && !hostdata->dma_len) {
0732             dsprintk(NDEBUG_MAIN, instance, "main: performing information transfer\n");
0733             NCR5380_information_transfer(instance);
0734             done = 0;
0735         }
0736         if (!hostdata->connected) {
0737             NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
0738             maybe_release_dma_irq(instance);
0739         }
0740         spin_unlock_irq(&hostdata->lock);
0741         if (!done)
0742             cond_resched();
0743     } while (!done);
0744 }
0745 
0746 /*
0747  * NCR5380_dma_complete - finish DMA transfer
0748  * @instance: the scsi host instance
0749  *
0750  * Called by the interrupt handler when DMA finishes or a phase
0751  * mismatch occurs (which would end the DMA transfer).
0752  */
0753 
0754 static void NCR5380_dma_complete(struct Scsi_Host *instance)
0755 {
0756     struct NCR5380_hostdata *hostdata = shost_priv(instance);
0757     struct NCR5380_cmd *ncmd = NCR5380_to_ncmd(hostdata->connected);
0758     int transferred;
0759     unsigned char **data;
0760     int *count;
0761     int saved_data = 0, overrun = 0;
0762     unsigned char p;
0763 
0764     if (hostdata->read_overruns) {
0765         p = ncmd->phase;
0766         if (p & SR_IO) {
0767             udelay(10);
0768             if ((NCR5380_read(BUS_AND_STATUS_REG) &
0769                  (BASR_PHASE_MATCH | BASR_ACK)) ==
0770                 (BASR_PHASE_MATCH | BASR_ACK)) {
0771                 saved_data = NCR5380_read(INPUT_DATA_REG);
0772                 overrun = 1;
0773                 dsprintk(NDEBUG_DMA, instance, "read overrun handled\n");
0774             }
0775         }
0776     }
0777 
0778 #ifdef CONFIG_SUN3
0779     if (sun3scsi_dma_finish(hostdata->connected->sc_data_direction)) {
0780         pr_err("scsi%d: overrun in UDC counter -- not prepared to deal with this!\n",
0781                instance->host_no);
0782         BUG();
0783     }
0784 
0785     if ((NCR5380_read(BUS_AND_STATUS_REG) & (BASR_PHASE_MATCH | BASR_ACK)) ==
0786         (BASR_PHASE_MATCH | BASR_ACK)) {
0787         pr_err("scsi%d: BASR %02x\n", instance->host_no,
0788                NCR5380_read(BUS_AND_STATUS_REG));
0789         pr_err("scsi%d: bus stuck in data phase -- probably a single byte overrun!\n",
0790                instance->host_no);
0791         BUG();
0792     }
0793 #endif
0794 
0795     NCR5380_write(MODE_REG, MR_BASE);
0796     NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
0797     NCR5380_read(RESET_PARITY_INTERRUPT_REG);
0798 
0799     transferred = hostdata->dma_len - NCR5380_dma_residual(hostdata);
0800     hostdata->dma_len = 0;
0801 
0802     data = (unsigned char **)&ncmd->ptr;
0803     count = &ncmd->this_residual;
0804     *data += transferred;
0805     *count -= transferred;
0806 
0807     if (hostdata->read_overruns) {
0808         int cnt, toPIO;
0809 
0810         if ((NCR5380_read(STATUS_REG) & PHASE_MASK) == p && (p & SR_IO)) {
0811             cnt = toPIO = hostdata->read_overruns;
0812             if (overrun) {
0813                 dsprintk(NDEBUG_DMA, instance,
0814                          "Got an input overrun, using saved byte\n");
0815                 *(*data)++ = saved_data;
0816                 (*count)--;
0817                 cnt--;
0818                 toPIO--;
0819             }
0820             if (toPIO > 0) {
0821                 dsprintk(NDEBUG_DMA, instance,
0822                          "Doing %d byte PIO to 0x%p\n", cnt, *data);
0823                 NCR5380_transfer_pio(instance, &p, &cnt, data, 0);
0824                 *count -= toPIO - cnt;
0825             }
0826         }
0827     }
0828 }
0829 
0830 /**
0831  * NCR5380_intr - generic NCR5380 irq handler
0832  * @irq: interrupt number
0833  * @dev_id: device info
0834  *
0835  * Handle interrupts, reestablishing I_T_L or I_T_L_Q nexuses
0836  * from the disconnected queue, and restarting NCR5380_main()
0837  * as required.
0838  *
0839  * The chip can assert IRQ in any of six different conditions. The IRQ flag
0840  * is then cleared by reading the Reset Parity/Interrupt Register (RPIR).
0841  * Three of these six conditions are latched in the Bus and Status Register:
0842  * - End of DMA (cleared by ending DMA Mode)
0843  * - Parity error (cleared by reading RPIR)
0844  * - Loss of BSY (cleared by reading RPIR)
0845  * Two conditions have flag bits that are not latched:
0846  * - Bus phase mismatch (non-maskable in DMA Mode, cleared by ending DMA Mode)
0847  * - Bus reset (non-maskable)
0848  * The remaining condition has no flag bit at all:
0849  * - Selection/reselection
0850  *
0851  * Hence, establishing the cause(s) of any interrupt is partly guesswork.
0852  * In "The DP8490 and DP5380 Comparison Guide", National Semiconductor
0853  * claimed that "the design of the [DP8490] interrupt logic ensures
0854  * interrupts will not be lost (they can be on the DP5380)."
0855  * The L5380/53C80 datasheet from LOGIC Devices has more details.
0856  *
0857  * Checking for bus reset by reading RST is futile because of interrupt
0858  * latency, but a bus reset will reset chip logic. Checking for parity error
0859  * is unnecessary because that interrupt is never enabled. A Loss of BSY
0860  * condition will clear DMA Mode. We can tell when this occurs because the
0861  * the Busy Monitor interrupt is enabled together with DMA Mode.
0862  */
0863 
0864 static irqreturn_t __maybe_unused NCR5380_intr(int irq, void *dev_id)
0865 {
0866     struct Scsi_Host *instance = dev_id;
0867     struct NCR5380_hostdata *hostdata = shost_priv(instance);
0868     int handled = 0;
0869     unsigned char basr;
0870     unsigned long flags;
0871 
0872     spin_lock_irqsave(&hostdata->lock, flags);
0873 
0874     basr = NCR5380_read(BUS_AND_STATUS_REG);
0875     if (basr & BASR_IRQ) {
0876         unsigned char mr = NCR5380_read(MODE_REG);
0877         unsigned char sr = NCR5380_read(STATUS_REG);
0878 
0879         dsprintk(NDEBUG_INTR, instance, "IRQ %d, BASR 0x%02x, SR 0x%02x, MR 0x%02x\n",
0880                  irq, basr, sr, mr);
0881 
0882         if ((mr & MR_DMA_MODE) || (mr & MR_MONITOR_BSY)) {
0883             /* Probably End of DMA, Phase Mismatch or Loss of BSY.
0884              * We ack IRQ after clearing Mode Register. Workarounds
0885              * for End of DMA errata need to happen in DMA Mode.
0886              */
0887 
0888             dsprintk(NDEBUG_INTR, instance, "interrupt in DMA mode\n");
0889 
0890             if (hostdata->connected) {
0891                 NCR5380_dma_complete(instance);
0892                 queue_work(hostdata->work_q, &hostdata->main_task);
0893             } else {
0894                 NCR5380_write(MODE_REG, MR_BASE);
0895                 NCR5380_read(RESET_PARITY_INTERRUPT_REG);
0896             }
0897         } else if ((NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_mask) &&
0898             (sr & (SR_SEL | SR_IO | SR_BSY | SR_RST)) == (SR_SEL | SR_IO)) {
0899             /* Probably reselected */
0900             NCR5380_write(SELECT_ENABLE_REG, 0);
0901             NCR5380_read(RESET_PARITY_INTERRUPT_REG);
0902 
0903             dsprintk(NDEBUG_INTR, instance, "interrupt with SEL and IO\n");
0904 
0905             if (!hostdata->connected) {
0906                 NCR5380_reselect(instance);
0907                 queue_work(hostdata->work_q, &hostdata->main_task);
0908             }
0909             if (!hostdata->connected)
0910                 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
0911         } else {
0912             /* Probably Bus Reset */
0913             NCR5380_read(RESET_PARITY_INTERRUPT_REG);
0914 
0915             if (sr & SR_RST) {
0916                 /* Certainly Bus Reset */
0917                 shost_printk(KERN_WARNING, instance,
0918                          "bus reset interrupt\n");
0919                 bus_reset_cleanup(instance);
0920             } else {
0921                 dsprintk(NDEBUG_INTR, instance, "unknown interrupt\n");
0922             }
0923 #ifdef SUN3_SCSI_VME
0924             dregs->csr |= CSR_DMA_ENABLE;
0925 #endif
0926         }
0927         handled = 1;
0928     } else {
0929         dsprintk(NDEBUG_INTR, instance, "interrupt without IRQ bit\n");
0930 #ifdef SUN3_SCSI_VME
0931         dregs->csr |= CSR_DMA_ENABLE;
0932 #endif
0933     }
0934 
0935     spin_unlock_irqrestore(&hostdata->lock, flags);
0936 
0937     return IRQ_RETVAL(handled);
0938 }
0939 
0940 /**
0941  * NCR5380_select - attempt arbitration and selection for a given command
0942  * @instance: the Scsi_Host instance
0943  * @cmd: the scsi_cmnd to execute
0944  *
0945  * This routine establishes an I_T_L nexus for a SCSI command. This involves
0946  * ARBITRATION, SELECTION and MESSAGE OUT phases and an IDENTIFY message.
0947  *
0948  * Returns true if the operation should be retried.
0949  * Returns false if it should not be retried.
0950  *
0951  * Side effects :
0952  * If bus busy, arbitration failed, etc, NCR5380_select() will exit
0953  * with registers as they should have been on entry - ie
0954  * SELECT_ENABLE will be set appropriately, the NCR5380
0955  * will cease to drive any SCSI bus signals.
0956  *
0957  * If successful : the I_T_L nexus will be established, and
0958  * hostdata->connected will be set to cmd.
0959  * SELECT interrupt will be disabled.
0960  *
0961  * If failed (no target) : scsi_done() will be called, and the
0962  * cmd->result host byte set to DID_BAD_TARGET.
0963  */
0964 
0965 static bool NCR5380_select(struct Scsi_Host *instance, struct scsi_cmnd *cmd)
0966     __releases(&hostdata->lock) __acquires(&hostdata->lock)
0967 {
0968     struct NCR5380_hostdata *hostdata = shost_priv(instance);
0969     unsigned char tmp[3], phase;
0970     unsigned char *data;
0971     int len;
0972     int err;
0973     bool ret = true;
0974     bool can_disconnect = instance->irq != NO_IRQ &&
0975                   cmd->cmnd[0] != REQUEST_SENSE &&
0976                   (disconnect_mask & BIT(scmd_id(cmd)));
0977 
0978     NCR5380_dprint(NDEBUG_ARBITRATION, instance);
0979     dsprintk(NDEBUG_ARBITRATION, instance, "starting arbitration, id = %d\n",
0980              instance->this_id);
0981 
0982     /*
0983      * Arbitration and selection phases are slow and involve dropping the
0984      * lock, so we have to watch out for EH. An exception handler may
0985      * change 'selecting' to NULL. This function will then return false
0986      * so that the caller will forget about 'cmd'. (During information
0987      * transfer phases, EH may change 'connected' to NULL.)
0988      */
0989     hostdata->selecting = cmd;
0990 
0991     /*
0992      * Set the phase bits to 0, otherwise the NCR5380 won't drive the
0993      * data bus during SELECTION.
0994      */
0995 
0996     NCR5380_write(TARGET_COMMAND_REG, 0);
0997 
0998     /*
0999      * Start arbitration.
1000      */
1001 
1002     NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask);
1003     NCR5380_write(MODE_REG, MR_ARBITRATE);
1004 
1005     /* The chip now waits for BUS FREE phase. Then after the 800 ns
1006      * Bus Free Delay, arbitration will begin.
1007      */
1008 
1009     spin_unlock_irq(&hostdata->lock);
1010     err = NCR5380_poll_politely2(hostdata, MODE_REG, MR_ARBITRATE, 0,
1011                     INITIATOR_COMMAND_REG, ICR_ARBITRATION_PROGRESS,
1012                                            ICR_ARBITRATION_PROGRESS, HZ);
1013     spin_lock_irq(&hostdata->lock);
1014     if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) {
1015         /* Reselection interrupt */
1016         goto out;
1017     }
1018     if (!hostdata->selecting) {
1019         /* Command was aborted */
1020         NCR5380_write(MODE_REG, MR_BASE);
1021         return false;
1022     }
1023     if (err < 0) {
1024         NCR5380_write(MODE_REG, MR_BASE);
1025         shost_printk(KERN_ERR, instance,
1026                      "select: arbitration timeout\n");
1027         goto out;
1028     }
1029     spin_unlock_irq(&hostdata->lock);
1030 
1031     /* The SCSI-2 arbitration delay is 2.4 us */
1032     udelay(3);
1033 
1034     /* Check for lost arbitration */
1035     if ((NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) ||
1036         (NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_higher_mask) ||
1037         (NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST)) {
1038         NCR5380_write(MODE_REG, MR_BASE);
1039         dsprintk(NDEBUG_ARBITRATION, instance, "lost arbitration, deasserting MR_ARBITRATE\n");
1040         spin_lock_irq(&hostdata->lock);
1041         goto out;
1042     }
1043 
1044     /* After/during arbitration, BSY should be asserted.
1045      * IBM DPES-31080 Version S31Q works now
1046      * Tnx to Thomas_Roesch@m2.maus.de for finding this! (Roman)
1047      */
1048     NCR5380_write(INITIATOR_COMMAND_REG,
1049               ICR_BASE | ICR_ASSERT_SEL | ICR_ASSERT_BSY);
1050 
1051     /*
1052      * Again, bus clear + bus settle time is 1.2us, however, this is
1053      * a minimum so we'll udelay ceil(1.2)
1054      */
1055 
1056     if (hostdata->flags & FLAG_TOSHIBA_DELAY)
1057         udelay(15);
1058     else
1059         udelay(2);
1060 
1061     spin_lock_irq(&hostdata->lock);
1062 
1063     /* NCR5380_reselect() clears MODE_REG after a reselection interrupt */
1064     if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE))
1065         goto out;
1066 
1067     if (!hostdata->selecting) {
1068         NCR5380_write(MODE_REG, MR_BASE);
1069         NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1070         return false;
1071     }
1072 
1073     dsprintk(NDEBUG_ARBITRATION, instance, "won arbitration\n");
1074 
1075     /*
1076      * Now that we have won arbitration, start Selection process, asserting
1077      * the host and target ID's on the SCSI bus.
1078      */
1079 
1080     NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask | (1 << scmd_id(cmd)));
1081 
1082     /*
1083      * Raise ATN while SEL is true before BSY goes false from arbitration,
1084      * since this is the only way to guarantee that we'll get a MESSAGE OUT
1085      * phase immediately after selection.
1086      */
1087 
1088     NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY |
1089                   ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_SEL);
1090     NCR5380_write(MODE_REG, MR_BASE);
1091 
1092     /*
1093      * Reselect interrupts must be turned off prior to the dropping of BSY,
1094      * otherwise we will trigger an interrupt.
1095      */
1096     NCR5380_write(SELECT_ENABLE_REG, 0);
1097 
1098     spin_unlock_irq(&hostdata->lock);
1099 
1100     /*
1101      * The initiator shall then wait at least two deskew delays and release
1102      * the BSY signal.
1103      */
1104     udelay(1);        /* wingel -- wait two bus deskew delay >2*45ns */
1105 
1106     /* Reset BSY */
1107     NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA |
1108                   ICR_ASSERT_ATN | ICR_ASSERT_SEL);
1109 
1110     /*
1111      * Something weird happens when we cease to drive BSY - looks
1112      * like the board/chip is letting us do another read before the
1113      * appropriate propagation delay has expired, and we're confusing
1114      * a BSY signal from ourselves as the target's response to SELECTION.
1115      *
1116      * A small delay (the 'C++' frontend breaks the pipeline with an
1117      * unnecessary jump, making it work on my 386-33/Trantor T128, the
1118      * tighter 'C' code breaks and requires this) solves the problem -
1119      * the 1 us delay is arbitrary, and only used because this delay will
1120      * be the same on other platforms and since it works here, it should
1121      * work there.
1122      *
1123      * wingel suggests that this could be due to failing to wait
1124      * one deskew delay.
1125      */
1126 
1127     udelay(1);
1128 
1129     dsprintk(NDEBUG_SELECTION, instance, "selecting target %d\n", scmd_id(cmd));
1130 
1131     /*
1132      * The SCSI specification calls for a 250 ms timeout for the actual
1133      * selection.
1134      */
1135 
1136     err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_BSY, SR_BSY,
1137                                 msecs_to_jiffies(250));
1138 
1139     if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) {
1140         spin_lock_irq(&hostdata->lock);
1141         NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1142         NCR5380_reselect(instance);
1143         shost_printk(KERN_ERR, instance, "reselection after won arbitration?\n");
1144         goto out;
1145     }
1146 
1147     if (err < 0) {
1148         spin_lock_irq(&hostdata->lock);
1149         NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1150 
1151         /* Can't touch cmd if it has been reclaimed by the scsi ML */
1152         if (!hostdata->selecting)
1153             return false;
1154 
1155         cmd->result = DID_BAD_TARGET << 16;
1156         complete_cmd(instance, cmd);
1157         dsprintk(NDEBUG_SELECTION, instance,
1158             "target did not respond within 250ms\n");
1159         ret = false;
1160         goto out;
1161     }
1162 
1163     /*
1164      * No less than two deskew delays after the initiator detects the
1165      * BSY signal is true, it shall release the SEL signal and may
1166      * change the DATA BUS.                                     -wingel
1167      */
1168 
1169     udelay(1);
1170 
1171     NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1172 
1173     /*
1174      * Since we followed the SCSI spec, and raised ATN while SEL
1175      * was true but before BSY was false during selection, the information
1176      * transfer phase should be a MESSAGE OUT phase so that we can send the
1177      * IDENTIFY message.
1178      */
1179 
1180     /* Wait for start of REQ/ACK handshake */
1181 
1182     err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ);
1183     spin_lock_irq(&hostdata->lock);
1184     if (err < 0) {
1185         shost_printk(KERN_ERR, instance, "select: REQ timeout\n");
1186         NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1187         goto out;
1188     }
1189     if (!hostdata->selecting) {
1190         do_abort(instance, 0);
1191         return false;
1192     }
1193 
1194     dsprintk(NDEBUG_SELECTION, instance, "target %d selected, going into MESSAGE OUT phase.\n",
1195              scmd_id(cmd));
1196     tmp[0] = IDENTIFY(can_disconnect, cmd->device->lun);
1197 
1198     len = 1;
1199     data = tmp;
1200     phase = PHASE_MSGOUT;
1201     NCR5380_transfer_pio(instance, &phase, &len, &data, 0);
1202     if (len) {
1203         NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1204         cmd->result = DID_ERROR << 16;
1205         complete_cmd(instance, cmd);
1206         dsprintk(NDEBUG_SELECTION, instance, "IDENTIFY message transfer failed\n");
1207         ret = false;
1208         goto out;
1209     }
1210 
1211     dsprintk(NDEBUG_SELECTION, instance, "nexus established.\n");
1212 
1213     hostdata->connected = cmd;
1214     hostdata->busy[cmd->device->id] |= 1 << cmd->device->lun;
1215 
1216 #ifdef SUN3_SCSI_VME
1217     dregs->csr |= CSR_INTR;
1218 #endif
1219 
1220     initialize_SCp(cmd);
1221 
1222     ret = false;
1223 
1224 out:
1225     if (!hostdata->selecting)
1226         return false;
1227     hostdata->selecting = NULL;
1228     return ret;
1229 }
1230 
1231 /*
1232  * Function : int NCR5380_transfer_pio (struct Scsi_Host *instance,
1233  * unsigned char *phase, int *count, unsigned char **data)
1234  *
1235  * Purpose : transfers data in given phase using polled I/O
1236  *
1237  * Inputs : instance - instance of driver, *phase - pointer to
1238  * what phase is expected, *count - pointer to number of
1239  * bytes to transfer, **data - pointer to data pointer,
1240  * can_sleep - 1 or 0 when sleeping is permitted or not, respectively.
1241  *
1242  * Returns : -1 when different phase is entered without transferring
1243  * maximum number of bytes, 0 if all bytes are transferred or exit
1244  * is in same phase.
1245  *
1246  * Also, *phase, *count, *data are modified in place.
1247  *
1248  * XXX Note : handling for bus free may be useful.
1249  */
1250 
1251 /*
1252  * Note : this code is not as quick as it could be, however it
1253  * IS 100% reliable, and for the actual data transfer where speed
1254  * counts, we will always do a pseudo DMA or DMA transfer.
1255  */
1256 
1257 static int NCR5380_transfer_pio(struct Scsi_Host *instance,
1258                 unsigned char *phase, int *count,
1259                 unsigned char **data, unsigned int can_sleep)
1260 {
1261     struct NCR5380_hostdata *hostdata = shost_priv(instance);
1262     unsigned char p = *phase, tmp;
1263     int c = *count;
1264     unsigned char *d = *data;
1265 
1266     /*
1267      * The NCR5380 chip will only drive the SCSI bus when the
1268      * phase specified in the appropriate bits of the TARGET COMMAND
1269      * REGISTER match the STATUS REGISTER
1270      */
1271 
1272     NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
1273 
1274     do {
1275         /*
1276          * Wait for assertion of REQ, after which the phase bits will be
1277          * valid
1278          */
1279 
1280         if (NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ,
1281                       HZ * can_sleep) < 0)
1282             break;
1283 
1284         dsprintk(NDEBUG_HANDSHAKE, instance, "REQ asserted\n");
1285 
1286         /* Check for phase mismatch */
1287         if ((NCR5380_read(STATUS_REG) & PHASE_MASK) != p) {
1288             dsprintk(NDEBUG_PIO, instance, "phase mismatch\n");
1289             NCR5380_dprint_phase(NDEBUG_PIO, instance);
1290             break;
1291         }
1292 
1293         /* Do actual transfer from SCSI bus to / from memory */
1294         if (!(p & SR_IO))
1295             NCR5380_write(OUTPUT_DATA_REG, *d);
1296         else
1297             *d = NCR5380_read(CURRENT_SCSI_DATA_REG);
1298 
1299         ++d;
1300 
1301         /*
1302          * The SCSI standard suggests that in MSGOUT phase, the initiator
1303          * should drop ATN on the last byte of the message phase
1304          * after REQ has been asserted for the handshake but before
1305          * the initiator raises ACK.
1306          */
1307 
1308         if (!(p & SR_IO)) {
1309             if (!((p & SR_MSG) && c > 1)) {
1310                 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
1311                 NCR5380_dprint(NDEBUG_PIO, instance);
1312                 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1313                               ICR_ASSERT_DATA | ICR_ASSERT_ACK);
1314             } else {
1315                 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1316                               ICR_ASSERT_DATA | ICR_ASSERT_ATN);
1317                 NCR5380_dprint(NDEBUG_PIO, instance);
1318                 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1319                               ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
1320             }
1321         } else {
1322             NCR5380_dprint(NDEBUG_PIO, instance);
1323             NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);
1324         }
1325 
1326         if (NCR5380_poll_politely(hostdata,
1327                                   STATUS_REG, SR_REQ, 0, 5 * HZ * can_sleep) < 0)
1328             break;
1329 
1330         dsprintk(NDEBUG_HANDSHAKE, instance, "REQ negated, handshake complete\n");
1331 
1332 /*
1333  * We have several special cases to consider during REQ/ACK handshaking :
1334  * 1.  We were in MSGOUT phase, and we are on the last byte of the
1335  * message.  ATN must be dropped as ACK is dropped.
1336  *
1337  * 2.  We are in a MSGIN phase, and we are on the last byte of the
1338  * message.  We must exit with ACK asserted, so that the calling
1339  * code may raise ATN before dropping ACK to reject the message.
1340  *
1341  * 3.  ACK and ATN are clear and the target may proceed as normal.
1342  */
1343         if (!(p == PHASE_MSGIN && c == 1)) {
1344             if (p == PHASE_MSGOUT && c > 1)
1345                 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1346             else
1347                 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1348         }
1349     } while (--c);
1350 
1351     dsprintk(NDEBUG_PIO, instance, "residual %d\n", c);
1352 
1353     *count = c;
1354     *data = d;
1355     tmp = NCR5380_read(STATUS_REG);
1356     /* The phase read from the bus is valid if either REQ is (already)
1357      * asserted or if ACK hasn't been released yet. The latter applies if
1358      * we're in MSG IN, DATA IN or STATUS and all bytes have been received.
1359      */
1360     if ((tmp & SR_REQ) || ((tmp & SR_IO) && c == 0))
1361         *phase = tmp & PHASE_MASK;
1362     else
1363         *phase = PHASE_UNKNOWN;
1364 
1365     if (!c || (*phase == p))
1366         return 0;
1367     else
1368         return -1;
1369 }
1370 
1371 /**
1372  * do_reset - issue a reset command
1373  * @instance: adapter to reset
1374  *
1375  * Issue a reset sequence to the NCR5380 and try and get the bus
1376  * back into sane shape.
1377  *
1378  * This clears the reset interrupt flag because there may be no handler for
1379  * it. When the driver is initialized, the NCR5380_intr() handler has not yet
1380  * been installed. And when in EH we may have released the ST DMA interrupt.
1381  */
1382 
1383 static void do_reset(struct Scsi_Host *instance)
1384 {
1385     struct NCR5380_hostdata __maybe_unused *hostdata = shost_priv(instance);
1386     unsigned long flags;
1387 
1388     local_irq_save(flags);
1389     NCR5380_write(TARGET_COMMAND_REG,
1390                   PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK));
1391     NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST);
1392     udelay(50);
1393     NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1394     (void)NCR5380_read(RESET_PARITY_INTERRUPT_REG);
1395     local_irq_restore(flags);
1396 }
1397 
1398 /**
1399  * do_abort - abort the currently established nexus by going to
1400  * MESSAGE OUT phase and sending an ABORT message.
1401  * @instance: relevant scsi host instance
1402  * @can_sleep: 1 or 0 when sleeping is permitted or not, respectively
1403  *
1404  * Returns 0 on success, negative error code on failure.
1405  */
1406 
1407 static int do_abort(struct Scsi_Host *instance, unsigned int can_sleep)
1408 {
1409     struct NCR5380_hostdata *hostdata = shost_priv(instance);
1410     unsigned char *msgptr, phase, tmp;
1411     int len;
1412     int rc;
1413 
1414     /* Request message out phase */
1415     NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1416 
1417     /*
1418      * Wait for the target to indicate a valid phase by asserting
1419      * REQ.  Once this happens, we'll have either a MSGOUT phase
1420      * and can immediately send the ABORT message, or we'll have some
1421      * other phase and will have to source/sink data.
1422      *
1423      * We really don't care what value was on the bus or what value
1424      * the target sees, so we just handshake.
1425      */
1426 
1427     rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ,
1428                    10 * HZ * can_sleep);
1429     if (rc < 0)
1430         goto out;
1431 
1432     tmp = NCR5380_read(STATUS_REG) & PHASE_MASK;
1433 
1434     NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
1435 
1436     if (tmp != PHASE_MSGOUT) {
1437         NCR5380_write(INITIATOR_COMMAND_REG,
1438                       ICR_BASE | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
1439         rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, 0,
1440                        3 * HZ * can_sleep);
1441         if (rc < 0)
1442             goto out;
1443         NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1444     }
1445 
1446     tmp = ABORT;
1447     msgptr = &tmp;
1448     len = 1;
1449     phase = PHASE_MSGOUT;
1450     NCR5380_transfer_pio(instance, &phase, &len, &msgptr, can_sleep);
1451     if (len)
1452         rc = -ENXIO;
1453 
1454     /*
1455      * If we got here, and the command completed successfully,
1456      * we're about to go into bus free state.
1457      */
1458 
1459 out:
1460     NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1461     return rc;
1462 }
1463 
1464 /*
1465  * Function : int NCR5380_transfer_dma (struct Scsi_Host *instance,
1466  * unsigned char *phase, int *count, unsigned char **data)
1467  *
1468  * Purpose : transfers data in given phase using either real
1469  * or pseudo DMA.
1470  *
1471  * Inputs : instance - instance of driver, *phase - pointer to
1472  * what phase is expected, *count - pointer to number of
1473  * bytes to transfer, **data - pointer to data pointer.
1474  *
1475  * Returns : -1 when different phase is entered without transferring
1476  * maximum number of bytes, 0 if all bytes or transferred or exit
1477  * is in same phase.
1478  *
1479  * Also, *phase, *count, *data are modified in place.
1480  */
1481 
1482 
1483 static int NCR5380_transfer_dma(struct Scsi_Host *instance,
1484                 unsigned char *phase, int *count,
1485                 unsigned char **data)
1486 {
1487     struct NCR5380_hostdata *hostdata = shost_priv(instance);
1488     int c = *count;
1489     unsigned char p = *phase;
1490     unsigned char *d = *data;
1491     unsigned char tmp;
1492     int result = 0;
1493 
1494     if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) {
1495         *phase = tmp;
1496         return -1;
1497     }
1498 
1499     NCR5380_to_ncmd(hostdata->connected)->phase = p;
1500 
1501     if (p & SR_IO) {
1502         if (hostdata->read_overruns)
1503             c -= hostdata->read_overruns;
1504         else if (hostdata->flags & FLAG_DMA_FIXUP)
1505             --c;
1506     }
1507 
1508     dsprintk(NDEBUG_DMA, instance, "initializing DMA %s: length %d, address %p\n",
1509              (p & SR_IO) ? "receive" : "send", c, d);
1510 
1511 #ifdef CONFIG_SUN3
1512     /* send start chain */
1513     sun3scsi_dma_start(c, *data);
1514 #endif
1515 
1516     NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
1517     NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY |
1518                             MR_ENABLE_EOP_INTR);
1519 
1520     if (!(hostdata->flags & FLAG_LATE_DMA_SETUP)) {
1521         /* On the Medusa, it is a must to initialize the DMA before
1522          * starting the NCR. This is also the cleaner way for the TT.
1523          */
1524         if (p & SR_IO)
1525             result = NCR5380_dma_recv_setup(hostdata, d, c);
1526         else
1527             result = NCR5380_dma_send_setup(hostdata, d, c);
1528     }
1529 
1530     /*
1531      * On the PAS16 at least I/O recovery delays are not needed here.
1532      * Everyone else seems to want them.
1533      */
1534 
1535     if (p & SR_IO) {
1536         NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1537         NCR5380_io_delay(1);
1538         NCR5380_write(START_DMA_INITIATOR_RECEIVE_REG, 0);
1539     } else {
1540         NCR5380_io_delay(1);
1541         NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
1542         NCR5380_io_delay(1);
1543         NCR5380_write(START_DMA_SEND_REG, 0);
1544         NCR5380_io_delay(1);
1545     }
1546 
1547 #ifdef CONFIG_SUN3
1548 #ifdef SUN3_SCSI_VME
1549     dregs->csr |= CSR_DMA_ENABLE;
1550 #endif
1551     sun3_dma_active = 1;
1552 #endif
1553 
1554     if (hostdata->flags & FLAG_LATE_DMA_SETUP) {
1555         /* On the Falcon, the DMA setup must be done after the last
1556          * NCR access, else the DMA setup gets trashed!
1557          */
1558         if (p & SR_IO)
1559             result = NCR5380_dma_recv_setup(hostdata, d, c);
1560         else
1561             result = NCR5380_dma_send_setup(hostdata, d, c);
1562     }
1563 
1564     /* On failure, NCR5380_dma_xxxx_setup() returns a negative int. */
1565     if (result < 0)
1566         return result;
1567 
1568     /* For real DMA, result is the byte count. DMA interrupt is expected. */
1569     if (result > 0) {
1570         hostdata->dma_len = result;
1571         return 0;
1572     }
1573 
1574     /* The result is zero iff pseudo DMA send/receive was completed. */
1575     hostdata->dma_len = c;
1576 
1577 /*
1578  * A note regarding the DMA errata workarounds for early NMOS silicon.
1579  *
1580  * For DMA sends, we want to wait until the last byte has been
1581  * transferred out over the bus before we turn off DMA mode.  Alas, there
1582  * seems to be no terribly good way of doing this on a 5380 under all
1583  * conditions.  For non-scatter-gather operations, we can wait until REQ
1584  * and ACK both go false, or until a phase mismatch occurs.  Gather-sends
1585  * are nastier, since the device will be expecting more data than we
1586  * are prepared to send it, and REQ will remain asserted.  On a 53C8[01] we
1587  * could test Last Byte Sent to assure transfer (I imagine this is precisely
1588  * why this signal was added to the newer chips) but on the older 538[01]
1589  * this signal does not exist.  The workaround for this lack is a watchdog;
1590  * we bail out of the wait-loop after a modest amount of wait-time if
1591  * the usual exit conditions are not met.  Not a terribly clean or
1592  * correct solution :-%
1593  *
1594  * DMA receive is equally tricky due to a nasty characteristic of the NCR5380.
1595  * If the chip is in DMA receive mode, it will respond to a target's
1596  * REQ by latching the SCSI data into the INPUT DATA register and asserting
1597  * ACK, even if it has _already_ been notified by the DMA controller that
1598  * the current DMA transfer has completed!  If the NCR5380 is then taken
1599  * out of DMA mode, this already-acknowledged byte is lost. This is
1600  * not a problem for "one DMA transfer per READ command", because
1601  * the situation will never arise... either all of the data is DMA'ed
1602  * properly, or the target switches to MESSAGE IN phase to signal a
1603  * disconnection (either operation bringing the DMA to a clean halt).
1604  * However, in order to handle scatter-receive, we must work around the
1605  * problem.  The chosen fix is to DMA fewer bytes, then check for the
1606  * condition before taking the NCR5380 out of DMA mode.  One or two extra
1607  * bytes are transferred via PIO as necessary to fill out the original
1608  * request.
1609  */
1610 
1611     if (hostdata->flags & FLAG_DMA_FIXUP) {
1612         if (p & SR_IO) {
1613             /*
1614              * The workaround was to transfer fewer bytes than we
1615              * intended to with the pseudo-DMA read function, wait for
1616              * the chip to latch the last byte, read it, and then disable
1617              * pseudo-DMA mode.
1618              *
1619              * After REQ is asserted, the NCR5380 asserts DRQ and ACK.
1620              * REQ is deasserted when ACK is asserted, and not reasserted
1621              * until ACK goes false.  Since the NCR5380 won't lower ACK
1622              * until DACK is asserted, which won't happen unless we twiddle
1623              * the DMA port or we take the NCR5380 out of DMA mode, we
1624              * can guarantee that we won't handshake another extra
1625              * byte.
1626              */
1627 
1628             if (NCR5380_poll_politely(hostdata, BUS_AND_STATUS_REG,
1629                                       BASR_DRQ, BASR_DRQ, 0) < 0) {
1630                 result = -1;
1631                 shost_printk(KERN_ERR, instance, "PDMA read: DRQ timeout\n");
1632             }
1633             if (NCR5380_poll_politely(hostdata, STATUS_REG,
1634                                       SR_REQ, 0, 0) < 0) {
1635                 result = -1;
1636                 shost_printk(KERN_ERR, instance, "PDMA read: !REQ timeout\n");
1637             }
1638             d[*count - 1] = NCR5380_read(INPUT_DATA_REG);
1639         } else {
1640             /*
1641              * Wait for the last byte to be sent.  If REQ is being asserted for
1642              * the byte we're interested, we'll ACK it and it will go false.
1643              */
1644             if (NCR5380_poll_politely2(hostdata,
1645                  BUS_AND_STATUS_REG, BASR_DRQ, BASR_DRQ,
1646                  BUS_AND_STATUS_REG, BASR_PHASE_MATCH, 0, 0) < 0) {
1647                 result = -1;
1648                 shost_printk(KERN_ERR, instance, "PDMA write: DRQ and phase timeout\n");
1649             }
1650         }
1651     }
1652 
1653     NCR5380_dma_complete(instance);
1654     return result;
1655 }
1656 
1657 /*
1658  * Function : NCR5380_information_transfer (struct Scsi_Host *instance)
1659  *
1660  * Purpose : run through the various SCSI phases and do as the target
1661  * directs us to.  Operates on the currently connected command,
1662  * instance->connected.
1663  *
1664  * Inputs : instance, instance for which we are doing commands
1665  *
1666  * Side effects : SCSI things happen, the disconnected queue will be
1667  * modified if a command disconnects, *instance->connected will
1668  * change.
1669  *
1670  * XXX Note : we need to watch for bus free or a reset condition here
1671  * to recover from an unexpected bus free condition.
1672  */
1673 
1674 static void NCR5380_information_transfer(struct Scsi_Host *instance)
1675     __releases(&hostdata->lock) __acquires(&hostdata->lock)
1676 {
1677     struct NCR5380_hostdata *hostdata = shost_priv(instance);
1678     unsigned char msgout = NOP;
1679     int sink = 0;
1680     int len;
1681     int transfersize;
1682     unsigned char *data;
1683     unsigned char phase, tmp, extended_msg[10], old_phase = 0xff;
1684     struct scsi_cmnd *cmd;
1685 
1686 #ifdef SUN3_SCSI_VME
1687     dregs->csr |= CSR_INTR;
1688 #endif
1689 
1690     while ((cmd = hostdata->connected)) {
1691         struct NCR5380_cmd *ncmd = NCR5380_to_ncmd(cmd);
1692 
1693         tmp = NCR5380_read(STATUS_REG);
1694         /* We only have a valid SCSI phase when REQ is asserted */
1695         if (tmp & SR_REQ) {
1696             phase = (tmp & PHASE_MASK);
1697             if (phase != old_phase) {
1698                 old_phase = phase;
1699                 NCR5380_dprint_phase(NDEBUG_INFORMATION, instance);
1700             }
1701 #ifdef CONFIG_SUN3
1702             if (phase == PHASE_CMDOUT &&
1703                 sun3_dma_setup_done != cmd) {
1704                 int count;
1705 
1706                 advance_sg_buffer(ncmd);
1707 
1708                 count = sun3scsi_dma_xfer_len(hostdata, cmd);
1709 
1710                 if (count > 0) {
1711                     if (cmd->sc_data_direction == DMA_TO_DEVICE)
1712                         sun3scsi_dma_send_setup(hostdata,
1713                                     ncmd->ptr, count);
1714                     else
1715                         sun3scsi_dma_recv_setup(hostdata,
1716                                     ncmd->ptr, count);
1717                     sun3_dma_setup_done = cmd;
1718                 }
1719 #ifdef SUN3_SCSI_VME
1720                 dregs->csr |= CSR_INTR;
1721 #endif
1722             }
1723 #endif /* CONFIG_SUN3 */
1724 
1725             if (sink && (phase != PHASE_MSGOUT)) {
1726                 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
1727 
1728                 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN |
1729                               ICR_ASSERT_ACK);
1730                 while (NCR5380_read(STATUS_REG) & SR_REQ)
1731                     ;
1732                 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1733                               ICR_ASSERT_ATN);
1734                 sink = 0;
1735                 continue;
1736             }
1737 
1738             switch (phase) {
1739             case PHASE_DATAOUT:
1740 #if (NDEBUG & NDEBUG_NO_DATAOUT)
1741                 shost_printk(KERN_DEBUG, instance, "NDEBUG_NO_DATAOUT set, attempted DATAOUT aborted\n");
1742                 sink = 1;
1743                 do_abort(instance, 0);
1744                 cmd->result = DID_ERROR << 16;
1745                 complete_cmd(instance, cmd);
1746                 hostdata->connected = NULL;
1747                 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
1748                 return;
1749 #endif
1750             case PHASE_DATAIN:
1751                 /*
1752                  * If there is no room left in the current buffer in the
1753                  * scatter-gather list, move onto the next one.
1754                  */
1755 
1756                 advance_sg_buffer(ncmd);
1757                 dsprintk(NDEBUG_INFORMATION, instance,
1758                     "this residual %d, sg ents %d\n",
1759                     ncmd->this_residual,
1760                     sg_nents(ncmd->buffer));
1761 
1762                 /*
1763                  * The preferred transfer method is going to be
1764                  * PSEUDO-DMA for systems that are strictly PIO,
1765                  * since we can let the hardware do the handshaking.
1766                  *
1767                  * For this to work, we need to know the transfersize
1768                  * ahead of time, since the pseudo-DMA code will sit
1769                  * in an unconditional loop.
1770                  */
1771 
1772                 transfersize = 0;
1773                 if (!cmd->device->borken)
1774                     transfersize = NCR5380_dma_xfer_len(hostdata, cmd);
1775 
1776                 if (transfersize > 0) {
1777                     len = transfersize;
1778                     if (NCR5380_transfer_dma(instance, &phase,
1779                         &len, (unsigned char **)&ncmd->ptr)) {
1780                         /*
1781                          * If the watchdog timer fires, all future
1782                          * accesses to this device will use the
1783                          * polled-IO.
1784                          */
1785                         scmd_printk(KERN_INFO, cmd,
1786                             "switching to slow handshake\n");
1787                         cmd->device->borken = 1;
1788                         do_reset(instance);
1789                         bus_reset_cleanup(instance);
1790                     }
1791                 } else {
1792                     /* Transfer a small chunk so that the
1793                      * irq mode lock is not held too long.
1794                      */
1795                     transfersize = min(ncmd->this_residual,
1796                                NCR5380_PIO_CHUNK_SIZE);
1797                     len = transfersize;
1798                     NCR5380_transfer_pio(instance, &phase, &len,
1799                                  (unsigned char **)&ncmd->ptr,
1800                                  0);
1801                     ncmd->this_residual -= transfersize - len;
1802                 }
1803 #ifdef CONFIG_SUN3
1804                 if (sun3_dma_setup_done == cmd)
1805                     sun3_dma_setup_done = NULL;
1806 #endif
1807                 return;
1808             case PHASE_MSGIN:
1809                 len = 1;
1810                 data = &tmp;
1811                 NCR5380_transfer_pio(instance, &phase, &len, &data, 0);
1812                 ncmd->message = tmp;
1813 
1814                 switch (tmp) {
1815                 case ABORT:
1816                     set_host_byte(cmd, DID_ABORT);
1817                     fallthrough;
1818                 case COMMAND_COMPLETE:
1819                     /* Accept message by clearing ACK */
1820                     sink = 1;
1821                     NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1822                     dsprintk(NDEBUG_QUEUES, instance,
1823                              "COMMAND COMPLETE %p target %d lun %llu\n",
1824                              cmd, scmd_id(cmd), cmd->device->lun);
1825 
1826                     hostdata->connected = NULL;
1827                     hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
1828 
1829                     set_status_byte(cmd, ncmd->status);
1830 
1831                     set_resid_from_SCp(cmd);
1832 
1833                     if (cmd->cmnd[0] == REQUEST_SENSE)
1834                         complete_cmd(instance, cmd);
1835                     else {
1836                         if (ncmd->status == SAM_STAT_CHECK_CONDITION ||
1837                             ncmd->status == SAM_STAT_COMMAND_TERMINATED) {
1838                             dsprintk(NDEBUG_QUEUES, instance, "autosense: adding cmd %p to tail of autosense queue\n",
1839                                      cmd);
1840                             list_add_tail(&ncmd->list,
1841                                           &hostdata->autosense);
1842                         } else
1843                             complete_cmd(instance, cmd);
1844                     }
1845 
1846                     /*
1847                      * Restore phase bits to 0 so an interrupted selection,
1848                      * arbitration can resume.
1849                      */
1850                     NCR5380_write(TARGET_COMMAND_REG, 0);
1851 
1852                     return;
1853                 case MESSAGE_REJECT:
1854                     /* Accept message by clearing ACK */
1855                     NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1856                     switch (hostdata->last_message) {
1857                     case HEAD_OF_QUEUE_TAG:
1858                     case ORDERED_QUEUE_TAG:
1859                     case SIMPLE_QUEUE_TAG:
1860                         cmd->device->simple_tags = 0;
1861                         hostdata->busy[cmd->device->id] |= (1 << (cmd->device->lun & 0xFF));
1862                         break;
1863                     default:
1864                         break;
1865                     }
1866                     break;
1867                 case DISCONNECT:
1868                     /* Accept message by clearing ACK */
1869                     NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1870                     hostdata->connected = NULL;
1871                     list_add(&ncmd->list, &hostdata->disconnected);
1872                     dsprintk(NDEBUG_INFORMATION | NDEBUG_QUEUES,
1873                              instance, "connected command %p for target %d lun %llu moved to disconnected queue\n",
1874                              cmd, scmd_id(cmd), cmd->device->lun);
1875 
1876                     /*
1877                      * Restore phase bits to 0 so an interrupted selection,
1878                      * arbitration can resume.
1879                      */
1880                     NCR5380_write(TARGET_COMMAND_REG, 0);
1881 
1882 #ifdef SUN3_SCSI_VME
1883                     dregs->csr |= CSR_DMA_ENABLE;
1884 #endif
1885                     return;
1886                     /*
1887                      * The SCSI data pointer is *IMPLICITLY* saved on a disconnect
1888                      * operation, in violation of the SCSI spec so we can safely
1889                      * ignore SAVE/RESTORE pointers calls.
1890                      *
1891                      * Unfortunately, some disks violate the SCSI spec and
1892                      * don't issue the required SAVE_POINTERS message before
1893                      * disconnecting, and we have to break spec to remain
1894                      * compatible.
1895                      */
1896                 case SAVE_POINTERS:
1897                 case RESTORE_POINTERS:
1898                     /* Accept message by clearing ACK */
1899                     NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1900                     break;
1901                 case EXTENDED_MESSAGE:
1902                     /*
1903                      * Start the message buffer with the EXTENDED_MESSAGE
1904                      * byte, since spi_print_msg() wants the whole thing.
1905                      */
1906                     extended_msg[0] = EXTENDED_MESSAGE;
1907                     /* Accept first byte by clearing ACK */
1908                     NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1909 
1910                     spin_unlock_irq(&hostdata->lock);
1911 
1912                     dsprintk(NDEBUG_EXTENDED, instance, "receiving extended message\n");
1913 
1914                     len = 2;
1915                     data = extended_msg + 1;
1916                     phase = PHASE_MSGIN;
1917                     NCR5380_transfer_pio(instance, &phase, &len, &data, 1);
1918                     dsprintk(NDEBUG_EXTENDED, instance, "length %d, code 0x%02x\n",
1919                              (int)extended_msg[1],
1920                              (int)extended_msg[2]);
1921 
1922                     if (!len && extended_msg[1] > 0 &&
1923                         extended_msg[1] <= sizeof(extended_msg) - 2) {
1924                         /* Accept third byte by clearing ACK */
1925                         NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1926                         len = extended_msg[1] - 1;
1927                         data = extended_msg + 3;
1928                         phase = PHASE_MSGIN;
1929 
1930                         NCR5380_transfer_pio(instance, &phase, &len, &data, 1);
1931                         dsprintk(NDEBUG_EXTENDED, instance, "message received, residual %d\n",
1932                                  len);
1933 
1934                         switch (extended_msg[2]) {
1935                         case EXTENDED_SDTR:
1936                         case EXTENDED_WDTR:
1937                             tmp = 0;
1938                         }
1939                     } else if (len) {
1940                         shost_printk(KERN_ERR, instance, "error receiving extended message\n");
1941                         tmp = 0;
1942                     } else {
1943                         shost_printk(KERN_NOTICE, instance, "extended message code %02x length %d is too long\n",
1944                                      extended_msg[2], extended_msg[1]);
1945                         tmp = 0;
1946                     }
1947 
1948                     spin_lock_irq(&hostdata->lock);
1949                     if (!hostdata->connected)
1950                         return;
1951 
1952                     /* Reject message */
1953                     fallthrough;
1954                 default:
1955                     /*
1956                      * If we get something weird that we aren't expecting,
1957                      * log it.
1958                      */
1959                     if (tmp == EXTENDED_MESSAGE)
1960                         scmd_printk(KERN_INFO, cmd,
1961                                     "rejecting unknown extended message code %02x, length %d\n",
1962                                     extended_msg[2], extended_msg[1]);
1963                     else if (tmp)
1964                         scmd_printk(KERN_INFO, cmd,
1965                                     "rejecting unknown message code %02x\n",
1966                                     tmp);
1967 
1968                     msgout = MESSAGE_REJECT;
1969                     NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1970                     break;
1971                 } /* switch (tmp) */
1972                 break;
1973             case PHASE_MSGOUT:
1974                 len = 1;
1975                 data = &msgout;
1976                 hostdata->last_message = msgout;
1977                 NCR5380_transfer_pio(instance, &phase, &len, &data, 0);
1978                 if (msgout == ABORT) {
1979                     hostdata->connected = NULL;
1980                     hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
1981                     cmd->result = DID_ERROR << 16;
1982                     complete_cmd(instance, cmd);
1983                     return;
1984                 }
1985                 msgout = NOP;
1986                 break;
1987             case PHASE_CMDOUT:
1988                 len = cmd->cmd_len;
1989                 data = cmd->cmnd;
1990                 /*
1991                  * XXX for performance reasons, on machines with a
1992                  * PSEUDO-DMA architecture we should probably
1993                  * use the dma transfer function.
1994                  */
1995                 NCR5380_transfer_pio(instance, &phase, &len, &data, 0);
1996                 break;
1997             case PHASE_STATIN:
1998                 len = 1;
1999                 data = &tmp;
2000                 NCR5380_transfer_pio(instance, &phase, &len, &data, 0);
2001                 ncmd->status = tmp;
2002                 break;
2003             default:
2004                 shost_printk(KERN_ERR, instance, "unknown phase\n");
2005                 NCR5380_dprint(NDEBUG_ANY, instance);
2006             } /* switch(phase) */
2007         } else {
2008             spin_unlock_irq(&hostdata->lock);
2009             NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ);
2010             spin_lock_irq(&hostdata->lock);
2011         }
2012     }
2013 }
2014 
2015 /*
2016  * Function : void NCR5380_reselect (struct Scsi_Host *instance)
2017  *
2018  * Purpose : does reselection, initializing the instance->connected
2019  * field to point to the scsi_cmnd for which the I_T_L or I_T_L_Q
2020  * nexus has been reestablished,
2021  *
2022  * Inputs : instance - this instance of the NCR5380.
2023  */
2024 
2025 static void NCR5380_reselect(struct Scsi_Host *instance)
2026 {
2027     struct NCR5380_hostdata *hostdata = shost_priv(instance);
2028     unsigned char target_mask;
2029     unsigned char lun;
2030     unsigned char msg[3];
2031     struct NCR5380_cmd *ncmd;
2032     struct scsi_cmnd *tmp;
2033 
2034     /*
2035      * Disable arbitration, etc. since the host adapter obviously
2036      * lost, and tell an interrupted NCR5380_select() to restart.
2037      */
2038 
2039     NCR5380_write(MODE_REG, MR_BASE);
2040 
2041     target_mask = NCR5380_read(CURRENT_SCSI_DATA_REG) & ~(hostdata->id_mask);
2042     if (!target_mask || target_mask & (target_mask - 1)) {
2043         shost_printk(KERN_WARNING, instance,
2044                  "reselect: bad target_mask 0x%02x\n", target_mask);
2045         return;
2046     }
2047 
2048     /*
2049      * At this point, we have detected that our SCSI ID is on the bus,
2050      * SEL is true and BSY was false for at least one bus settle delay
2051      * (400 ns).
2052      *
2053      * We must assert BSY ourselves, until the target drops the SEL
2054      * signal.
2055      */
2056 
2057     NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY);
2058     if (NCR5380_poll_politely(hostdata,
2059                               STATUS_REG, SR_SEL, 0, 0) < 0) {
2060         shost_printk(KERN_ERR, instance, "reselect: !SEL timeout\n");
2061         NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2062         return;
2063     }
2064     NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2065 
2066     /*
2067      * Wait for target to go into MSGIN.
2068      */
2069 
2070     if (NCR5380_poll_politely(hostdata,
2071                               STATUS_REG, SR_REQ, SR_REQ, 0) < 0) {
2072         if ((NCR5380_read(STATUS_REG) & (SR_BSY | SR_SEL)) == 0)
2073             /* BUS FREE phase */
2074             return;
2075         shost_printk(KERN_ERR, instance, "reselect: REQ timeout\n");
2076         do_abort(instance, 0);
2077         return;
2078     }
2079 
2080 #ifdef CONFIG_SUN3
2081     /* acknowledge toggle to MSGIN */
2082     NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(PHASE_MSGIN));
2083 
2084     /* peek at the byte without really hitting the bus */
2085     msg[0] = NCR5380_read(CURRENT_SCSI_DATA_REG);
2086 #else
2087     {
2088         int len = 1;
2089         unsigned char *data = msg;
2090         unsigned char phase = PHASE_MSGIN;
2091 
2092         NCR5380_transfer_pio(instance, &phase, &len, &data, 0);
2093 
2094         if (len) {
2095             do_abort(instance, 0);
2096             return;
2097         }
2098     }
2099 #endif /* CONFIG_SUN3 */
2100 
2101     if (!(msg[0] & 0x80)) {
2102         shost_printk(KERN_ERR, instance, "expecting IDENTIFY message, got ");
2103         spi_print_msg(msg);
2104         printk("\n");
2105         do_abort(instance, 0);
2106         return;
2107     }
2108     lun = msg[0] & 0x07;
2109 
2110     /*
2111      * We need to add code for SCSI-II to track which devices have
2112      * I_T_L_Q nexuses established, and which have simple I_T_L
2113      * nexuses so we can chose to do additional data transfer.
2114      */
2115 
2116     /*
2117      * Find the command corresponding to the I_T_L or I_T_L_Q  nexus we
2118      * just reestablished, and remove it from the disconnected queue.
2119      */
2120 
2121     tmp = NULL;
2122     list_for_each_entry(ncmd, &hostdata->disconnected, list) {
2123         struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2124 
2125         if (target_mask == (1 << scmd_id(cmd)) &&
2126             lun == (u8)cmd->device->lun) {
2127             list_del(&ncmd->list);
2128             tmp = cmd;
2129             break;
2130         }
2131     }
2132 
2133     if (tmp) {
2134         dsprintk(NDEBUG_RESELECTION | NDEBUG_QUEUES, instance,
2135                  "reselect: removed %p from disconnected queue\n", tmp);
2136     } else {
2137         int target = ffs(target_mask) - 1;
2138 
2139         shost_printk(KERN_ERR, instance, "target bitmask 0x%02x lun %d not in disconnected queue.\n",
2140                      target_mask, lun);
2141         /*
2142          * Since we have an established nexus that we can't do anything
2143          * with, we must abort it.
2144          */
2145         if (do_abort(instance, 0) == 0)
2146             hostdata->busy[target] &= ~(1 << lun);
2147         return;
2148     }
2149 
2150 #ifdef CONFIG_SUN3
2151     if (sun3_dma_setup_done != tmp) {
2152         int count;
2153 
2154         advance_sg_buffer(ncmd);
2155 
2156         count = sun3scsi_dma_xfer_len(hostdata, tmp);
2157 
2158         if (count > 0) {
2159             if (tmp->sc_data_direction == DMA_TO_DEVICE)
2160                 sun3scsi_dma_send_setup(hostdata,
2161                             ncmd->ptr, count);
2162             else
2163                 sun3scsi_dma_recv_setup(hostdata,
2164                             ncmd->ptr, count);
2165             sun3_dma_setup_done = tmp;
2166         }
2167     }
2168 
2169     NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);
2170 #endif /* CONFIG_SUN3 */
2171 
2172     /* Accept message by clearing ACK */
2173     NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2174 
2175     hostdata->connected = tmp;
2176     dsprintk(NDEBUG_RESELECTION, instance, "nexus established, target %d, lun %llu\n",
2177              scmd_id(tmp), tmp->device->lun);
2178 }
2179 
2180 /**
2181  * list_find_cmd - test for presence of a command in a linked list
2182  * @haystack: list of commands
2183  * @needle: command to search for
2184  */
2185 
2186 static bool list_find_cmd(struct list_head *haystack,
2187                           struct scsi_cmnd *needle)
2188 {
2189     struct NCR5380_cmd *ncmd;
2190 
2191     list_for_each_entry(ncmd, haystack, list)
2192         if (NCR5380_to_scmd(ncmd) == needle)
2193             return true;
2194     return false;
2195 }
2196 
2197 /**
2198  * list_remove_cmd - remove a command from linked list
2199  * @haystack: list of commands
2200  * @needle: command to remove
2201  */
2202 
2203 static bool list_del_cmd(struct list_head *haystack,
2204                          struct scsi_cmnd *needle)
2205 {
2206     if (list_find_cmd(haystack, needle)) {
2207         struct NCR5380_cmd *ncmd = NCR5380_to_ncmd(needle);
2208 
2209         list_del(&ncmd->list);
2210         return true;
2211     }
2212     return false;
2213 }
2214 
2215 /**
2216  * NCR5380_abort - scsi host eh_abort_handler() method
2217  * @cmd: the command to be aborted
2218  *
2219  * Try to abort a given command by removing it from queues and/or sending
2220  * the target an abort message. This may not succeed in causing a target
2221  * to abort the command. Nonetheless, the low-level driver must forget about
2222  * the command because the mid-layer reclaims it and it may be re-issued.
2223  *
2224  * The normal path taken by a command is as follows. For EH we trace this
2225  * same path to locate and abort the command.
2226  *
2227  * unissued -> selecting -> [unissued -> selecting ->]... connected ->
2228  * [disconnected -> connected ->]...
2229  * [autosense -> connected ->] done
2230  *
2231  * If cmd was not found at all then presumably it has already been completed,
2232  * in which case return SUCCESS to try to avoid further EH measures.
2233  *
2234  * If the command has not completed yet, we must not fail to find it.
2235  * We have no option but to forget the aborted command (even if it still
2236  * lacks sense data). The mid-layer may re-issue a command that is in error
2237  * recovery (see scsi_send_eh_cmnd), but the logic and data structures in
2238  * this driver are such that a command can appear on one queue only.
2239  *
2240  * The lock protects driver data structures, but EH handlers also use it
2241  * to serialize their own execution and prevent their own re-entry.
2242  */
2243 
2244 static int NCR5380_abort(struct scsi_cmnd *cmd)
2245 {
2246     struct Scsi_Host *instance = cmd->device->host;
2247     struct NCR5380_hostdata *hostdata = shost_priv(instance);
2248     unsigned long flags;
2249     int result = SUCCESS;
2250 
2251     spin_lock_irqsave(&hostdata->lock, flags);
2252 
2253 #if (NDEBUG & NDEBUG_ANY)
2254     scmd_printk(KERN_INFO, cmd, __func__);
2255 #endif
2256     NCR5380_dprint(NDEBUG_ANY, instance);
2257     NCR5380_dprint_phase(NDEBUG_ANY, instance);
2258 
2259     if (list_del_cmd(&hostdata->unissued, cmd)) {
2260         dsprintk(NDEBUG_ABORT, instance,
2261                  "abort: removed %p from issue queue\n", cmd);
2262         cmd->result = DID_ABORT << 16;
2263         scsi_done(cmd); /* No tag or busy flag to worry about */
2264         goto out;
2265     }
2266 
2267     if (hostdata->selecting == cmd) {
2268         dsprintk(NDEBUG_ABORT, instance,
2269                  "abort: cmd %p == selecting\n", cmd);
2270         hostdata->selecting = NULL;
2271         cmd->result = DID_ABORT << 16;
2272         complete_cmd(instance, cmd);
2273         goto out;
2274     }
2275 
2276     if (list_del_cmd(&hostdata->disconnected, cmd)) {
2277         dsprintk(NDEBUG_ABORT, instance,
2278                  "abort: removed %p from disconnected list\n", cmd);
2279         /* Can't call NCR5380_select() and send ABORT because that
2280          * means releasing the lock. Need a bus reset.
2281          */
2282         set_host_byte(cmd, DID_ERROR);
2283         complete_cmd(instance, cmd);
2284         result = FAILED;
2285         goto out;
2286     }
2287 
2288     if (hostdata->connected == cmd) {
2289         dsprintk(NDEBUG_ABORT, instance, "abort: cmd %p is connected\n", cmd);
2290         hostdata->connected = NULL;
2291         hostdata->dma_len = 0;
2292         if (do_abort(instance, 0) < 0) {
2293             set_host_byte(cmd, DID_ERROR);
2294             complete_cmd(instance, cmd);
2295             result = FAILED;
2296             goto out;
2297         }
2298         set_host_byte(cmd, DID_ABORT);
2299         complete_cmd(instance, cmd);
2300         goto out;
2301     }
2302 
2303     if (list_del_cmd(&hostdata->autosense, cmd)) {
2304         dsprintk(NDEBUG_ABORT, instance,
2305                  "abort: removed %p from sense queue\n", cmd);
2306         complete_cmd(instance, cmd);
2307     }
2308 
2309 out:
2310     if (result == FAILED)
2311         dsprintk(NDEBUG_ABORT, instance, "abort: failed to abort %p\n", cmd);
2312     else {
2313         hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
2314         dsprintk(NDEBUG_ABORT, instance, "abort: successfully aborted %p\n", cmd);
2315     }
2316 
2317     queue_work(hostdata->work_q, &hostdata->main_task);
2318     spin_unlock_irqrestore(&hostdata->lock, flags);
2319 
2320     return result;
2321 }
2322 
2323 
2324 static void bus_reset_cleanup(struct Scsi_Host *instance)
2325 {
2326     struct NCR5380_hostdata *hostdata = shost_priv(instance);
2327     int i;
2328     struct NCR5380_cmd *ncmd;
2329 
2330     /* reset NCR registers */
2331     NCR5380_write(MODE_REG, MR_BASE);
2332     NCR5380_write(TARGET_COMMAND_REG, 0);
2333     NCR5380_write(SELECT_ENABLE_REG, 0);
2334 
2335     /* After the reset, there are no more connected or disconnected commands
2336      * and no busy units; so clear the low-level status here to avoid
2337      * conflicts when the mid-level code tries to wake up the affected
2338      * commands!
2339      */
2340 
2341     if (hostdata->selecting) {
2342         hostdata->selecting->result = DID_RESET << 16;
2343         complete_cmd(instance, hostdata->selecting);
2344         hostdata->selecting = NULL;
2345     }
2346 
2347     list_for_each_entry(ncmd, &hostdata->disconnected, list) {
2348         struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2349 
2350         set_host_byte(cmd, DID_RESET);
2351         complete_cmd(instance, cmd);
2352     }
2353     INIT_LIST_HEAD(&hostdata->disconnected);
2354 
2355     list_for_each_entry(ncmd, &hostdata->autosense, list) {
2356         struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2357 
2358         scsi_done(cmd);
2359     }
2360     INIT_LIST_HEAD(&hostdata->autosense);
2361 
2362     if (hostdata->connected) {
2363         set_host_byte(hostdata->connected, DID_RESET);
2364         complete_cmd(instance, hostdata->connected);
2365         hostdata->connected = NULL;
2366     }
2367 
2368     for (i = 0; i < 8; ++i)
2369         hostdata->busy[i] = 0;
2370     hostdata->dma_len = 0;
2371 
2372     queue_work(hostdata->work_q, &hostdata->main_task);
2373 }
2374 
2375 /**
2376  * NCR5380_host_reset - reset the SCSI host
2377  * @cmd: SCSI command undergoing EH
2378  *
2379  * Returns SUCCESS
2380  */
2381 
2382 static int NCR5380_host_reset(struct scsi_cmnd *cmd)
2383 {
2384     struct Scsi_Host *instance = cmd->device->host;
2385     struct NCR5380_hostdata *hostdata = shost_priv(instance);
2386     unsigned long flags;
2387     struct NCR5380_cmd *ncmd;
2388 
2389     spin_lock_irqsave(&hostdata->lock, flags);
2390 
2391 #if (NDEBUG & NDEBUG_ANY)
2392     shost_printk(KERN_INFO, instance, __func__);
2393 #endif
2394     NCR5380_dprint(NDEBUG_ANY, instance);
2395     NCR5380_dprint_phase(NDEBUG_ANY, instance);
2396 
2397     list_for_each_entry(ncmd, &hostdata->unissued, list) {
2398         struct scsi_cmnd *scmd = NCR5380_to_scmd(ncmd);
2399 
2400         scmd->result = DID_RESET << 16;
2401         scsi_done(scmd);
2402     }
2403     INIT_LIST_HEAD(&hostdata->unissued);
2404 
2405     do_reset(instance);
2406     bus_reset_cleanup(instance);
2407 
2408     spin_unlock_irqrestore(&hostdata->lock, flags);
2409 
2410     return SUCCESS;
2411 }