drivers/scsi/3w-sas.h

0001 /*
0002    3w-sas.h -- LSI 3ware SAS/SATA-RAID Controller device driver for Linux.
0003
0004    Written By: Adam Radford <aradford@gmail.com>
0005
0006    Copyright (C) 2009 LSI Corporation.
0007
0008    This program is free software; you can redistribute it and/or modify
0009    it under the terms of the GNU General Public License as published by
0010    the Free Software Foundation; version 2 of the License.
0011
0012    This program is distributed in the hope that it will be useful,
0013    but WITHOUT ANY WARRANTY; without even the implied warranty of
0014    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
0015    GNU General Public License for more details.
0016
0017    NO WARRANTY
0018    THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
0019    CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
0020    LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
0021    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
0022    solely responsible for determining the appropriateness of using and
0023    distributing the Program and assumes all risks associated with its
0024    exercise of rights under this Agreement, including but not limited to
0025    the risks and costs of program errors, damage to or loss of data,
0026    programs or equipment, and unavailability or interruption of operations.
0027
0028    DISCLAIMER OF LIABILITY
0029    NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
0030    DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
0031    DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
0032    ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
0033    TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
0034    USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
0035    HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
0036
0037    You should have received a copy of the GNU General Public License
0038    along with this program; if not, write to the Free Software
0039    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
0040
0041    Bugs/Comments/Suggestions should be mailed to:
0042    aradford@gmail.com
0043 */
0044
0045 #ifndef _3W_SAS_H
0046 #define _3W_SAS_H
0047
0048 /* AEN severity table */
0049 static char *twl_aen_severity_table[] =
0050 {
0051     "None", "ERROR", "WARNING", "INFO", "DEBUG", NULL
0052 };
0053
0054 /* Liberator register offsets */
0055 #define TWL_STATUS             0x0  /* Status */
0056 #define TWL_HIBDB              0x20 /* Inbound doorbell */
0057 #define TWL_HISTAT             0x30 /* Host interrupt status */
0058 #define TWL_HIMASK             0x34 /* Host interrupt mask */
0059 #define TWL_HOBDB              0x9C /* Outbound doorbell */
0060 #define TWL_HOBDBC             0xA0 /* Outbound doorbell clear */
0061 #define TWL_SCRPD3             0xBC /* Scratchpad */
0062 #define TWL_HIBQPL             0xC0 /* Host inbound Q low */
0063 #define TWL_HIBQPH             0xC4 /* Host inbound Q high */
0064 #define TWL_HOBQPL             0xC8 /* Host outbound Q low */
0065 #define TWL_HOBQPH             0xCC /* Host outbound Q high */
0066 #define TWL_HISTATUS_VALID_INTERRUPT       0xC
0067 #define TWL_HISTATUS_ATTENTION_INTERRUPT   0x4
0068 #define TWL_HISTATUS_RESPONSE_INTERRUPT    0x8
0069 #define TWL_STATUS_OVERRUN_SUBMIT      0x2000
0070 #define TWL_ISSUE_SOFT_RESET           0x100
0071 #define TWL_CONTROLLER_READY           0x2000
0072 #define TWL_DOORBELL_CONTROLLER_ERROR      0x200000
0073 #define TWL_DOORBELL_ATTENTION_INTERRUPT   0x40000
0074 #define TWL_PULL_MODE              0x1
0075
0076 /* Command packet opcodes used by the driver */
0077 #define TW_OP_INIT_CONNECTION 0x1
0078 #define TW_OP_GET_PARAM       0x12
0079 #define TW_OP_SET_PARAM       0x13
0080 #define TW_OP_EXECUTE_SCSI    0x10
0081
0082 /* Asynchronous Event Notification (AEN) codes used by the driver */
0083 #define TW_AEN_QUEUE_EMPTY   0x0000
0084 #define TW_AEN_SOFT_RESET    0x0001
0085 #define TW_AEN_SYNC_TIME_WITH_HOST 0x031
0086 #define TW_AEN_SEVERITY_ERROR    0x1
0087 #define TW_AEN_SEVERITY_DEBUG    0x4
0088 #define TW_AEN_NOT_RETRIEVED     0x1
0089
0090 /* Command state defines */
0091 #define TW_S_INITIAL   0x1  /* Initial state */
0092 #define TW_S_STARTED   0x2  /* Id in use */
0093 #define TW_S_POSTED    0x4  /* Posted to the controller */
0094 #define TW_S_COMPLETED 0x8  /* Completed by isr */
0095 #define TW_S_FINISHED  0x10 /* I/O completely done */
0096
0097 /* Compatibility defines */
0098 #define TW_9750_ARCH_ID 10
0099 #define TW_CURRENT_DRIVER_SRL 40
0100 #define TW_CURRENT_DRIVER_BUILD 0
0101 #define TW_CURRENT_DRIVER_BRANCH 0
0102
0103 /* Misc defines */
0104 #define TW_SECTOR_SIZE                512
0105 #define TW_MAX_UNITS                  32
0106 #define TW_INIT_MESSAGE_CREDITS           0x100
0107 #define TW_INIT_COMMAND_PACKET_SIZE       0x3
0108 #define TW_INIT_COMMAND_PACKET_SIZE_EXTENDED  0x6
0109 #define TW_EXTENDED_INIT_CONNECT          0x2
0110 #define TW_BASE_FW_SRL                24
0111 #define TW_BASE_FW_BRANCH             0
0112 #define TW_BASE_FW_BUILD              1
0113 #define TW_Q_LENGTH               256
0114 #define TW_Q_START                0
0115 #define TW_MAX_SLOT               32
0116 #define TW_MAX_RESET_TRIES            2
0117 #define TW_MAX_CMDS_PER_LUN           254
0118 #define TW_MAX_AEN_DRAIN              255
0119 #define TW_IN_RESET               2
0120 #define TW_USING_MSI                  3
0121 #define TW_IN_ATTENTION_LOOP              4
0122 #define TW_MAX_SECTORS                256
0123 #define TW_MAX_CDB_LEN                16
0124 #define TW_IOCTL_CHRDEV_TIMEOUT           60 /* 60 seconds */
0125 #define TW_IOCTL_CHRDEV_FREE              -1
0126 #define TW_COMMAND_OFFSET             128 /* 128 bytes */
0127 #define TW_VERSION_TABLE              0x0402
0128 #define TW_TIMEKEEP_TABLE             0x040A
0129 #define TW_INFORMATION_TABLE              0x0403
0130 #define TW_PARAM_FWVER                3
0131 #define TW_PARAM_FWVER_LENGTH             16
0132 #define TW_PARAM_BIOSVER              4
0133 #define TW_PARAM_BIOSVER_LENGTH           16
0134 #define TW_PARAM_MODEL                8
0135 #define TW_PARAM_MODEL_LENGTH             16
0136 #define TW_PARAM_PHY_SUMMARY_TABLE        1
0137 #define TW_PARAM_PHYCOUNT             2
0138 #define TW_PARAM_PHYCOUNT_LENGTH          1
0139 #define TW_IOCTL_FIRMWARE_PASS_THROUGH        0x108  // Used by smartmontools
0140 #define TW_ALLOCATION_LENGTH              128
0141 #define TW_SENSE_DATA_LENGTH              18
0142 #define TW_ERROR_LOGICAL_UNIT_NOT_SUPPORTED   0x10a
0143 #define TW_ERROR_INVALID_FIELD_IN_CDB         0x10d
0144 #define TW_ERROR_UNIT_OFFLINE             0x128
0145 #define TW_MESSAGE_SOURCE_CONTROLLER_ERROR    3
0146 #define TW_MESSAGE_SOURCE_CONTROLLER_EVENT    4
0147 #define TW_DRIVER                 6
0148 #ifndef PCI_DEVICE_ID_3WARE_9750
0149 #define PCI_DEVICE_ID_3WARE_9750 0x1010
0150 #endif
0151
0152 /* Bitmask macros to eliminate bitfields */
0153
0154 /* opcode: 5, reserved: 3 */
0155 #define TW_OPRES_IN(x,y) ((x << 5) | (y & 0x1f))
0156 #define TW_OP_OUT(x) (x & 0x1f)
0157
0158 /* opcode: 5, sgloffset: 3 */
0159 #define TW_OPSGL_IN(x,y) ((x << 5) | (y & 0x1f))
0160 #define TW_SGL_OUT(x) ((x >> 5) & 0x7)
0161
0162 /* severity: 3, reserved: 5 */
0163 #define TW_SEV_OUT(x) (x & 0x7)
0164
0165 /* not_mfa: 1, reserved: 7, status: 8, request_id: 16 */
0166 #define TW_RESID_OUT(x) ((x >> 16) & 0xffff)
0167 #define TW_NOTMFA_OUT(x) (x & 0x1)
0168
0169 /* request_id: 12, lun: 4 */
0170 #define TW_REQ_LUN_IN(lun, request_id)          \
0171     (((lun << 12) & 0xf000) | (request_id & 0xfff))
0172 #define TW_LUN_OUT(lun) ((lun >> 12) & 0xf)
0173
0174 /* Register access macros */
0175 #define TWL_STATUS_REG_ADDR(x)                  \
0176     ((unsigned char __iomem *)x->base_addr + TWL_STATUS)
0177 #define TWL_HOBQPL_REG_ADDR(x)                  \
0178     ((unsigned char __iomem *)x->base_addr + TWL_HOBQPL)
0179 #define TWL_HOBQPH_REG_ADDR(x)                  \
0180     ((unsigned char __iomem *)x->base_addr + TWL_HOBQPH)
0181 #define TWL_HOBDB_REG_ADDR(x)                   \
0182     ((unsigned char __iomem *)x->base_addr + TWL_HOBDB)
0183 #define TWL_HOBDBC_REG_ADDR(x)                  \
0184     ((unsigned char __iomem *)x->base_addr + TWL_HOBDBC)
0185 #define TWL_HIMASK_REG_ADDR(x)                  \
0186     ((unsigned char __iomem *)x->base_addr + TWL_HIMASK)
0187 #define TWL_HISTAT_REG_ADDR(x)                  \
0188     ((unsigned char __iomem *)x->base_addr + TWL_HISTAT)
0189 #define TWL_HIBQPH_REG_ADDR(x)                  \
0190     ((unsigned char __iomem *)x->base_addr + TWL_HIBQPH)
0191 #define TWL_HIBQPL_REG_ADDR(x)                  \
0192     ((unsigned char __iomem *)x->base_addr + TWL_HIBQPL)
0193 #define TWL_HIBDB_REG_ADDR(x)                   \
0194     ((unsigned char __iomem *)x->base_addr + TWL_HIBDB)
0195 #define TWL_SCRPD3_REG_ADDR(x)                  \
0196     ((unsigned char __iomem *)x->base_addr + TWL_SCRPD3)
0197 #define TWL_MASK_INTERRUPTS(x)                  \
0198     (writel(~0, TWL_HIMASK_REG_ADDR(tw_dev)))
0199 #define TWL_UNMASK_INTERRUPTS(x)                \
0200     (writel(~TWL_HISTATUS_VALID_INTERRUPT, TWL_HIMASK_REG_ADDR(tw_dev)))
0201 #define TWL_CLEAR_DB_INTERRUPT(x)               \
0202     (writel(~0, TWL_HOBDBC_REG_ADDR(tw_dev)))
0203 #define TWL_SOFT_RESET(x)                   \
0204     (writel(TWL_ISSUE_SOFT_RESET, TWL_HIBDB_REG_ADDR(tw_dev)))
0205
0206 /* Macros */
0207 #define TW_PRINTK(h,a,b,c) { \
0208 if (h) \
0209 printk(KERN_WARNING "3w-sas: scsi%d: ERROR: (0x%02X:0x%04X): %s.\n",h->host_no,a,b,c); \
0210 else \
0211 printk(KERN_WARNING "3w-sas: ERROR: (0x%02X:0x%04X): %s.\n",a,b,c); \
0212 }
0213 #define TW_MAX_LUNS 16
0214 #define TW_COMMAND_SIZE (sizeof(dma_addr_t) > 4 ? 6 : 4)
0215 #define TW_LIBERATOR_MAX_SGL_LENGTH (sizeof(dma_addr_t) > 4 ? 46 : 92)
0216 #define TW_LIBERATOR_MAX_SGL_LENGTH_OLD (sizeof(dma_addr_t) > 4 ? 47 : 94)
0217 #define TW_PADDING_LENGTH_LIBERATOR 136
0218 #define TW_PADDING_LENGTH_LIBERATOR_OLD 132
0219 #define TW_CPU_TO_SGL(x) (sizeof(dma_addr_t) > 4 ? cpu_to_le64(x) : cpu_to_le32(x))
0220
0221 #pragma pack(1)
0222
0223 /* SGL entry */
0224 typedef struct TAG_TW_SG_Entry_ISO {
0225     dma_addr_t address;
0226     dma_addr_t length;
0227 } TW_SG_Entry_ISO;
0228
0229 /* Old Command Packet with ISO SGL */
0230 typedef struct TW_Command {
0231     unsigned char opcode__sgloffset;
0232     unsigned char size;
0233     unsigned char request_id;
0234     unsigned char unit__hostid;
0235     /* Second DWORD */
0236     unsigned char status;
0237     unsigned char flags;
0238     union {
0239         unsigned short block_count;
0240         unsigned short parameter_count;
0241     } byte6_offset;
0242     union {
0243         struct {
0244             u32 lba;
0245             TW_SG_Entry_ISO sgl[TW_LIBERATOR_MAX_SGL_LENGTH_OLD];
0246             unsigned char padding[TW_PADDING_LENGTH_LIBERATOR_OLD];
0247         } io;
0248         struct {
0249             TW_SG_Entry_ISO sgl[TW_LIBERATOR_MAX_SGL_LENGTH_OLD];
0250             u32 padding;
0251             unsigned char padding2[TW_PADDING_LENGTH_LIBERATOR_OLD];
0252         } param;
0253     } byte8_offset;
0254 } TW_Command;
0255
0256 /* New Command Packet with ISO SGL */
0257 typedef struct TAG_TW_Command_Apache {
0258     unsigned char opcode__reserved;
0259     unsigned char unit;
0260     unsigned short request_id__lunl;
0261     unsigned char status;
0262     unsigned char sgl_offset;
0263     unsigned short sgl_entries__lunh;
0264     unsigned char cdb[16];
0265     TW_SG_Entry_ISO sg_list[TW_LIBERATOR_MAX_SGL_LENGTH];
0266     unsigned char padding[TW_PADDING_LENGTH_LIBERATOR];
0267 } TW_Command_Apache;
0268
0269 /* New command packet header */
0270 typedef struct TAG_TW_Command_Apache_Header {
0271     unsigned char sense_data[TW_SENSE_DATA_LENGTH];
0272     struct {
0273         char reserved[4];
0274         unsigned short error;
0275         unsigned char padding;
0276         unsigned char severity__reserved;
0277     } status_block;
0278     unsigned char err_specific_desc[98];
0279     struct {
0280         unsigned char size_header;
0281         unsigned short request_id;
0282         unsigned char size_sense;
0283     } header_desc;
0284 } TW_Command_Apache_Header;
0285
0286 /* This struct is a union of the 2 command packets */
0287 typedef struct TAG_TW_Command_Full {
0288     TW_Command_Apache_Header header;
0289     union {
0290         TW_Command oldcommand;
0291         TW_Command_Apache newcommand;
0292     } command;
0293 } TW_Command_Full;
0294
0295 /* Initconnection structure */
0296 typedef struct TAG_TW_Initconnect {
0297     unsigned char opcode__reserved;
0298     unsigned char size;
0299     unsigned char request_id;
0300     unsigned char res2;
0301     unsigned char status;
0302     unsigned char flags;
0303     unsigned short message_credits;
0304     u32 features;
0305     unsigned short fw_srl;
0306     unsigned short fw_arch_id;
0307     unsigned short fw_branch;
0308     unsigned short fw_build;
0309     u32 result;
0310 } TW_Initconnect;
0311
0312 /* Event info structure */
0313 typedef struct TAG_TW_Event
0314 {
0315     unsigned int sequence_id;
0316     unsigned int time_stamp_sec;
0317     unsigned short aen_code;
0318     unsigned char severity;
0319     unsigned char retrieved;
0320     unsigned char repeat_count;
0321     unsigned char parameter_len;
0322     unsigned char parameter_data[98];
0323 } TW_Event;
0324
0325 typedef struct TAG_TW_Ioctl_Driver_Command {
0326     unsigned int control_code;
0327     unsigned int status;
0328     unsigned int unique_id;
0329     unsigned int sequence_id;
0330     unsigned int os_specific;
0331     unsigned int buffer_length;
0332 } TW_Ioctl_Driver_Command;
0333
0334 typedef struct TAG_TW_Ioctl_Apache {
0335     TW_Ioctl_Driver_Command driver_command;
0336     char padding[488];
0337     TW_Command_Full firmware_command;
0338     char data_buffer[1];
0339 } TW_Ioctl_Buf_Apache;
0340
0341 /* GetParam descriptor */
0342 typedef struct {
0343     unsigned short  table_id;
0344     unsigned short  parameter_id;
0345     unsigned short  parameter_size_bytes;
0346     unsigned short  actual_parameter_size_bytes;
0347     unsigned char   data[1];
0348 } TW_Param_Apache;
0349
0350 /* Compatibility information structure */
0351 typedef struct TAG_TW_Compatibility_Info
0352 {
0353     char driver_version[32];
0354     unsigned short working_srl;
0355     unsigned short working_branch;
0356     unsigned short working_build;
0357     unsigned short driver_srl_high;
0358     unsigned short driver_branch_high;
0359     unsigned short driver_build_high;
0360     unsigned short driver_srl_low;
0361     unsigned short driver_branch_low;
0362     unsigned short driver_build_low;
0363     unsigned short fw_on_ctlr_srl;
0364     unsigned short fw_on_ctlr_branch;
0365     unsigned short fw_on_ctlr_build;
0366 } TW_Compatibility_Info;
0367
0368 #pragma pack()
0369
0370 typedef struct TAG_TW_Device_Extension {
0371     void            __iomem *base_addr;
0372     unsigned long       *generic_buffer_virt[TW_Q_LENGTH];
0373     dma_addr_t      generic_buffer_phys[TW_Q_LENGTH];
0374     TW_Command_Full     *command_packet_virt[TW_Q_LENGTH];
0375     dma_addr_t      command_packet_phys[TW_Q_LENGTH];
0376     TW_Command_Apache_Header *sense_buffer_virt[TW_Q_LENGTH];
0377     dma_addr_t      sense_buffer_phys[TW_Q_LENGTH];
0378     struct pci_dev      *tw_pci_dev;
0379     struct scsi_cmnd    *srb[TW_Q_LENGTH];
0380     unsigned char       free_queue[TW_Q_LENGTH];
0381     unsigned char       free_head;
0382     unsigned char       free_tail;
0383     int         state[TW_Q_LENGTH];
0384     unsigned int        posted_request_count;
0385     unsigned int        max_posted_request_count;
0386     unsigned int        max_sgl_entries;
0387     unsigned int        sgl_entries;
0388     unsigned int        num_resets;
0389     unsigned int        sector_count;
0390     unsigned int        max_sector_count;
0391     unsigned int        aen_count;
0392     struct Scsi_Host    *host;
0393     long            flags;
0394     TW_Event        *event_queue[TW_Q_LENGTH];
0395     unsigned char       error_index;
0396     unsigned int        error_sequence_id;
0397     int         chrdev_request_id;
0398     wait_queue_head_t   ioctl_wqueue;
0399     struct mutex        ioctl_lock;
0400     TW_Compatibility_Info   tw_compat_info;
0401     char            online;
0402 } TW_Device_Extension;
0403
0404 #endif /* _3W_SAS_H */
0405